Kompendium - Datorteknik

Bilaga BVHDL-kodB.1 Komplett VHDL-kod för personnummermaskinenlibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;entity add isPort ( clk,rst, stb: in std_logic;kb : in std_logic_vector(3 downto 0);u : out std_logic_vector(3 downto 0));end add;architecture Behavioral of add issignal x,y,knapp,var2,siffra10: std_logic;signal p: std_logic_vector(3 downto 0);signal d, d2: std_logic_vector(3 downto 0);signal d3: std_logic_vector(4 downto 0);signal s: std_logic_vector(3 downto 0);begin-- SEP sync and single pulse strobeprocess(clk,rst)beginif rst=’0’ thenx