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536 p a r t V I I : t u n i n g , T r o u b l e s h o o t i n g , a n d D e s i g n A i d s<br />

pedance. For the special case when both the source and the load impedances are purely<br />

resistive, the design equations are:<br />

R2<br />

Q = −<br />

R 1<br />

(24.2)<br />

1<br />

XL = Q × R<br />

(24.3)<br />

1<br />

X<br />

C<br />

R2 =<br />

(24.4)<br />

Q<br />

where, of course,<br />

X<br />

C =<br />

1<br />

2πfC<br />

(24.5)<br />

and<br />

X = L<br />

2 π fL<br />

(24.6)<br />

The L-Âsection network of Fig. 24.1B differs from the previous circuit in that the coil<br />

and capacitor locations are swapped. As before, values for L and C can be found that<br />

will allow this circuit to match all possible load impedances having R 1 < R 2 , and some<br />

load impedances for the range R 1 > R 2 , depending on the magnitude of X 2 . For the special<br />

case when both the source and the load impedances are purely resistive, the design<br />

equations are:<br />

R2<br />

Q = −<br />

R 1<br />

(24.7)<br />

1<br />

R2<br />

X<br />

L<br />

=<br />

Q<br />

(24.8)<br />

X = R 1<br />

Q<br />

C<br />

(24.9)<br />

Figure 24.1C is similar to Fig. 24.1A with the exception that the capacitor is at the<br />

input rather than the output of the network. Values for L and C can be found that will<br />

allow this topology to match all possible load impedances having R 1 > R 2 , and some load<br />

impedances for the range R 1 < R 2 . The equations governing this network are:<br />

R1<br />

Q = −<br />

R 1<br />

(24.10)<br />

2<br />

X<br />

L<br />

= R 2<br />

Q<br />

(24.11)<br />

R1<br />

X<br />

C<br />

=<br />

Q<br />

(24.12)

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