28.02.2014 Views

universidade federal de santa catarina programa de póe-graduação ...

universidade federal de santa catarina programa de póe-graduação ...

universidade federal de santa catarina programa de póe-graduação ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

[9] Cw L. Wey, T. V. Chang, "Design and Analysis of VLSI-Based Parallel<br />

Multipliers", IEE Proc., Vol. 137, Pt. E, No.4, pp. 328-336, July 1990.<br />

[10] M. Hatamiam, G. L. Cash, "Parallel Bit-Level Pipellned VLSI Designs for<br />

High-Speed Signal Processing", Proc. of IEEE, Vol. 75, No. 9, pp. 1192-1202,<br />

eptember 1987.<br />

{11] S. Y. Kung, "VLSI Array Processors", IEEE ASSP Magazine, pp. 4-22, July<br />

1985.<br />

[12] E. G. Friedman, J. H. Mulligan Jr., "Clock Frequency and Latency in<br />

Synchronous Digital Systems", IEEE Trans. Signal Processing, Vol. 39, No. 4,<br />

pp. 930-934, April 1991.<br />

[13] E. E. Swartzlan<strong>de</strong>r Jr., Editor, "Systolic Signal Processing Systems",<br />

Marcel Dekker Inc., 1987.<br />

[14] A. Malvino, "Microcomputadores`e Microprocessadores", McGraw-Hill, 1985.<br />

v<br />

[15] P. R. Cappelo, K. Steiglitz, "A Note on 'Free Accumulation' in VLSI<br />

Filter Architectures", IEEE Trans. CAS, Vol. 32, No. 3, pp. 291-296, March<br />

1985.<br />

[16] G. K. Ma, F. J. Taylor, “Multiplier Policies for Digital Signal<br />

Processing", IEE ASSP Magazine, pp. 6-18, January 1990.<br />

[17] C. Mead, L. Conway, "Introduction to VLSI Systems", Addison-Wesley<br />

Publishing Inc. 1980. .<br />

[18] Xilink Inc.,“ The Programmable Gate Array Data Book", 1989.<br />

[19] H. T. Kung, “Why Systolic Architectures", IEEE Computer, Vol. 15, No. 1,<br />

January 1982.<br />

97

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!