universidade federal de santa catarina programa de póe-graduação ...
universidade federal de santa catarina programa de póe-graduação ... universidade federal de santa catarina programa de póe-graduação ...
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96 REFERÊNCIAS [1] A. V. Oppenheim, R. W. Shafer, "Digital Signal Processing", Prentice-Hall, Inc., 1975. [2] S. Y. Kung, H. J. Whitehouse, T. Kailath, Editors, "VLSI and Modern Signal Processing", Prentice-Hall, Inc., 1985. [3] B. Ryan, "Multiprocessors Surf's Up", Byte Magazine, pp. 199-206, June ‹ 1991. ` [4] S. Y. Kung, "On ›Supercomputing with Systolic/Wave Front Array Processors", Proc. IEEE, Vol. 72, No.7, pp. 867¿883, Jüly 1984. [S] R. Roy, M. A. Bayoumi, "An Efficient Two's Complement Systolic Multiplier for Real-Time Digital Signal Processing", IEEE Trans. on CAS, Vol. 36, No. 11, pp. 1488-1493, November 1989. [B] A. Aliphas, J. A. Feldman, "The Versality of Digital Signal Processing Chips", IEEE Spectrum, pp. 40-45, June 1987. [7] M. 0. Ahmad, D. V. Poornalah, "Design of an Efficient VLSI Inner-Product Processor for Real-Time DSP Applications", IEEE Trans. on CAS, Vol. 36, No. 2, pp. 324-329, February 1939. [8] (L S. Wallace, "A suggestion for a Fest Multiplier“, IEEE Trans. on Electronic Computers, Vo. EC-3, pp. 14-17, February 1964. '
- Page 51 and 52: ~ dado ' A 44 resultando no tempo d
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- Page 81 and 82: 74 A P Ê N D I C E A PROGRAMA DE S
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- Page 101: 94 A P É N D I C E C J DIAGRAHA ES
96<br />
REFERÊNCIAS<br />
[1] A. V. Oppenheim, R. W. Shafer, "Digital Signal Processing",<br />
Prentice-Hall, Inc., 1975.<br />
[2] S. Y. Kung, H. J. Whitehouse, T. Kailath, Editors, "VLSI and Mo<strong>de</strong>rn<br />
Signal Processing", Prentice-Hall, Inc., 1985.<br />
[3] B. Ryan, "Multiprocessors Surf's Up", Byte Magazine, pp. 199-206, June ‹<br />
1991.<br />
`<br />
[4] S. Y. Kung, "On ›Supercomputing with Systolic/Wave Front Array<br />
Processors", Proc. IEEE, Vol. 72, No.7, pp. 867¿883, Jüly 1984.<br />
[S] R. Roy, M. A. Bayoumi, "An Efficient Two's Complement Systolic Multiplier<br />
for Real-Time Digital Signal Processing", IEEE Trans. on CAS, Vol. 36, No.<br />
11, pp. 1488-1493, November 1989.<br />
[B] A. Aliphas, J. A. Feldman, "The Versality of Digital Signal Processing<br />
Chips", IEEE Spectrum, pp. 40-45, June 1987.<br />
[7] M. 0. Ahmad, D. V. Poornalah, "Design of an Efficient VLSI Inner-Product<br />
Processor for Real-Time DSP Applications", IEEE Trans. on CAS, Vol. 36, No.<br />
2, pp. 324-329, February 1939.<br />
[8] (L S. Wallace, "A suggestion for a Fest Multiplier“, IEEE Trans. on<br />
Electronic Computers, Vo. EC-3, pp. 14-17, February 1964.<br />
'
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