power monitors are on an independent i2c bus - Spectrum Digital ...

54321This section is an outline of vias labeled as Testpoints in the schematic. This allows us to determine pwb line lengths for memory tomemory and CPU to memory it is purely a visibility tool no actual "component" is used the vias <strong>are</strong> just replaced with a via that islabeled a test pointMEMORY 4MEMORY 1 MEMORY 2MEMORY 3DD18,37,39 DDR0_A0DDR0_A01TPM181TPMB181TPMC181TPMD1818,37,39 DDR0_A1DDR0_A11TPM191TPMB191TPMC191TPMD1918,37,39 DDR0_A2DDR0_A21TPM171TPMB171TPMC171TPMD1718,37,39 DDR0_A3DDR0_A31TPM111TPMB111TPMC111TPMD1118,37,39 DDR0_A4DDR0_A41TPM201TPMB201TPMC201TPMD2018,37,39 DDR0_A5DDR0_A51TPM161TPMB161TPMC161TPMD1618,37,39 DDR0_A6DDR0_A61TPM241TPMB241TPMC241TPMD2418,37,39 DDR0_A7DDR0_A71TPM211TPMB211TPMC211TPMD2118,37,39 DDR0_A8DDR0_A81TPM271TPMB271TPMC271TPMD27C18,37,39 DDR0_A918,37,39 DDR0_A10DDR0_A9DDR0_A1011TPM22TPM911TPMB22TPMB911TPMC22TPMC911TPMD22TPMD9C18,37,39 DDR0_A11DDR0_A111TPM231TPMB231TPMC231TPMD2318,37,39 DDR0_A12DDR0_A121TPM141TPMB141TPMC141TPMD1418,37,39 DDR0_A13DDR0_A131TPM251TPMB251TPMC251TPMD2518,37,39 DDR0_A14DDR0_A141TPM261TPMB261TPMC261TPMD2618,37,39 DDR0_A15DDR0_A151TPM101TPMB101TPMC101TPMD1018,37,39 DDR0_BA0DDR0_BA01 TPM121 TPMB121TPMC121TPMD1218,37,39 DDR0_BA1DDR0_BA11TPM151TPMB151TPMC151TPMD1518,37,39 DDR0_BA2DDR0_BA21TPM131TPMB131TPMC131TPMD1318,37,39 DDR0_RASNDDR0_RASN1TPM11TPMB11TPMC11TPMD118,37,39 DDR0_CASNDDR0_CASN1TPM21TPMB21TPMC21TPMD2B18,37,39 DDR0_WEN18,37,39 DDR0_ODT0DDR0_WENDDR0_ODT011TPM8TPM611TPMB8TPMB611TPMC8TPMC611TPMD8TPMD6B18,37,39 DDR0_CKEDDR0_CKE1TPM51TPMB51TPMC51TPMD518,37,39 DDR0_CSN0DDR0_CSN01TPM71TPMB71TPMC71TPMD718,37,39 DDR0_CLK0DDR0_CLK01TPM31TPMB31TPMC31TPMD318,37,39 DDR0_CLK0NDDR0_CLK0N1TPM41 TPMB41 TPMC41TPMD4ATEXAS INSTRUMENTS INCORPORATEDATitle:Page Contents:J5 ECO EVMTEST POINTS EMIF0Size: BDWG NO515062-0001Revision:ADate: Monday, January 16, 2012 Sheet 36 o f 6454321