ETTC'2003 - SEE
ETTC'2003 - SEE ETTC'2003 - SEE
mechanism. In a system where a late answer is the wrong answer this means that we must incorporate some kind of time-correlation into the picture. We can solve this problem by borrowing from the flight test world and using the concept of an acquisition cycle. We implement the “protocol stripping” function as two independent and simultaneous tasks and then perform these tasks in a completely pre-determined way through a synchronized cycle of events. A GATEWAY IMPLEMENTED USING COTS EQUIPMENT The KAM-500 from ACRA CONTROL is a modular rugged data acquisition unit based on a digital backplane. This can be used to construct a gateway device that does not involve any PC configuration, and which is entirely flight-qualified. Figure 3 below shows how such a device would work using a CAIS Bus controller module (KAD/CBC/001), an Ethernet module (KAD/ETH/001) and a standard KAM- 500 backplane and controller (KAM/SYS/00x). The CAIS bus controller module acts like any CAIS bus controller. It drives a CAIS acquisition cycle which involves sequences of data requests, and data returned from the remote DAU(s). This data is fed into a RAM on the controller card (which can be viewed as a current value table or CVT). Figure 3 A Gateway device from CAIS to Ethernet
Independently (although, as we shall see, synchronously) the KAM/ETH/001 is running a “packet cycle”. It builds UDP packets based on the contents of its own RAM, according to some sequence and cycle that is determined by the user, but is exactly synchronous with the CAIS bus cycle. The controller has the task of synchronizing both cards to ensure they start their cycles at the same instant, and of transferring the data from the CAIS RAM to the Ethernet RAM in a precisely deterministic fashion. Consider now the time co-relation of samples. Figure 4 shows the timelines of each of the cycles that are in operation here. Assuming that the CAIS DAUs are operating in Synchronous mode and that X and Y are sampled twice per CIAS cycle, then we know they are sampled at time 0 and time T/2. At some point after this, the CAIS controller demands the sample and receives it for X and Y. Once in the RAM of the CAIS Controller, the KAM-500 backplane controller can transfer it to the Ethernet Packet builder. The Ethernet card has a built in microsecond counter that resets at the start of each acquisition cycle. So we can include this value to the packet that contains the sample instances of X and Y. Note that adding just one time tag tags all data in the packet due to the deterministic and cyclic nature of the acquisition cycle. Alternatively (or additionally) we can include IRIG time directly in the payload of the packet.
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- Page 166 and 167: BACK Résumé : Outil de traitement
- Page 168 and 169: 1 Principes généraux de l’outil
- Page 170 and 171: 1.2.3 Valise de piste L’outil peu
- Page 172 and 173: 2 Capacités fonctionnelles 2.1 Arc
- Page 174 and 175: Vue f(t) 2.3.1 Vues y=f(t) Ces vues
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- Page 178 and 179: 2.3.3 Représentation trajectograph
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- Page 182 and 183: 3 Concept de structure d’accueil
- Page 184 and 185: 4 Exemples d’utilisation 4.1.1 HB
- Page 186 and 187: SESSION 3 : Capteurs et dispositifs
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- Page 192 and 193: For the purposes of this paper it i
- Page 194 and 195: hardware down and led to widely acc
- Page 198 and 199: 0 X Y X' Y' 0 X Y Sampling Cycle X
- Page 200 and 201: - Perform the exchange in a rigorou
- Page 202 and 203: GLOSSARY AFDX Avionics Full DupleX
- Page 204 and 205: The complete message is recorded by
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- Page 208 and 209: Furthermore, the configuration of t
- Page 210 and 211: BACK LOGICIEL JAVA D’ACQUISITION
- Page 212 and 213: ISA ISA Interface utilisateur Objet
- Page 214 and 215: CONCLUSION La première version de
- Page 216 and 217: ; ( ( + & 2+5. . & & , & . + & +2(
- Page 218 and 219: ( +, & + < 0 9& - & = (( + 1 - + +,
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- Page 228 and 229: SESSION 5 : TELEMESURE (SPECTRE - M
- Page 230 and 231: Currently various avenues are explo
- Page 232 and 233: Binary X Binary to RNS and RNS to B
- Page 234 and 235: The index multiplier block will be
- Page 236 and 237: The current implementation consists
- Page 238 and 239: Spécificité de la télémesure AI
- Page 240 and 241: Technique COFDM : La modulation COF
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- Page 244 and 245: BACK ETCC'2003 European Test and Te
mechanism. In a system where a late answer is the wrong answer this means that<br />
we must incorporate some kind of time-correlation into the picture.<br />
We can solve this problem by borrowing from the flight test world and using the<br />
concept of an acquisition cycle. We implement the “protocol stripping” function as<br />
two independent and simultaneous tasks and then perform these tasks in a<br />
completely pre-determined way through a synchronized cycle of events.<br />
A GATEWAY IMPLEMENTED USING COTS EQUIPMENT<br />
The KAM-500 from ACRA CONTROL is a modular rugged data acquisition unit<br />
based on a digital backplane. This can be used to construct a gateway device that<br />
does not involve any PC configuration, and which is entirely flight-qualified.<br />
Figure 3 below shows how such a device would work using a CAIS Bus controller<br />
module (KAD/CBC/001), an Ethernet module (KAD/ETH/001) and a standard KAM-<br />
500 backplane and controller (KAM/SYS/00x).<br />
The CAIS bus controller module acts like any CAIS bus controller. It drives a CAIS<br />
acquisition cycle which involves sequences of data requests, and data returned from<br />
the remote DAU(s). This data is fed into a RAM on the controller card (which can be<br />
viewed as a current value table or CVT).<br />
Figure 3 A Gateway device from CAIS to Ethernet
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