ETTC'2003 - SEE

As technology evolves, the boundary
between system parts implemented in
FPGA, in dedicated processors, or in
general processors may shift. This
becomes especially apparent when looking
at the capabilities of new FPGA families
like the Xilinks Virtex II Pro, which
provides the possibilities to integrate PPC
405 cores directly in the FPGA. The next
generation of CES PPC boards, due to be
operational end of 2003, uses these devices
as key elements. To draw the maximum
benefit of these possibilities, efforts are
under way to design systems in a way that
allows to fix the precise boundaries
between hardware, firmware and software
as late as possible in the implementation
phase.
HW abstraction layers
Hardware Abstraction Layers (HALs) are
one of the keys to assure the continuity of
function units across several technology
generations. They allow application
specific software to stay invariant although
the underlying hardware is replaced.
The most obvious HAL is the operating
system (OS) itself. Most CES systems
today rely on VxWorks® or LynxOS® as
real time OS. As it happens, LynxOS® is
currently dominating in the commercial
domain, while most of the military
programs in which CES is involved use
VxWorks®. Linux® is already running on
the current generation of CES PPC boards
and real time flavors of Linux® are a very
promising option for the future, provided
that long-term support issues can be
resolved.
As an extension to the services provided
by the OS, CES has, in collaboration with
its avionics partners, developed HALs that
allow systems to be largely invariant with
respect to the bus system chosen (VME or
CPCI), the number of processors used to
implement the system, and the
redistribution of these processors between
SBCs and PMCs. Examples of such HALs
are the BpNet and vmeQuick software
packages.
BpNet started as an attempt to provide to
the first generation of MFCCs the network
resources needed for a convenient OS
support. It has since grown into a tool
providing a coherent set of software
services across different hardware- (VME,
CPCI, PMC) and software- (VxWorks®,
LynxOS®, Linux®) platforms. Its key
concept is the channel:
A BpNet channel is a bi-directional,
locking connection between two threads.
Data delivery and error handling are
guaranteed. The threads may run on the
same processor or on different processors.
If a set of programs is communicating via
BpNet, it can be decided at runtime on
which processor each program is running.
BpNet provides the following services:
• Thread synchronization.
• Data transport between threads.
• Name resolution: Clients may
connect to servers without knowing
their ‘physical coordinates’ in
advance.
• IP-emulation. Programs using
standard IP-sockets run ‘as is’ in a
network of processors connected
by BpNet (less throughput than raw
channels, though).