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VHDL Made Easy! - Xilinx

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44<br />

Carry-Logic<br />

Continued from the previous page<br />

Figure 5<br />

Function Select Flip-Flop<br />

Figures 6(a), left, & 6(b)<br />

Two Peak Detectors<br />

when needed. Thus, it is possible to generate<br />

either A–B or B–A on demand.<br />

Given this capability, the absolute difference<br />

is obtained by simply choosing the<br />

PEAK DETECTOR<br />

In a peak detector, the current peak<br />

value is stored in a register, and is subtracted<br />

from every new input value. If the<br />

difference is positive, the new input is<br />

larger, and it replaces the value in the<br />

register as a new peak. Otherwise, the<br />

register is unchanged.<br />

Only the sign of the difference is of<br />

interest in determining whether the register<br />

is updated or not. The other difference<br />

bits need not be generated, and the corresponding<br />

function generators are free to<br />

be used in controlling the register.<br />

Figure 6(a) shows a typical bit. The<br />

sign of the difference is routed to all bits<br />

to select the value loaded into the register.<br />

This operation includes the sign bit of<br />

the register. Consequently, the subtraction<br />

must be sign-extended by one bit so that<br />

function that yields a positive result. However,<br />

directly feeding back the sign of the<br />

output to select the function will result in<br />

instability, and a flip-flop must be added to<br />

eliminate this possibility (Figure 5).<br />

In the first of two operations on the<br />

same inputs, either subtraction can be<br />

performed. If the first result is negative, the<br />

flip-flop is toggled to select the other function<br />

to achieve a positive result in the second<br />

operation. If the first result is positive,<br />

the flip-flop is not toggled, and the first<br />

operation is repeated. In either case, the<br />

result of the second operation is positive.<br />

the sign of the difference is also available.<br />

The peak detector can be reset by forcing<br />

the sign output to a one. This causes<br />

the current input value to be loaded as a<br />

new peak, regardless of the value of the<br />

previous peak.<br />

The circuit described above is equivalent<br />

to using the sign of the difference to enable<br />

the peak register, and the CLB Enable Clock<br />

pin could be used equally well. However,<br />

the two techniques impose different routing<br />

constraints, and either may be more effective<br />

than the other in different situations.<br />

If enable clock is used, the function<br />

generators can be used for other purposes.<br />

For example, to initialize the peak detector<br />

with a predetermined value that is only<br />

changed by a peak that exceeds it, as in<br />

Figure 6(b). ◆

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