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ESA Document - Emits - ESA

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s<br />

HMM<br />

Assessment Study<br />

Report: CDF-20(A)<br />

February 2004<br />

page 197 of 422<br />

The present and near-future European space computers are based on the SPARC RISC<br />

architecture (ERC32 then LEON2-FT). More powerful rad-hard Power-PCs are currently<br />

available, but under US ITAR control.<br />

The roadmap for the first generation of LEON processor is now stabilized : flight models in 0.18<br />

µm ATMEL technology should be available during the first quarter of 2005, and should fulfill<br />

the needs of the first Aurora missions.<br />

Nevertheless, note that that the US processor available today already provide more processing<br />

power than the LEON will do in 2005: the first generation of radiation-hardened PowerPC 750<br />

from BAE-Systems in 0.25 µm technology provides 240 to 300 MIPS, and a 370 MIPS version<br />

in 0.18 µm is foreseen before 2007.<br />

To lower the gap with the US products, ways to improve of the internal LEON architecture<br />

should be studied. The power PC 750 architecture is far more complex than the LEON<br />

architecture: it includes several independent processing units that allow executing more than one<br />

instruction per cycle. Moreover it also supports level 2 cache.<br />

This kind of architecture is needed to support higher-level operating systems that can guarantee<br />

soft real-time performances like Linux.<br />

The use of COTS processors (mainly Power PC line of products) shall be assessed for noncritical<br />

payloads. The availability of commercial SOI process (see [RD28]), may boost safe use<br />

of high power chips in space, but dedicated development (especially for ASICs) is needed.<br />

3.3.6.1.2 Maintenance, availability<br />

The availability of space qualified electronic components has decreased in the latest years.<br />

Moreover, the evolution of rad-hard technologies after 0.13 Pm is very difficult to predict: it is<br />

not yet known whether or not the hardening techniques at design level will compensate the<br />

increasing SEE sensitivity (see Figure 3-53). Consequently, the gap between commercially<br />

available technologies and radiation-hardened technologies may either decrease or increase.<br />

Figure 3-53: Comparison of present roadmaps for space qualified and commercial microprocessors

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