Panasonic FP Series PLC Programming Manual - CTi Automation

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Table of Contents F89 EXT 16-bit data sign extension ............................... 3 − 200 P89 PEXT F90 DECO Decode .............................................. 3 − 202 P90 PDECO F91 SEGT 7-segment decode ..................................... 3 − 206 P91 PSEGT F92 ENCO Encode ............................................... 3 − 208 P92 PENCO F93 UNIT 16-bit data combine .................................... 3 − 212 P93 PUNIT F94 DIST 16-bit data distribute ................................... 3 − 214 P94 PDIST F95 ASC Character → ASCII code ............................... 3 − 216 P95 PASC F96 SRC 16-bit data search ..................................... 3 − 220 P96 PSRC F97 DSRC 32-bit data search ..................................... 3 − 222 P97 PDSRC Data shift instructions F98 CMPR Data table shift-out and compress ........................ 3 − 224 P98 PCMPR F99 CMPW Data table shift-in and compress ......................... 3 − 227 P99 PCMPW F100 SHR Right shift of multiple bits (n bits) in a 16-bit data ........... 3 − 230 P100 PSHR F101 SHL Left shift of multiple bits (n bits) in a 16-bit data ............ 3 − 232 P101 PSHL F102 DSHR Right shift of n bits in a 32-bit data ....................... 3 − 234 P102 PDSHR F103 DSHL Left shift of n bits in a 32-bit data ......................... 3 − 236 P103 PDSHL F105 BSR Right shift of one hexadecimal digit (4 bits) ................ 3 − 238 P105 PBSR F106 BSL Left shift of one hexadecimal digit (4 bits) ................. 3 − 240 P106 PBSL F108 BITR Right shift of multiple bits of 16−bit data range ............. 3 − 242 P108 PBITR F109 BITL Left shift of multiple bits of 16−bit data range .............. 3 − 244 P109 PBITL F110 WSHR Right shift of one word (16 bits) of 16−bit data range ........ 3 − 246 P110 PWSHR F111 WSHL Left shift of one word (16 bits) of 16−bit data range ......... 3 − 248 P111 PWSHL F112 WBSR Right shift of one hexadecimal digit (4-bit) of 16−bit data range 3 − 250 P112 PWBSR xii CTi Automation - Phone: 800.894.0412 - Fax: 208.368.0415 - Web: www.ctiautomation.net - Email: info@ctiautomation.net
Table of Contents F113 WBSL Left shift of one hexadecimal digit (4-bit) of 16−bit data range 3 − 252 P113 PWBSL FIFO instructions F115 FIFT FIFO buffer definition ................................... 3 − 254 P115 PFIFT F116 FIFR Data read from FIFO buffer ............................. 3 − 256 P116 PFIFR F117 FIFW Data write to FIFO buffer ............................... 3 − 260 P117 PFIFW Basic function instructions F118 UDC UP/DOWN counter ..................................... 3 − 267 F119 LRSR Left/right shift register .................................. 3 − 270 Data rotate instructions F120 ROR 16-bit data right rotation ................................ 3 − 274 P120 PROR F121 ROL 16-bit data left rotation .................................. 3 − 276 P121 PROL F122 RCR 16-bit data right rotation with carry flag data ............... 3 − 278 P122 PRCR F123 RCL 16-bit data left rotation with carry flag data ................ 3 − 280 P123 PRCL F125 DROR 32-bit data right rotation ................................ 3 − 282 P125 PDROR F126 DROL 32-bit data left rotation .................................. 3 − 284 P126 PDROL F127 DRCR 32-bit data right rotation with carry flag data ............... 3 − 286 P127 PDRCR F128 DRCL 32-bit data left rotation with carry flag data ................ 3 − 288 P128 PDRCL Bit manipulation instructions F130 BTS 16-bit data bit set ...................................... 3 − 290 P130 PBTS F131 BTR 16-bit data bit reset .................................... 3 − 292 P131 PBTR F132 BTI 16-bit data bit invert .................................... 3 − 294 P132 PBTI F133 BTT 16-bit data bit test ...................................... 3 − 296 P133 PBTT F135 BCU Number of on (1) bits in 16-bit data ....................... 3 − 298 P135 PBCU CTi Automation - Phone: 800.894.0412 - Fax: 208.368.0415 - Web: www.ctiautomation.net - Email: info@ctiautomation.net xiii
Page 1 and 2: CTi Automation - Phone: 800.894.041
Page 3 and 4: Table of Contents Chapter 1 Relays,
Page 5 and 6: Table of Contents 4.4.2 Operation M
Page 7 and 8: Basic Instructions Sequence basic i
Page 9 and 10: OR 16−bit data compare (OR) .....
Page 11 and 12: Control instruction Table of Conten
Page 13: Table of Contents F66 WOR 16-bit da
Page 18 and 19: Table of Contents F175 SPSH Pulse o
Page 20 and 21: Table of Contents F278 DSORT Sort d
Page 22 and 23: Table of Contents F336 FABS Floatin
Page 24 and 25: CTi Automation - Phone: 800.894.041
Page 26 and 27: Relays, Memory Areas and Constants
Page 64 and 65:
Relays, Memory Areas and Constants
Page 66 and 67:
Page 68 and 69:
Page 70 and 71:
Page 72 and 73:
Page 74 and 75:
Page 76 and 77:
Page 78 and 79:
Page 80 and 81:
Page 82 and 83:
Page 84 and 85:
Page 86 and 87:
Page 88 and 89:
Page 90 and 91:
Page 92 and 93:
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Page 96 and 97:
Page 98 and 99:
Page 100 and 101:
Page 102 and 103:
Page 104 and 105:
Page 106 and 107:
Page 108 and 109:
Page 110 and 111:
Page 112 and 113:
Basic Instructions 2-2 CTi Automati
Page 114 and 115:
Basic Instructions 2.1.2 Basic Func
Page 116 and 117:
Basic Instructions 2.2 Number of St
Page 118 and 119:
Basic Instructions Outline ST, ST/:
Page 120 and 121:
Basic Instructions Outline Inverts
Page 122 and 123:
Basic Instructions Outline OR: Conn
Page 124 and 125:
Basic Instructions Outline Contact
Page 126 and 127:
Basic Instructions Outline Leading
Page 128 and 129:
Basic Instructions Outline Inverts
Page 130 and 131:
Basic Instructions When blocks are
Page 132 and 133:
Basic Instructions When blocks are
Page 134 and 135:
Basic Instructions Description One
Page 136 and 137:
Basic Instructions Outline DF: Turn
Page 138 and 139:
Basic Instructions Caution is requi
Page 140 and 141:
Basic Instructions Outline When a l
Page 142 and 143:
Basic Instructions Outline SET: Whe
Page 144:
Basic Instructions Outline This is
Page 147 and 148:
Basic Instructions Setting the time
Page 149 and 150:
Basic Instructions 3 With each scan
Page 151 and 152:
Changing set values based on specif
Page 153 and 154:
Timer set time The formula of the t
Page 155 and 156:
Basic Instructions Directly specify
Page 157 and 158:
Examples of applying direct specifi
Page 159 and 160:
Basic Instructions Description The
Page 161 and 162:
Basic Instructions Directly specify
Page 163 and 164:
Basic Instructions Examples of appl
Page 165 and 166:
Basic Instructions Description Shif
Page 167 and 168:
Basic Instructions Outline Executes
Page 169 and 170:
Basic Instructions Operation of dif
Page 171 and 172:
Basic Instructions Outline Skips to
Page 173 and 174:
Basic Instructions Differential ins
Page 176 and 177:
Basic Instructions TM, CT, and SR i
Page 178 and 179:
Basic Instructions Outline Stops ex
Page 180 and 181:
Basic Instructions Outline Indicate
Page 182 and 183:
Basic Instructions X0 Y30 X3 2 −
Page 184 and 185:
Basic Instructions 2 − 74 CTi Aut
Page 186 and 187:
Basic Instructions Description When
Page 188 and 189:
Basic Instructions NSTL (Next step,
Page 190 and 191:
Basic Instructions When you need to
Page 192 and 193:
Basic Instructions You must be care
Page 195 and 196:
SCLR Outline Reset multiple process
Page 198 and 199:
Basic Instructions For the FP2/FP2S
Page 200 and 201:
Basic Instructions Precautions duri
Page 202 and 203:
Basic Instructions Syntax of interr
Page 204 and 205:
Basic Instructions When another int
Page 206 and 207:
Basic Instructions Interrupt progra
Page 208 and 209:
Basic Instructions Interrupt progra
Page 210 and 211:
Basic Instructions Control when mor
Page 212 and 213:
Basic Instructions Outline Performs
Page 214 and 215:
Basic Instructions Specifying contr
Page 216 and 217:
Basic Instructions Example of enabl
Page 218 and 219:
Basic Instructions 2 − 108 S2: HF
Page 221 and 222:
FP2/FP2SH/FP10SH Input examples Bas
Page 223 and 224:
FP2/FP2SH/FP10SH Basic Instructions
Page 225 and 226:
FP2/FP2SH/FP10SH Basic Instructions
Page 227:
FP2/FP2SH/FP10SH Example 1 for sett
Page 230 and 231:
Basic Instructions Keyword setting
Page 233:
FPΣ/FP−X/FP0R Basic Instructions
Page 237:
Page 241:
Page 244:
Basic Instructions System registers
Page 248:
Page 252:
Basic Instructions 5 AN = AN AN >
Page 256:
Page 260:
Page 264 and 265:
Basic Instructions 2 − 154 CTi Au
Page 266 and 267:
High−level Instructions 3-2 CTi A
Page 268 and 269:
High−level Instructions 3.1.2 Hig
Page 270 and 271:
High−level Instructions 3-6 Examp
Page 272:
High−level Instructions Outline C
Page 276:
High−level Instructions Outline I
Page 281:
F5 P5 High−level Instructions Out
Page 285:
F6 P6 High−level Instructions Out
Page 288 and 289:
High−level Instructions 3 − 24
Page 291:
Page 295:
F11 P11 High−level Instructions O
Page 299:
FPΣ/FP−X/FP0R F12 Outline Reads
Page 303:
FP0/FP−e P13 Outline Writes data
Page 307:
FP2SH/FP10SH F13 P13 Outline Writes
Page 313:
Page 317:
Page 321:
F19 LBL High−level Instructions O
Page 325:
Page 329:
Page 333:
Page 337:
Page 341:
Page 345:
F33 High−level Instructions Outli
Page 349:
F35 P35 (P+1) (+1) 16-bit data incr
Page 353:
F37 (−1) 16-bit data decrement [D
Page 357:
F39 P39 (PD*D) (D*D) 32-bit data mu
Page 361:
Page 365:
F43 (DB+) P43 (PDB+) High−level I
Page 369:
F46 (DB−) 8-digit BCD data subtra
Page 373:
F48 (DB−) P48 (PDB−) High−lev
Page 377:
F51 (DB*) P51 (PDB*) High−level I
Page 381:
Page 385:
F56 (DB+1) 8-digit BCD data increme
Page 389:
Page 392 and 393:
High−level Instructions Explanati
Page 395 and 396:
F61 (DCMP) P61 (PDCMP) High−level
Page 397:
High−level Instructions Precautio
Page 401:
F63 (DWIN) P63 (PDWIN) High−level
Page 406 and 407:
Page 409:
F66 (WOR) P66 (PWOR) High−level I
Page 413:
F68 (XNR) P68 (PXNR) High−level I
Page 417 and 418:
F70 (BCC) P70 (PBCC) High−level I
Page 419 and 420:
High−level Instructions Applicati
Page 421 and 422:
High−level Instructions Applicati
Page 423 and 424:
Page 425 and 426:
F72 (AHEX) P72 (PAHEX) High−level
Page 427 and 428:
Conversion Example The following sh
Page 429 and 430:
F73 (BCDA) P73 (PBCDA) High−level
Page 431 and 432:
How to specify S2 S2 = H 0 0 Number
Page 433 and 434:
F74 (ABCD) P74 (PABCD) High−level
Page 436 and 437:
High−level Instructions 7 ASCII c
Page 438 and 439:
Page 440 and 441:
High−level Instructions Flag cond
Page 442 and 443:
High−level Instructions Descripti
Page 444 and 445:
High−level Instructions F77 (DBIA
Page 446 and 447:
High−level Instructions Conversio
Page 448 and 449:
Page 450:
High−level Instructions F80 (BCD)
Page 454:
High−level Instructions F82 (DBCD
Page 460:
High−level Instructions F86 (DNEG
Page 466 and 467:
High−level Instructions F90 (DECO
Page 470:
High−level Instructions F91 (SEGT
Page 473 and 474:
Page 476:
High−level Instructions F93 (UNIT
Page 480:
Page 484:
High−level Instructions F96 (SRC)
Page 488:
High−level Instructions F98 (CMPR
Page 491:
F99 (CMPW) P99 (PCMPW) High−level
Page 494:
High−level Instructions F100 (SHR
Page 498:
High−level Instructions F102 (DSH
Page 502:
High−level Instructions F105 P105
Page 506:
High−level Instructions F108 (BIT
Page 510:
High−level Instructions F110 (WSH
Page 514:
High−level Instructions F112 (WBS
Page 518:
High−level Instructions F115 (FIF
Page 524:
High−level Instructions F117 (FIF
Page 531 and 532:
F118 (UDC) Outline Sets the UP/DOWN
Page 533 and 534:
Page 537 and 538:
Page 540:
High−level Instructions F121 (ROL
Page 544:
High−level Instructions F123 (RCL
Page 548:
High−level Instructions F126 (DRO
Page 552:
High−level Instructions F128 (DRC
Page 556:
High−level Instructions F131 (BTR
Page 560:
High−level Instructions F133 (BTT
Page 564:
High−level Instructions F136 (DBC
Page 567 and 568:
High−level Instructions When the
Page 569:
F138 High−level Instructions Outl
Page 572:
Page 575 and 576:
F141 (CLC) P141 (PCLC) High−level
Page 577 and 578:
Precautions during programming The
Page 579 and 580:
FP0/FP0R/FP−e/FPΣ/FP−X Availab
Page 581 and 582:
FP2/FP2SH/FP10SH High−level Instr
Page 584 and 585:
High−level Instructions Program a
Page 586 and 587:
High−level Instructions Setting t
Page 588 and 589:
High−level Instructions Operation
Page 591 and 592:
FP2/FP2SH/FP10SH Preparation of tra
Page 593 and 594:
Page 595 and 596:
FP2/FP2SH/FP10SH Preparation of rec
Page 597 and 598:
Page 599 and 600:
FPΣ/FP−X/FP0R F145 (SEND) Data s
Page 601 and 602:
FPΣ/FP−X/FP0R High−level Instr
Page 603 and 604:
FPΣ/FP−X/FP0R F145 (SEND) Data s
Page 607 and 608:
Page 609 and 610:
FPΣ/FP−X/FP0R F145 (SEND) High
Page 611 and 612:
Page 613 and 614:
Page 615:
2 Example of bit unit transmission
Page 618 and 619:
High−level Instructions Sending d
Page 620 and 621:
High−level Instructions (1) Speci
Page 622 and 623:
High−level Instructions In this e
Page 624 and 625:
High−level Instructions F146 (REC
Page 626 and 627:
Page 628 and 629:
Page 630 and 631:
Page 632 and 633:
High−level Instructions Command 0
Page 634 and 635:
High−level Instructions The SEND
Page 636 and 637:
High−level Instructions Specifica
Page 638 and 639:
High−level Instructions Command 0
Page 640 and 641:
Page 642 and 643:
High−level Instructions Specifyin
Page 644 and 645:
High−level Instructions Sending d
Page 646 and 647:
High−level Instructions (1) Speci
Page 648 and 649:
High−level Instructions In this e
Page 650 and 651:
High−level Instructions F147 (PR)
Page 653 and 654:
Time chart Signal of output unit AS
Page 656 and 657:
High−level Instructions F149 (MSG
Page 658 and 659:
High−level Instructions With the
Page 661 and 662:
Specifying S1 Intelligent unit with
Page 664 and 665:
Page 667 and 668:
Page 669:
F153 (RMWT) Data write into MEWNET-
Page 672 and 673:
Page 674 and 675:
High−level Instructions Sampling
Page 676 and 677:
High−level Instructions Sampling
Page 678:
Page 681:
Page 684:
High−level Instructions F159 (MTR
Page 687 and 688:
Page 689 and 690:
Page 691 and 692:
FPΣ/FP−X/FP0R Notes High−level
Page 693 and 694:
FP2/FP2SH High−level Instructions
Page 697 and 698:
FP2/FP2SH High−level Instructions
Page 699:
F160 (DSQR) P160 (PDSQR) High−lev
Page 703 and 704:
FP0/FPΣ/FP−X/FP0R Program exampl
Page 705 and 706:
FP0/FPΣ/FP−X/FP0R Program exampl
Page 707:
FP0/FP−e/FPΣ/FP−X/FP0R High−
Page 710 and 711:
High−level Instructions Program e
Page 712 and 713:
Page 715 and 716:
FP0/FP−e/FPΣ/FP−X/FP0R Program
Page 717 and 718:
FP0/FP−e/FPΣ/FP−X/FP0R For FP
Page 719 and 720:
FP0R High−level Instructions To p
Page 721 and 722:
FP0R *1: Specification of high−sp
Page 723:
FP0R Explanation of program operati
Page 726:
High−level Instructions High−sp
Page 729:
FP0R Possible specification range f
Page 732:
High−level Instructions Example o
Page 735:
High−speed counter control flag v
Page 738:
High−level Instructions Possible
Page 741:
FP0R Example of target value match
Page 744:
Page 748:
Page 752:
High−level Instructions 5 F169(PL
Page 757 and 758:
FPΣ/FP−X 5 F171(SPDH) High−lev
Page 759:
FPΣ/FP−X Operation modes Increme
Page 763 and 764:
FPΣ/FP−X For FP−X Tr type Chan
Page 766:
High−level Instructions (*4): Dev
Page 769 and 770:
FP0R High−level Instructions The
Page 771 and 772:
FP0R High−level Instructions Chan
Page 773:
FP0R High−level Instructions Data
Page 776 and 777:
High−level Instructions Image of
Page 778:
High−level Instructions Assignmen
Page 781 and 782:
FP0R High−level Instructions The
Page 783:
FP0R Assignment of control code (Sp
Page 786:
High−level Instructions For FP−
Page 790 and 791:
Page 793 and 794:
FPΣ/FP−X F173(PWMH) High−level
Page 796 and 797:
High−level Instructions For FP0R
Page 798:
High−level Instructions For FP−
Page 802 and 803:
High−level Instructions 5 F174(SP
Page 804:
High−level Instructions *1: Assig
Page 807:
FPΣ/FP−X High−level Instructio
Page 811 and 812:
FPΣ C32T2/FP−X High−level Inst
Page 813 and 814:
FP0R Table of areas used FP0R Pulse
Page 815:
FP0R High−level Instructions *2:
Page 820 and 821:
High−level Instructions (*3): Tar
Page 822 and 823:
High−level Instructions Table of
Page 825 and 826:
FP0R 5 F178(PLSM) Input pulse measu
Page 827:
FP0R A maximum of approx. 174.7 ms
Page 831:
FP-e S2+1: Second word Specifies th
Page 835 and 836:
5 F183(DSTM) High−level Instructi
Page 837 and 838:
High−level Instructions 3 If the
Page 839:
F190 (MV3) P190 (PMV3) High−level
Page 843:
F215 (DAND) 32-bit data AND P215 (P
Page 847:
F217(DXOR) P217(PDXOR) High−level
Page 851:
F219(DUNI) P219(PDUNI) High−level
Page 854:
Page 862 and 863:
Page 865:
F241(LINE) P241(PLINE) High−level
Page 868 and 869:
Page 872 and 873:
High−level Instructions 5 F251(AT
Page 874 and 875:
High−level Instructions Conversio
Page 876 and 877:
High−level Instructions Particula
Page 878 and 879:
Page 880 and 881:
High−level Instructions How data
Page 883:
F258 (SADD) P258(PSADD) High−leve
Page 887 and 888:
F260 (SSRC) P260(PSSRC) High−leve
Page 889:
High−level Instructions F261 (RIG
Page 893:
F263 (MIDR) P263(PMIDR) High−leve
Page 897:
F265 (SREP) P265(PSREP) High−leve
Page 901:
F271(DMAX) Maximum value search in
Page 905:
F273 (DMIN) Minimum value search in
Page 909:
F276 High−level Instructions Outl
Page 913:
F278(DSORT) Sort data in 32-bit dat
Page 917:
F283 (DSCAL) Scaling of 32−bit da
Page 921:
F285(LIMT) P285(PLIMT) High−level
Page 925:
F287(BAND) P287(PBAND) High−level
Page 929:
F289(ZONE) P289(PZONE) High−level
Page 933:
F300(BSIN) P300(PBSIN) High−level
Page 937:
F302(BTAN) P302(PBTAN) High−level
Page 941:
F304(BACOS) BCD type Arccosine oper
Page 945:
F309(FMV) P309(PFMV) High−level I
Page 949:
F311 (F−) P311 (PF−) High−lev
Page 953:
F313(F%) P313(PF%) High−level Ins
Page 957:
F315(COS) P315(PCOS) High−level I
Page 961:
F317(ASIN) P317(PASIN) High−level
Page 965:
F319(ATAN) P319(PATAN) High−level
Page 969:
F321(EXP) P321(PEXP) High−level I
Page 973:
F323(PWR) P323(PPWR) High−level I
Page 977:
F325(FLT) P325(PFLT) High−level I
Page 981:
F327(INT) P327(PINT) High−level I
Page 985:
High−level Instructions F329(FIX)
Page 989:
High−level Instructions F331(ROFF
Page 993:
High−level Instructions F333(FINT
Page 997:
F335(F+/−) Floating point real nu
Page 1001:
High−level Instructions F337(RAD)
Page 1005:
F345(FCMP) P345(PFCMP) High−level
Page 1009:
F347(FLIMT) P347(PFLIMT) High−lev
Page 1013:
F349(FZONE) P349(PFZONE) Outline Th
Page 1017:
Outline Searches for a minimum valu
Page 1021:
High−level Instructions F353(FSOR
Page 1025:
5 F355(PID) Outline This instructio
Page 1028 and 1029:
High−level Instructions 6 Output
Page 1030:
High−level Instructions Operation
Page 1033 and 1034:
High−level Instructions General e
Page 1035 and 1036:
High−level Instructions Note) The
Page 1037 and 1038:
High−level Instructions 2−1: Au
Page 1039 and 1040:
Page 1042:
High−level Instructions F374(DDTR
Page 1046:
High−level Instructions F411 (CHG
Page 1051 and 1052:
F416(PBFL) P416(PPBFL) High−level
Page 1053 and 1054:
Chapter 4 Precautions Concerning Pr
Page 1055 and 1056:
4.1 Changing the Set Value of Timer
Page 1057 and 1058:
Page 1059 and 1060:
Page 1061 and 1062:
4.2 Use of Duplicated Output 4.2.2
Page 1063 and 1064:
4.3 Leading Edge Detection Method P
Page 1065 and 1066:
4.3.3 Precautions when Using a Cont
Page 1067 and 1068:
4.4 Operation Errors 4.4.1 Operatio
Page 1069 and 1070:
4.4.3 Dealing with Operation Errors
Page 1071 and 1072:
4.5 Handling Index Registers 4.5.1
Page 1073 and 1074:
4.5.3 Example of Using an Index Reg
Page 1075 and 1076:
4.5 Handling Index Registers Inputt
Page 1077 and 1078:
4.6 Handling BCD Data 4.6.1 BCD Dat
Page 1079 and 1080:
4.7 Precautions for Programming Pro
Page 1081 and 1082:
4.8.2 Cases Where Rewriting During
Page 1083:
4.8.3 Procedures and Operation of R
Page 1086 and 1087:
Precautions Concerning Programs 4.1
Page 1088 and 1089:
Precautions Concerning Programs 4-3
Page 1090 and 1091:
5-2 Appendix ......................
Page 1092 and 1093:
Checking and changing the set value
Page 1094 and 1095:
2. Hold types and non-hold type set
Page 1096 and 1097:
FP0 5-8 Item Time setting Input set
Page 1098 and 1099:
FP0 5-10 Item Input setting Address
Page 1100 and 1101:
FP0 5-12 Item Tool port setting Too
Page 1102 and 1103:
5-14 Item Address 417 418 Name Star
Page 1104 and 1105:
FP0 Address Name Description R9013
Page 1106 and 1107:
5.1.3 Table of Special Data Registe
Page 1108 and 1109:
Address FP0 C10, FP0 T32 C14, C16,
Page 1110 and 1111:
Page 1112 and 1113:
Page 1114 and 1115:
Page 1116 and 1117:
5.1.4 Table of System Registers for
Page 1118 and 1119:
FP-e Interruptinput 5-30 No. Name 4
Page 1120 and 1121:
5.1.5 Table of Special Internal Rel
Page 1122 and 1123:
FP-e Relay No. Name Description R90
Page 1124 and 1125:
5.1.6 Table of Special Data Registe
Page 1126 and 1127:
FP-e (A: Available, N/A: Not availa
Page 1128 and 1129:
Page 1130 and 1131:
Page 1132 and 1133:
PC (PLC) link 0 setting PC (PLC) li
Page 1134 and 1135:
Transistor type C16 or over 5-46 Co
Page 1136 and 1137:
5-48 Item Controller input time con
Page 1138 and 1139:
WR901 FP0R Relay No. Name Descripti
Page 1140 and 1141:
Page 1142 and 1143:
Page 1144 and 1145:
Page 1146 and 1147:
WR910 FP0R Relay No. R9110 HSC-CH0
Page 1148 and 1149:
Address Name Description DT90014 5-
Page 1150 and 1151:
Address Name Description DT90037 DT
Page 1152 and 1153:
Page 1154 and 1155:
Page 1156 and 1157:
Page 1158 and 1159:
Address Name Description 5-70 FP0R
Page 1160 and 1161:
Page 1162 and 1163:
FP0R (A: Available, N/A: Not availa
Page 1164 and 1165:
Address Name Description 5-76 FP0R
Page 1166 and 1167:
5.1.10 Table of System Registers fo
Page 1168 and 1169:
Highspeedcounter 5-80 No. Name 400
Page 1170 and 1171:
Tool port setting COM 1 port settin
Page 1172 and 1173:
5.1.11 Table of Special Internal Re
Page 1174 and 1175:
WR902 Relay No. Name Description R9
Page 1176 and 1177:
Page 1178 and 1179:
Page 1180 and 1181:
Page 1182 and 1183:
(A: Available, N/A: Not available)
Page 1184 and 1185:
Page 1186 and 1187:
Page 1188 and 1189:
Page 1190 and 1191:
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FP-X Item PC (PLC) link W0-0 settin
Page 1198 and 1199:
FP-X Tr type Add- Item ress Contro
Page 1200 and 1201:
Note1) If the operation mode is set
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FP-X Ry type Add- Item ress Interr
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FP-X Item Address Name Default valu
Page 1206 and 1207:
FP-X Item Controller input time con
Page 1208 and 1209:
WR901 FP-X Address Name Description
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5.1.15 Table of Special Data Regist
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Address Name Description DT90052 5-
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Address Name Description 5-142 FP-X
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FP-X (A: Available, N/A: Not availa
Page 1236 and 1237:
FP-X Tr type FP-X (A: Available, N/
Page 1238 and 1239:
FP-X Ry type FP-X (A: Available, N/
Page 1240 and 1241:
FP2 (32K) Users memory capacity : 3
Page 1242 and 1243:
For the FP2SH/FP10SH, the index reg
Page 1244 and 1245:
Table of system registers for FP2/F
Page 1246 and 1247:
FP2/FP2SH/FP10SH Item Hold/ Nonhold
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FP2/FP2SH/FP10SH Item Address Name
Page 1250 and 1251:
FP2/FP2SH/FP10SH Add- Item ress Too
Page 1252 and 1253:
Example 2: When system register 4 s
Page 1254 and 1255:
FP1/FP-M/FP2/FP2SH/FP10SH/FP3 Addre
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5.1.18 Special Data Registers for F
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FP2/FP2SH/FP3/FP10SH (A: Available,
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5-202 Name Boolean Symbol Descripti
Page 1292 and 1293:
End 5-204 Name Boolean Symbol Descr
Page 1294 and 1295:
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Number 5-210 Name Boo-lean Ope- ran
Page 1300 and 1301:
Number F63 P63 5-212 Name 32-bit da
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Number F94 P94 F95 P95 F96 P96 F97
Page 1304 and 1305:
Num -ber F136 P136 5-216 Name Numbe
Page 1306 and 1307:
Number F167 F168 F169 5-218 Name Hi
Page 1308 and 1309:
Number 5-220 Name Boolean Operand D
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Number F235 P235 F236 P236 F237 P23
Page 1312 and 1313:
Number F286 P286 F287 P287 F288 P28
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Number F329 P329 F330 P330 F331 P33
Page 1316 and 1317:
Number 5-228 Name Boolean Ope- rand
Page 1318 and 1319:
-Self-diagnostic Error This error o
Page 1320 and 1321:
Error code E6 E7 E8 E9 E10 5-232 Na
Page 1322 and 1323:
Error code E29 E30 E31 E32 E33 E34
Page 1324 and 1325:
Error code E41 E42 5-236 Name Intel
Page 1326 and 1327:
Error code E46 E47 E49 E50 5-238 Na
Page 1328 and 1329:
� Table of MEWTOCOL-COM Communica
Page 1330 and 1331:
5.5 MEWTOCOL-COM Communication Comm
Page 1332 and 1333:
5.7 ASCII Codes 5-244 CTi Automatio
Page 1334 and 1335:
Record of changes Manual No. Date D
Page 1336:
CTi Automation - Phone: 800.894.041
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Panasonic FP Series PLC Programming Manual - CTi Automation

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