Technical Design Report Super Fragment Separator

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DRAFT state-dependent tolerance band control). The FEC is a processor board with one operating system (e.g. Linux). Time critical functions are implemented in FPGA technology. A dedicated parallel bus is defined as an interface to electronics boards of devices. The FEC provides and features a device-implemented function generator (FG) for equipment that needs to be controlled by time-dependent functions (ramps). The FG provides linear and quadratic interpolation at 1 MHz data rate between base points with 24 bit output resolution. - Programmable Logic Controllers (PLCs) are increasingly used for controlling industrial equipment. This type of controller can be chosen when the process is not synchronized to accelerator timing and when sampling periods are longer than ~100 ms. Being highly reliable, cost effective and easy to program via standard high-level languages, PLCs are foreseen to manage and control vacuum components, machine cryogenics, rf monitoring, personal safety system, interlocks, etc. 2.4.A2.3 Timing System The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. An important consideration in the design of the FAIR facility is a high degree of truly parallel operation of the different machines to facilitate the different research programs. The primary task of the timing system is to trigger and synchronize equipment actions, timed according to the accelerator cycles, and to synchronize devices which have to operate simultaneously. The timing system must handle 20 ms cycles (present UNILAC) as well as machine cycles and manipulation phases in the order of several seconds for the synchrotrons and up to several hours for the storage rings. Careful analysis of machine requirements have resulted in a two staged timing solution: A general machine timing (GMT) system will be implemented as an event based system. It will provide concurrency of events by transmission time compensation, event resolution of at least 1 µs and event separation of follow-up events of better than 10 µs as well as absolute timestamps. For high-precision synchronization beyond the parameters of the GMT (e.g. distributed rf- and kicker-control, bunch-to-bucket transfers, time-of-flight measurements) a bunch timing system (BuTiS) will distribute high precision clock trains (100 kHz, 200 MHz) on carefully selected fibers, properly delayed and stabilized to compensate propagation delays to every BuTiS end-point and achieve a timing jitter of no more than 200 ps. The GMT will broadcast centrally generated timing telegrams in a star topology. Distribution is based on Gigabit Ethernet transmission technology using fiber and Copper transmission lines. Transmission rate will be 1 MHz. A dedicated bi-directional timing network is used with active switches and fan-out modules to distribute the timing telegrams to an array of event receivers (EVR). Upstream signal propagation allows measuring the fiber and transmission delays with sub-microsecond precision. The emerging standard Precision Time Protocol (PTP) as defined in IEEE 1588 is foreseen to be used to synchronize distributed clocks in the timing network and compensate for transmission delays. A key requirement of the FAIR control system is the need of an absolute timing reference to timestamp the accelerator data. UTC will be adopted as the standard of date and time for all FAIR accelerators as it is the basis for the worldwide system of civil time. The source of date and time for 162
DRAFT all FAIR accelerators will be a Global Positioning System (GPS) time receiver to which the GMT event transmission and the BuTiS clock trains will be synchronized and phase locked. The outline of the GMT system is shown in Figure 2.4.140. For each of the FAIR machines a dedicated timing event generator (EVG) generates all timing signals utilizing internal counters, event sequencers and hardware inputs. The EGV broadcasts information about the beam to be handled next and is pre-loaded with an event table for cycles or beam manipulation phases. Alternative event tables are supported to handle abort of beams even during run-time of a cycle. In addition to timing events other meta-information (e.g. accelerator cycle identifier, context and safe-beam flags) can be transmitted or broadcasted. A ACC A ACC B ACC C Master event generator EXP 1 EXP 2 Event generator A Event generator B Event Generator generator Generator generator C C Timing network B Event-stream concentrator Figure 2.4.140: Structure and topology of the general machine timing (GMT). A master cycle sequencer (MCS) will coordinate beams and cycles throughout the FAIR accelerators. It will orchestrate and synchronize every single machine EVG, establish a pattern of beams featuring a high level of truly parallel operation, take care of general restrictions, and will be able to handle alternative beam delivery scenarios in case of emergency or non-availability machines in the accelerator chain. The timing telegrams of all EVG and the MCS will be concentrated such that all information is available at any timing receiver in the facility. Event receivers (EVR) decode the event stream and provide hardware outputs or software interrupts based on event information. The EVR has a synchronized local clock such that data can be time-stamped to the microsecond level. EVR shall be available in all relevant form factors such as VME, PMC, cPCI as well as an integrated module for the FAIR standard device controller. Propagation and transmission delays will be compensated in the EVR in order to achieve synchronous event reception all over the facility. The upstream channel of the GMT system can be used to synchronously and deterministically exchange short telegrams between dedicated devices as is needed e.g. for bunch-to-bucket transfer. It is being investigated whether the upstream communication will be also used to gather interlock and safety-critical state information from the device level. C 163
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DRAFT Technical Design Report Super
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Preface DRAFT The International Fac
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Contents DRAFT 2.4.1 System Design
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DRAFT Table 2.4.1: Parameters of th
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DRAFT degrader stage which provides
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Pre-Separator DRAFT In order to acc
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DRAFT coupling coefficients is give
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DRAFT Table 2.4.3: First-order matr
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DRAFT Main-Separator to the high-en
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DRAFT Table 2.4.5: Transmission T o
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DRAFT Figure 2.4.15: Resolution nec
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DRAFT Figure 2.4.17: Spectrometer m
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DRAFT Table 2.4.8: Design parameter
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DRAFT Figure 2.4.20: Side view of t
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DRAFT Figure 2.4.23: Coil cross-sec
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DRAFT Figure 2.4.25: Flux density d
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Figure 2.4.29: Assembly of two half
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DRAFT Figure 2.4.31: Cross section
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Figure 2.4.34: Sketch of the therma
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DRAFT To fulfill the required field
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DRAFT Figure 2.4.39: The 3D model o
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DRAFT Pole radius mm 100 210 250 25
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DRAFT Figure 2.4.43: Front, side, a
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∆B/B 0.0 DRAFT Figure 2.4.46: Ave
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DRAFT Figure 2.4.50: 3D model of th
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DRAFT Figure 2.4.54 and Table 2.4.1
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DRAFT 2.4.2.3.1 Radiation resistant
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DRAFT The water-cooled radiator con
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DRAFT Table 2.4.17: Coil parameters
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DRAFT Figure 2.4.63: Field distribu
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DRAFT Figure 2.4.65: Multiplet conf
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DRAFT Table 2.4.21 summarizes the r
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2.4.2.6 Current Leads DRAFT The cur
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DRAFT Table 2.4.23 presents the lis
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2.4.3 Power Converters DRAFT The po
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SCR structure DRAFT Regarding high
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a) Chopper circuit 3x400V b) Half b
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External Control System Data transf
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DRAFT Figure 2.4.77: Arrangement of
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SuperFRS Power Supply Effective App
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DRAFT The locations for the differe
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DRAFT Figure 2.4.80: Beam induced f
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DRAFT Figure 2.4.82: Two hybrids ca
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DRAFT Figure 2.4.84: Left panel: TP
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DRAFT extracted beams. Its use for
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Time of Flight measurement DRAFT At
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DRAFT together. Another option is t
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DRAFT Figure 2.4.88: Pillow seal po
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DRAFT Figure 2.4.90: Setup at the m
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DRAFT An overview of the total vacu
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2.4.7.4 Appendix - Technical Drawin
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DRAFT Figure 2.4.96: Diagnostic cha
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DRAFT Figure 2.4.98: Diagnostic cha
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DRAFT Figure 2.4.100: Diagnostic ch
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2.4.8 Particles Sources n/a 2.4.9 E
Page 111 and 112: DRAFT movable, but BC3 must be able
Page 113 and 114: DRAFT Figure 2.4.106: Spot size of
Page 115 and 116: dE/dV [kJ/cm 3 ] 3 2 1 DRAFT includ
Page 117 and 118: 2.4.11.1.4 Design of the beam catch
Page 119 and 120: DRAFT Figure 2.4.110: Calculated eq
Page 121 and 122: DRAFT Figure 2.4.112: Location of b
Page 123 and 124: DRAFT the carbon. Again mainly 7 Be
Page 125 and 126: DRAFT maintenance of the carbon or
Page 127 and 128: DRAFT material) and received the an
Page 129 and 130: DRAFT commissioned in February 2005
Page 131 and 132: DRAFT Table 2.4.28: Typical beam pa
Page 133 and 134: DRAFT Figure 2.4.120: Surface tempe
Page 135 and 136: DRAFT Figure 2.4.123: Schematic lay
Page 137 and 138: DRAFT These results show that the i
Page 139 and 140: DRAFT Like in the case of the rotat
Page 141 and 142: DRAFT Figure 2.4.126: Left: Schemat
Page 145 and 146: DRAFT Figure 2.4.129: Flow scheme o
Page 147 and 148: DRAFT Since the weight of the cold
Page 149 and 150: DRAFT With the cooling capacity spe
Page 151 and 152: DRAFT Figure 2.4.134: Schematic of
Page 153 and 154: S1 (a) Figure 2.4.136: (a) Zoom of
Page 155 and 156: 2.4.A Appendix DRAFT The appendix o
Page 157 and 158: DRAFT experiment the EXL community
Page 159 and 160: 2.4.A1.3 Slow control and monitorin
Page 161: DRAFT Figure 2.4.139: Architecture
Page 165 and 166: DRAFT source tier are split in two
Page 167 and 168: DRAFT coupled from the ACS which is
Page 169 and 170: DRAFT 2.4.A3.2 Work packages: descr
Page 171 and 172: 2.4.A3.2.4 Instrumentation Measurin
Page 173 and 174: DRAFT this, planning a network layo
Page 175 and 176: DRAFT 2.4.A3.3 Machine characterist
Page 177 and 178: DRAFT installation of RALF was done
Page 179 and 180: DRAFT The double ring synchrotrons,
Page 181 and 182: DRAFT The first refrigerator, Cryo1
Page 183 and 184: DRAFT shield 28874 + 25 g/s 22 bar
Page 185 and 186: LHe storage Helium storage Helium s
Page 187 and 188: Cryo2 Cryo3 CryoST DB 3 DRAFT Compr
Page 189 and 190: DRAFT The cold connection will be m
Page 191 and 192: DRAFT Measurements planned for each
Page 193 and 194: DRAFT For magnets with less stringe
Page 195 and 196: DRAFT The value, parameters, condit
Page 197 and 198: DRAFT 3. Geometry tests For cryosta
Page 199 and 200: DRAFT The Quench Heaters Tests has
Page 201 and 202: DRAFT Figure 2.4.159: Photograph of
Page 203 and 204: DRAFT The field properties listed i
Page 205 and 206: DRAFT Figure 2.4.161: Schematic vie
Page 207 and 208: DRAFT Figure 2.4.162: Scheme of the
Page 209 and 210: 2.4.A6.2.2 Shielding against direct
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DRAFT Figure 2.4.165: An iron beam
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DRAFT In a side view the flux of pr
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DRAFT catcher 7 Be, 22 Na and 24 Na
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DRAFT at the FRS (2·10 9 /spill as
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DRAFT [1] H. Geissel et al., Nucl.
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DRAFT [74] A. Fabich and J. Lettry,
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