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[17] A. Odabasioglu, M. Celik, and L. Pileggi. PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm. IEEEConference on Computer-Aided Design, San Jose, CA, 1997 [18] L. Pernebo and L. M. Silverman. Model Reduction via Balanced State Space Representations. IEEE Trans. on Automatic Control, Vol. 27, No. 2:382–387, April 1982 [19] L. T. Pillage and R. A. Rohrer. Asymptotic Waveform Evaluation for TimingAnalysis. IEEE Trans. CAD, 9(4):352–366, April 1990 [20] L. M. Silveira,M. Kamon, I. Elfadel, and J. K.White. A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits. pp.288–294, ICCAD, San Jose, CA. Nov. 1996 [21] G. Starke. Optimal Alternating Direction Implicit Parameters for Nonsymmetric Systems of Linear Equations. Siam J. Numer. Anal, Vol. 28, No. 5, pp. 1431-1445, Oct. 1991 [22] E. L. Wachspress. The ADI Model Problem. Windsor, CA, 1995
DAC'99, pages 7-12 Error Bounded Padé Approximation via Bilinear Conformal Transformation Chung-Ping Chen 1 and D. F. Wong 2 1 Strategic CAD Labs, Intel Corp., Hillsboro, Oregon 97124. 2 Department of Computer Sciences, University of Texas at Austin, Austin, Texas 78712. Abstract Since Asymptotic Waveform Evaluation (AWE) was introduced in [5], many interconnect model order reduction methods via Padé approximation have been proposed. Although the stability and precision of model reduction methods have been greatly improved, the following important question has not been answered: "What is the error bound in the time domain?". This problem is mainly caused by the "gap" between the frequency domain and the time domain, i.e. a good approximated transfer function in the frequency domain may not be a good approximation in the time domain. All of the existing methods approximate the transfer function directly in the frequency domain and hence can not provide error bounds in the time domain. In this paper, we present new moment matching methods which can provide guaranteed error bounds in the time domain. Our methods are based on the classic work by Teasdale in [1] which performs Padé approximation in a transformed domain by the bilinear conformal transformation s = 1-z/1+z. References [1] R.D. Teasdale, “Time domain approximation by use of Padé approximants", IRE Convention Record, Vol.1, pt.5 pp. 89-94, 1953. [2] R. S. Tsay, “An exact zero-skew clock routing algorithm" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, February 1993. [3] P. Feldmann, R. W. Freund, “Efficient linear circuit analysis by Padé approximation via the Lanczos process", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, May 1995. [4] L. M. Silveira, M. Kamon, I. Elfadel, and J. White, “A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits" Proc. ICCAD, 1996. [5] L. T. Pillege, and R. A. Rohrer “Asymptotic wave-form evaluation for timing analysis", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, April, 1990. [6] E. Chiprout, and M. S. Nakhla, “Analysis of interconnect networks using complex frequency hopping", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, February, 1995. [7] G. H. Golub and C. F. Van Loan, “Matrix computations", The Johns Hopkins University Press, Baltimore, Maryland, 1983. [8] K.J. Kerns, I.L. Wemple, and A.T. Yang, “Stable and Efficient reduction of large, multiport RC networks by pole analysis via congruence transformations", 33th ACM/IEEE DAC, 1996. [9] A. Odabasioglu, M. Celik, and L. Pilleggi, “PRIMA: Passive reduced-order interconnect macromodeling algorithm", Proc. ICCAD, 1998. [10] P. Rabiei, and M. Pedram, “Model Order Reduction for Large Circuit Using Balance Truncation", Proc. ASP- DAC, 1999. [11] Qingjian Yu, Janet M. Wang, and Ernest S. Kuh, “Multipoint Moment Matching Model For Multiport Distributed Interconnect Networks", Proc. ICCAD, 1998. [12] I.M. Elfadel, and D.D. Ling, “A Block Rational Arnoldi Algorithm for Multipoint Pawwive Model-Order Reduction of Multiport RLC Networks", Proc. ICCAD, 1997. [13] T.V. Nguyen, and J. Li, “Multipoint Padé Approximation Using a Rational Block Lanczos Algorithm", Proc. ICCAD, 1997. [14] K. Gallivan, E. Grimme, and P. Wan Dooren, “Asymptotic waveform evaluation via a Lanczos method", App. Math. Lett., vol. 7, pp. 75-80, 1994.
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Page 9 and 10: [16] F. Somenzi. CUDD: CU Decision
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[17] A. Odabasioglu, M. Celik, L.T.
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DAC'99, pages 207-212 Robust Ration
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DAC'99, pages 219-224 Soft Scheduli
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[22] M.A. Perkowski, “A New Repre
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[15] M. C. Papaefthymiou and K. H.
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[14] S. Malik, E. M. Sentovich, R.
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DAC'99, pages 247-252 Kernel-Based
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DAC'99, pages 253-257 Customized In
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DAC'99, pages 260-261 Panel: Functi
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DAC'99, pages 268-273 An O-Tree Rep
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DAC'99, pages 280-285 Genetic List
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[19] M. Potkonjak and J. Rabaey,
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DAC'99, pages 296-299 A Reordering
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DAC'99, pages 306-311 Improving Sym
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DAC'99, pages 317-320 Symbolic Mode
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DAC'99, pages 327-332 Global Multim
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[19] G. Karypis and V. Kumar. Multi
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[15] S. Dutt and W. Deng, “VLSI C
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[15] B. Landman and R. Russo, “On
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DAC'99, pages 367-372 An a-approxim
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DAC'99, pages 379-384 Automated Pha
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DAC'99, pages 385-390 Enhancing Sim
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DAC'99, pages 397-401 Exploiting Po
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DAC'99, pages 402-407 Formal Verifi
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DAC'99, pages 436-441 Stand-by Powe
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DAC'99, pages 446-451 A Practical G
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[15] A. R. Conn, L. N. Vicente, and
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DAC'99, pages 466-471 Wave Steering
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[WM89] W.S. Wong, and R.J.T. Morris
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[18] L. P. P. P. van Ginneken, “B
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[18] C.M. Kyung et al., “HK386: A
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[14] A. Casotto, ed., Octtools-5.1
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DAC'99, pages 502-506 Noise-aware R
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DAC'99, pages 511-516 ECL: A Specif
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DAC'99, pages 523-528 Vex - A CAD t
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DAC'99, pages 535-536 Panel: MEMS C
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DAC'99, pages 543-548 Efficient Cap
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[14] K. J. Kerns and A. T. Yang,
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[17] C.-H. Hwang and A. Wu, “A Pr
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DAC'99, pages 568-573 Low-Power Beh
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DAC'99, pages 574-579 A Methodology
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DAC'99, pages 586-591 Microprocesso
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[16] J. P. Bergmann and M. A. Horow
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DAC'99, pages 604-609 Engineering C
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DAC'99, pages 610-615 Reconfigurabl
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[16] R. Niemann and P. Marwedel,
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DAC'99, pages 629-634 Multi-Time Si
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DAC'99, pages 635-640 Efficient com
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DAC'99, pages 647-652 Test Generati
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[20] I. Pomeranz and S.M. Reddy “
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DAC'99, pages 672-677 A Two-State M
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DAC'99, pages 684-690 A Massively-P
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DAC'99, pages 691-696 Dynamic Fault
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[18] A.W. Roscoe, C. A. R. Hoare.
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DAC'99, pages 709-714 SOI Digital C
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DAC'99, pages 766-771 A Floorplan-b
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[18] Ramesh Harjani and Tom Lee,
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DAC'99, pages 794-797 Java Driven C
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DAC'99, pages 799-804 Subwavelength
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DAC'99, pages 805-810 Synthesis of
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DAC'99, pages 827-830 SOFTWARE ENVI
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[18] B. Schneier, 1963- Applied Cry
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DAC'99, pages 843-848 Effective Ite
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DAC'99, pages 849-854 Behavioral Sy
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DAC'99, pages 861-866 Design Consid
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DAC'99, pages 867-872 Cycle-Accurat
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DAC'99, pages 879-884 A CAD Tool fo
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[18] W. R. Hunter, “Self-consiste
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DAC'99, pages 898-903 A Framework f
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DAC'99, pages 910-914 Interconnect
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DAC'99, pages 915-920 IC Analyses I
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DAC'99, pages 927-932 A Methodology
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DAC'99, pages 939-944 Exploiting In
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[20] S. Kirkpatrick, C.D. Gelatt, M
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[16] D. Leenaerts, “Application o
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DAC'99, pages 964-969 Cycle and Pha
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DAC'99, pages 970-975 A Study in Co
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[16] H. Sarin, and A. McNelly, “A
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[15] H.M. Greenhouse, “Design of
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DAC'99, pages 994-998 Optimization
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