DAC'99, pages 33-36 Optimization-Intensive Watermarking Techniques <strong>for</strong> Decision Problems Gang Qu, Jennifer L. Wong, and Miodrag Potkonjak Computer Science Department, University of Cali<strong>for</strong>nia, Los <strong>An</strong>geles, CA 90095 Abstract Recently, a number of watermarking-based intellectual property protection techniques have been proposed. Although they have been applied to different stages in the design process and have a great variety of technical and theoretical features, all of them share two common properties: they all have been applied solely to optimization problems and do not involve any optimization during the watermarking process. In this paper, we propose the first set of optimization-intensive watermarking techniques <strong>for</strong> decision problems. In particular, we demonstrate how one can select a subset of superimposed water-marking constraints so that the uniqueness of the signature and the likelihood of satisfying an instance of the satisfiability problem are simultaneously maximized. We have developed three watermarking SAT techniques: adding clauses, deleting literals, push-out and pull-back. Each technique targets different types of signature-induced constraint superimposition on an instance of the SAT problem. In addition to comprehensive experimental validation, we theoretically analyze the potentials and limitations of the proposed watermarking techniques. Furthermore, we analyze the three proposed optimization-intensive watermarking SAT techniques in terms of their suitability <strong>for</strong> copy detection. References [1] P. Cheeseman, B. Kanefsky, andW.M. Taylor. Where the Really Hard Problems Are. Twelveth International Joint Conference on Artificial Intelligence, pp. 331- 337, 1991. [2] J. Franco, and Y.C. Ho. Probabilistic Per<strong>for</strong>mance of A Heuristic <strong>for</strong> the Satisfiability Problem. Discrete Applied Mathematics, Vol. 22, pp. 35-51, 1988. [3] A.B. Kahng, J. Lach,W.H. Magione-Smith, S. Mantik, I.L. Markov, M. Potkonjak, P. Tucker, H. Wang and G. Wolfe. Watermarking Techniques <strong>for</strong> Intellectual Property Protection. 35th Design Automation Conference Proceedings, pp. 776-781, 1998. [4] G. Qu, and M. Potkonjak. <strong>An</strong>alysis of Watermarking Techniques <strong>for</strong> Graph Coloring Problem. IEEE/ACM International Conference on Computer Aided Design Proceedings, 1998. [5] B.Selman, H.Kautz, and D.McAllester. Ten Challenges in Propositional Reasoning and Search. Proceedings of the 15th International Joint Conference on Artificial Intelligence (IJCAI-97) pp. 50-54, 1997. [6] J.P.M. Silva, and K.A. Sakallah. GRASP— A New Search Algorithm <strong>for</strong> Satisfiability. Proceedings of ICCAD- 96, pp. 220-227, 1996. [7] http://dimacs.rutgers.edu/ [8] http://aida.intellektik.in<strong>for</strong>matik.th-darmstadt.de/ hoos/SATLIB/
DAC'99, pages 37-42 <strong>Efficient</strong> Algorithms <strong>for</strong> Optimum Cycle Mean and Optimum Cost to Time Ratio Problems Ali Dasdan*, Sandy S. Irani and Rajesh K. Gupta *Dept. of Computer Science, University of Illinois, Urbana, IL 61801 Dept. of In<strong>for</strong>mation and Computer Science, University of Cali<strong>for</strong>nia, Irvine, CA 92697 Abstract The goal of this paper is to identify the most efficient algorithms <strong>for</strong> the optimum mean cycle and optimum cost to time ratio problems and compare them with the popular ones in the CAD community. These problems have numerous important applications in CAD, graph theory, discrete event system theory, and manufacturing systems. In particular, they are fundamental to the per<strong>for</strong>mance analysis of digital systems such as synchronous, asynchronous, data flow, and embedded real-time systems. For instance, algorithms <strong>for</strong> these problems are used to compute the cycle period of any cyclic digital system. Without loss of generality, we discuss these algorithms in the context of the minimum mean cycle problem (MCMP). We per<strong>for</strong>med a comprehensive experimental study of ten leading algorithms <strong>for</strong> MCMP. We programmed these algorithms uni<strong>for</strong>mly and efficiently. We systematically compared them on a test suite composed of random graphs as well as benchmark circuits. Above all, our results provide important insight into the per<strong>for</strong>mance of these algorithms in practice. One of the most surprising results of this paper is that Howard's algorithm, known primarily in the stochastic control community, is by far the fastest algorithm on our test suite although the only known bound on its running time is exponential. We provide two stronger bounds on its running time. References [1] Ahuja, R. K., Kodialam, M., Mishra, A. K., and Orlin, J. B. Computational investigation of maximum flow algorithms. European J. of Operational Research, 97 (1997), 509-542. [2] Ahuja, R. K., Magnanti, T. L., and Orlin, J. B. Network Flows. Prentice Hall, Upper Saddle River, NJ, USA, 1993. [3] Bacelli, F., Cohen, G., Olsder, G. J., and Quadrat, J.-P. Synchronization and Linearity. John Wiley & Sons, New York, NY, USA, 1992. [4] Burns, S. M. Per<strong>for</strong>mance analysis and optimization of asynchronous circuits. PhD thesis, Cali<strong>for</strong>nia Institute of Technology, 1991. [5] Cherkassky, B. V., Goldberg, A. V., and Radzik, T. Shortest path algorithms: Theory and experimental evaluation. In Proc. 5th ACM-SIAM Symp. on Discrete Algorithms (1994), pp. 516-525. [6] Cochet-Terrasson, J., Cohen, G., Gaubert, S., McGettrick, M., and Quadrat, J.-P. Numerical computation of spectral elements in max-plus algebra. In Proc. IFAC Conf. on Syst. Structure and Control (1998). [7] Cuninghame-Green, R. A., and Yixun, L. Maximum cycle-means of weighted digraphs. Applied Math.-JCU 11 (1996), 225-34. [8] Dasdan, A., and Gupta, R. K. Faster maximum and minimum mean cycle algorithms <strong>for</strong> system per<strong>for</strong>mance analysis. IEEE Trans. Computer-Aided Design 17, 10 (Oct. 1998). [9] Dasdan, A., Irani, S., and Gupta, R. K. <strong>An</strong> experimental study of minimum mean cycle algorithms. Tech. rep. #98-32, Univ. of Cali<strong>for</strong>nia, Irvine, July 1998. [10] Gerez, S. H., de Groot, S. M. H., and Herrmann, O. E. A polynomial-time algorithm <strong>for</strong> the computation of the iteration-period bound in recursive data-ow graphs. IEEE Trans. on Circuits and Syst.-1 39, 1 (Jan. 1992), 49-52. [11] Gondran, M., and Minoux, M. Graphs and Algorithms. John Wiley and Sons, New York, NY, USA, 1984. [12] Hartmann, M., and Orlin, J. B. Finding minimum cost to time ratio cycles with small integral transit times. Networks 23 (1993), 567-74. [13] Hulgaard, H., Burns, S. M., Amon, T., and Borriello, G. <strong>An</strong> algorithm <strong>for</strong> exact bounds on the time separation of events in concurrent systems. IEEE Trans. Comput. 44, 11 (Nov. 1995), 1306-17. [14] Ito, K., and Parhi, K. K. Determining the minimum iteration period of an algorithm. J. VLSI Signal Processing 11, 3 (Dec. 1995), 229-44.
- Page 1 and 2: DAC'99, pages 1-6 An Efficient Lyap
- Page 3 and 4: DAC'99, pages 7-12 Error Bounded Pa
- Page 5 and 6: DAC'99, pages 17-21 ENOR: Model Ord
- Page 7 and 8: [21] P. W. Purdom and C. A. Brown.
- Page 9: [16] F. Somenzi. CUDD: CU Decision
- Page 13 and 14: DAC'99, page 43 IP-Based Design Met
- Page 15 and 16: [11] CHOU, P., ORTEGA, R., AND BORR
- Page 17 and 18: DAC'99, pages 56-61 Common-Case Com
- Page 19 and 20: DAC'99, pages 62-67 Layout Techniqu
- Page 21 and 22: DAC'99, pages 72-75 SYNTHESIS OF LO
- Page 23 and 24: DAC'99, pages 78-83 Reliability-Con
- Page 25 and 26: DAC'99, pages 90-95 Noise-Constrain
- Page 27 and 28: DAC'99, pages 100-103 Crosstalk Min
- Page 29 and 30: [19] P. Day and J.V. Woods. Investi
- Page 31 and 32: [74] T.E. Williams. Self-Timed Ring
- Page 33 and 34: DAC'99, pages 116-121 CAD Direction
- Page 35 and 36: DAC'99, pages 122-127 A Low Power H
- Page 37 and 38: DAC'99, pages 128-133 Synthesis of
- Page 39 and 40: [19] T. Burd and R. Brodersen, “P
- Page 41 and 42: DAC'99, pages 146-150 Distributed A
- Page 43 and 44: DAC'99, pages 157-162 The Jini Arch
- Page 45 and 46: DAC'99, pages 169-174 Functional Ve
- Page 47 and 48: 20.M. Kantrowitz and L.M. Noack,
- Page 49 and 50: DAC'99, pages 185-188 High-Level Te
- Page 51 and 52: DAC'99, pages 189-194 Developing an
- Page 53 and 54: [17] A. Odabasioglu, M. Celik, L.T.
- Page 55 and 56: DAC'99, pages 207-212 Robust Ration
- Page 57 and 58: DAC'99, pages 219-224 Soft Scheduli
- Page 59 and 60: [22] M.A. Perkowski, “A New Repre
- Page 61 and 62:
[15] M. C. Papaefthymiou and K. H.
- Page 63 and 64:
[14] S. Malik, E. M. Sentovich, R.
- Page 65 and 66:
DAC'99, pages 247-252 Kernel-Based
- Page 67 and 68:
DAC'99, pages 253-257 Customized In
- Page 69 and 70:
DAC'99, pages 260-261 Panel: Functi
- Page 71 and 72:
DAC'99, pages 268-273 An O-Tree Rep
- Page 73 and 74:
DAC'99, pages 280-285 Genetic List
- Page 75 and 76:
[19] M. Potkonjak and J. Rabaey,
- Page 77 and 78:
DAC'99, pages 296-299 A Reordering
- Page 79 and 80:
DAC'99, pages 306-311 Improving Sym
- Page 81 and 82:
DAC'99, pages 317-320 Symbolic Mode
- Page 83 and 84:
DAC'99, pages 321-326 Power Efficie
- Page 85 and 86:
DAC'99, pages 327-332 Global Multim
- Page 87 and 88:
DAC'99, pages 333-336 Implementatio
- Page 89 and 90:
DAC'99, pages 341-342 Panel: Cell L
- Page 91 and 92:
[19] G. Karypis and V. Kumar. Multi
- Page 93 and 94:
[15] S. Dutt and W. Deng, “VLSI C
- Page 95 and 96:
[15] B. Landman and R. Russo, “On
- Page 97 and 98:
DAC'99, pages 367-372 An a-approxim
- Page 99 and 100:
DAC'99, pages 379-384 Automated Pha
- Page 101 and 102:
DAC'99, pages 385-390 Enhancing Sim
- Page 103 and 104:
DAC'99, pages 391-396 Cycle-based S
- Page 105 and 106:
DAC'99, pages 397-401 Exploiting Po
- Page 107 and 108:
DAC'99, pages 402-407 Formal Verifi
- Page 109 and 110:
DAC'99, pages 414-419 A Framework f
- Page 111 and 112:
DAC'99, pages 420-424 Fast Prototyp
- Page 113 and 114:
DAC'99, page 429 Panel: Parasitic E
- Page 115 and 116:
DAC'99, pages 436-441 Stand-by Powe
- Page 117 and 118:
DAC'99, pages 446-451 A Practical G
- Page 119 and 120:
[15] A. R. Conn, L. N. Vicente, and
- Page 121 and 122:
DAC'99, pages 466-471 Wave Steering
- Page 123 and 124:
[WM89] W.S. Wong, and R.J.T. Morris
- Page 125 and 126:
[18] L. P. P. P. van Ginneken, “B
- Page 127 and 128:
[18] C.M. Kyung et al., “HK386: A
- Page 129 and 130:
[14] A. Casotto, ed., Octtools-5.1
- Page 131 and 132:
DAC'99, pages 502-506 Noise-aware R
- Page 133 and 134:
DAC'99, pages 511-516 ECL: A Specif
- Page 135 and 136:
DAC'99, pages 523-528 Vex - A CAD t
- Page 137 and 138:
DAC'99, pages 535-536 Panel: MEMS C
- Page 139 and 140:
DAC'99, pages 543-548 Efficient Cap
- Page 141 and 142:
[14] K. J. Kerns and A. T. Yang,
- Page 143 and 144:
[17] C.-H. Hwang and A. Wu, “A Pr
- Page 145 and 146:
DAC'99, pages 568-573 Low-Power Beh
- Page 147 and 148:
DAC'99, pages 574-579 A Methodology
- Page 149 and 150:
DAC'99, pages 586-591 Microprocesso
- Page 151 and 152:
[16] J. P. Bergmann and M. A. Horow
- Page 153 and 154:
DAC'99, pages 604-609 Engineering C
- Page 155 and 156:
DAC'99, pages 610-615 Reconfigurabl
- Page 157 and 158:
[16] R. Niemann and P. Marwedel,
- Page 159 and 160:
DAC'99, pages 629-634 Multi-Time Si
- Page 161 and 162:
DAC'99, pages 635-640 Efficient com
- Page 163 and 164:
DAC'99, pages 647-652 Test Generati
- Page 165 and 166:
[20] I. Pomeranz and S.M. Reddy “
- Page 167 and 168:
DAC'99, pages 666-671 Simulation Ve
- Page 169 and 170:
DAC'99, pages 672-677 A Two-State M
- Page 171 and 172:
DAC'99, pages 684-690 A Massively-P
- Page 173 and 174:
DAC'99, pages 691-696 Dynamic Fault
- Page 175 and 176:
[18] A.W. Roscoe, C. A. R. Hoare.
- Page 177 and 178:
DAC'99, pages 709-714 SOI Digital C
- Page 179 and 180:
DAC'99, pages 715-720 Equivalent El
- Page 181 and 182:
DAC'99, pages 721-724 Effects of In
- Page 183 and 184:
DAC'99, pages 731-736 Functional Ti
- Page 185 and 186:
DAC'99, pages 742-747 On ILP Formul
- Page 187 and 188:
DAC'99, pages 754-759 Built-In Test
- Page 189 and 190:
DAC'99, pages 766-771 A Floorplan-b
- Page 191 and 192:
[18] Ramesh Harjani and Tom Lee,
- Page 193 and 194:
DAC'99, pages 784-789 Hardware Reus
- Page 195 and 196:
DAC'99, pages 794-797 Java Driven C
- Page 197 and 198:
DAC'99, pages 799-804 Subwavelength
- Page 199 and 200:
DAC'99, pages 805-810 Synthesis of
- Page 201 and 202:
DAC'99, pages 817-822 Constraint Dr
- Page 203 and 204:
DAC'99, pages 827-830 SOFTWARE ENVI
- Page 205 and 206:
[18] B. Schneier, 1963- Applied Cry
- Page 207 and 208:
DAC'99, pages 843-848 Effective Ite
- Page 209 and 210:
DAC'99, pages 849-854 Behavioral Sy
- Page 211 and 212:
DAC'99, pages 861-866 Design Consid
- Page 213 and 214:
DAC'99, pages 867-872 Cycle-Accurat
- Page 215 and 216:
DAC'99, pages 879-884 A CAD Tool fo
- Page 217 and 218:
[18] W. R. Hunter, “Self-consiste
- Page 219 and 220:
DAC'99, pages 898-903 A Framework f
- Page 221 and 222:
DAC'99, pages 910-914 Interconnect
- Page 223 and 224:
DAC'99, pages 915-920 IC Analyses I
- Page 225 and 226:
DAC'99, pages 927-932 A Methodology
- Page 227 and 228:
DAC'99, pages 939-944 Exploiting In
- Page 229 and 230:
[20] S. Kirkpatrick, C.D. Gelatt, M
- Page 231 and 232:
[16] D. Leenaerts, “Application o
- Page 233 and 234:
DAC'99, pages 964-969 Cycle and Pha
- Page 235 and 236:
DAC'99, pages 970-975 A Study in Co
- Page 237 and 238:
[16] H. Sarin, and A. McNelly, “A
- Page 239 and 240:
[15] H.M. Greenhouse, “Design of
- Page 241 and 242:
DAC'99, pages 994-998 Optimization