using the bootstrap loader

where:
mpc$base$addr
port$sep
duty$cycle
dma$base$addr
dma$in
dma$out
dma$trans
data$width
CONFIGURING THE FIRST STAGE
The base I/O port address of the MPC. Refer to the
appropriate single board computer user's guide for this
address.
The number of addresses separating individual MPC
ports. For example, if the mpc$base$addr is OOOOH and
the next three I/O port addresses are 0004H, 0008H,
and OOOCH, respectively, the port$sep is 4H. Refer to
the appropriate single board computer user's guide for
the I/O port address map.
The MPC duty cycle for the local bus. (The rate at
which data packets are generated.) For information on
how to calculate a duty cycle suitable for the local bus,
refer to the MPC User's Manual. For duty cycles suitable
for Intel single board computers, refer to the appropriate
single board computer user's guide.
The base I/O port address for the Advanced Direct
Memory Access (ADMA) controller. Refer to the
appropriate single board computer user's guide for this
address.
The channel used to receive (input) DMA message
passing transfers. Refer to the appropriate single board
computer user's guide for this channel number.
The channel used to send (output) DMA message
passing transfers. Refer to the appropriate single board
computer user's guide for this channel number.
The I/O port address used for DMA data transfers.
Refer to the appropriate single board computer user's
guide for this address.
The data width in bits of the local bus. This value must
be either 16 or 32 (decimal). If the width is set to 32 bits
on an iSBC 386/116- or 386/120 board, flyby (one cycle)
DMA mode is enabled.
The %BMPS macro can generate errors if the local bus width is not 16 or 32 bits wide.
Bootstrap Loader 3-13