using the bootstrap loader

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iSBX 354 Channel A (on iSBX #0) ;serial_channe1(82530,084H,2,82530,084H,2,0,Oeh,a) iSBX 354 Channel B (on iSBX #0) ;serial_channe1(82530,080H,2,82530,080H,2,0,Oeh,b) 8 MHz iSBC 186/03A Channel A ;serial_channe1(8274,Od8h,2,80186,OffOOh,2,0,Odh) 8 MHz iSBC 186/03A Channel B ;seria1_channe1(8274,Odah,2,80186,OffOOh,2,1,Odh) ;seria1_channe1(8274,Odah,2,80130,OeOh,2,2,034h) 6 MHz iSBC 186/03/51 Channel A ;seria1_channe1(8274,Od8h,2,80186,OffOOh,2,0,Oah) 6 MHz iSBC 186/03/51 Channel B ;seria1_channe1(8274,Odah,2,80186,OffOOh,2,1,Oah) ;seria1_channe1(8274,Odah,2,80130,OeOh,2,2,027h) iSBC 188/48/56 SCC #1 Channel A ;seria1_channe1(82530,OdOh,1,82530,OdOh,1,0,Oeh,a) iSBC 188/48/56 SCC #1 Channel B ;seria1_channe1(82530,Od2h,1,82530,Od2h,1,0,Oeh,b) iSBC 286/10(A)/12 and iSBC 386/12 Channel A ;seria1_channe1(8274,Od8h,2,8254,OdOh,2,2,8) iSBC 286/10(A)/12 and iSBC 386/12 Channel B ;seria1_channe1(8274,Odah,2,8254,OdOh,2,1,8) iSBC 386/2X and iSBC 386/3X ;seria1_channe1(8251a,Od8h,2,8254,OdOh,2,2,8) Bootstrap Loader Figure 3-1. Intel-Supplied BS1.A86 File (continued) CONFIGURING THE FIRST STAGE 3-5
CONFIGURING THE FIRST STAGE 3-6 , , """ , '" " """ , " " , " "" " , , , " , '" , " " , " "" , '" , , , MULTI BUS I devices .............................................................. , '" , '" " , '" """ , , , '" , , "" " " , " , , " " '" " , , , , , '" , , , , %device(afO, 0, deviceinit208gen, deviceread208gen) %device(afl, 1, deviceinit208gen, deviceread208gen) %device(wO, 0, deviceinitmscgen, devicereadmscgen) %device(wl, 1, deviceinitmscgen, devicereadmscgen) %device(wfO, 8, deviceinitmscgen, devicereadmscgen) %device(wfl, 9, deviceinitmscgen, devicereadmscgen) %device(sO, 0, deviceinitscsi, devicereadscsi) %device(sxI410aO, 0, deviceinitscsi, devicereadscsi, sasi_xI410a) %device(sxI410bO, 0, deviceinitscsi, devicereadscsi, sasi_xI410b) %device(smfO, 2, deviceinitscsi, devicereadscsi, sasi_xI420mf) %device(pmfO, 0, deviceinit218A, deviceread218A) %device(pbO, 0, deviceinit251, deviceread251) %device(bO, 0, deviceinit254, deviceread254) %device(baO, 0, deviceinit264, deviceread264) %device(rO, 0, deviceinit552A, deviceread552A) %end Figure 3-1. Intel-Supplied BSl.A86 File (continued) Bootstrap Loader
Page 2: iRMX® Bootstrap loader Reference M
Page 5 and 6: I \
Page 7 and 8: PREFACE Appendix B This appendix de
Page 9 and 10: Contents Chapter 3. Configuring the
Page 11 and 12: Contents Chapter 6. Writing a Custo
Page 14 and 15: 1.1 INTRODUCTION OVERVIEW OF BOOTST
Page 16 and 17: 1.2 THE STAGES OF THE BOOTSTRAP LOA
Page 18 and 19: Generic Third Stage OVERVIEW OF BOO
Page 20 and 21: OVERVIEW OF BOOTSTRAP LOADER OPERAT
Page 22 and 23: * OVERVIEW OF BOOTSTRAP LOADER OPER
Page 24: OVERVIEW OF BOOTSTRAP LOADER OPERAT
Page 27 and 28: USING THE BOOTSTRAP LOADER 2-2 When
Page 29 and 30: USING THE BOOTSTRAP LOADER 2-4 For
Page 31 and 32: USING THE BOOTSTRAP LOADER 2-6 Alth
Page 33 and 34: USING THE BOOTSTRAP LOADER * 2-8 NO
Page 35 and 36: CONFIGURING THE FIRST STAGE 3.1.1 F
Page 37: CONFIGURING THE FIRST STAGE 3-4 nam
Page 42 and 43: CONFIGURING THE FIRST STAGE The ord
Page 44 and 45: CONFIGURING THE FIRST STAGE 3.2.3 %
Page 46 and 47: where: mpc$base$addr port$sep duty$
Page 48 and 49: 3.2.7 %CONSOLE, %MANUAL, and %AUTO
Page 50 and 51: CONFIGURING THE FIRST STAGE • If
Page 52 and 53: The syntax of this macro is %CLEAR
Page 54 and 55: The syntax of the %SERIAL _ CHANNEL
Page 56 and 57: CONFIGURING THE FIRST STAGE flags A
Page 58 and 59: The syntax of the %DEVICE macro is
Page 60 and 61: CONFIGURING THE FIRST STAGE Table 3
Page 62 and 63: 3.3 BSERR.A86 CONFIGURATION FILE CO
Page 64 and 65: 3.3.4 %AGAIN Macro CONFIGURING THE
Page 66 and 67: 3.4 DEVICE DRIVER CONFIGURATION FIL
Page 68 and 69: In the BMSC.A86 file, the default i
Page 71 and 72: CONFIGURING THE FIRST STAGE 3.4.6 %
Page 73 and 74: CONFIGURING THE FIRST STAGE def cla
Page 75 and 76: CONFIGURING THE FIRST STAGE In the
Page 77 and 78: CONFIGURING THE FIRST STAGE 3.4.11
Page 79 and 80: CONFIGURING THE FIRST STAGE 3-46 Mu
Page 82: The format for invoking the submit
Page 85 and 86: CONFIGURING THE THIRD STAGE 4.2 OVE
Page 87 and 88: CONFIGURING THE THIRD STAGE 4.3 BS3
Page 89 and 90:
CONFIGURING THE THIRD STAGE name bs
Page 91 and 92:
CONFIGURING THE THIRD STAGE 4.3.1 %
Page 93 and 94:
CONFIGURING THE THIRD STAGE Table 4
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CONFIGURING THE THIRD STAGE The def
Page 98 and 99:
CONFIGURING THE THIRD STAGE This ma
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attachfile bsl as :fl: asm86 bg3.a8
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Generic third stage where: SUBMIT B
Page 104 and 105:
5.1 INTRODUCTION 5 WRITING A CUSTOM
Page 106 and 107:
5.2 DEVICE INITIALIZE PROCEDURE WRI
Page 108 and 109:
Adding the following statements acc
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", ", """""", " " , " " "", " """""
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WRITING A CUSTOM FIRST-STAGE DRIVER
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Page 116 and 117:
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Condition Codes E$OK BS$E$BUFFER$SI
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Output Parameter exception$ptr Desc
Page 124 and 125:
Condition Codes E$OK BS$E$TRANSMISS
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END CODE; END SAMPLE_BS$RECEIVE; Co
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Page 134 and 135:
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Page 139 and 140:
Page 141 and 142:
Page 143 and 144:
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WRITING A CUSTOM THIRD-STAGE DRIVER
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Page 153 and 154:
Page 155 and 156:
Page 158:
7.1 INTRODUCTION ERROR HANDLING 7 I
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ERROR HANDLING 7-4 Error Code: 13 D
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ERROR HANDLING Table 7-1. Postmorte
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A.1 INTRODUCTION AUTOMATIC A BOOT D
Page 168 and 169:
AUTOMATIC BOOT DEVICE RECOGNITION A
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AUTOMATIC BOOT DEVICE RECOGNITION (
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PROMMING THE BOOTSTRAP B LOADER AND
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C.1 OVERVIEW D-MON386 MONITOR C Int
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%Again 3-29, 3-31 %Auto 3-15 %Auto
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BS$SEND 5-18, 5-19 BS$SEND$RSVP 5-1
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E Editing BSl.A86 3-8, 5-38 Error c
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Intel-supplied first stage drivers
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Send transition model 5-18 Serial c
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INTEL CORPORATION 3065 Bowers Avenu
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inter • • • • • • •
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using the bootstrap loader

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