30.01.2013 Views

The SWIFT BAT Software Guide Version 6.3 30 ... - HEASARC - Nasa

The SWIFT BAT Software Guide Version 6.3 30 ... - HEASARC - Nasa

The SWIFT BAT Software Guide Version 6.3 30 ... - HEASARC - Nasa

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

A.8. HOUSEKEEPING FILES 81<br />

DM Status FilterMask (16,16,16)X DM FilterMask<br />

DM TagSrc FrCnt (8,16)J DM Front Tagged Source Count<br />

DM TagSrc RrCnt (8,16)J DM Rear Tagged Source Count<br />

DM TagSrc 100usec (16,16)B 100 usec Relative Timestamp<br />

DM HK Temp (16,16)I [C] DM Side temperature<br />

DM HK HVLkCurr (16,16)I [nA] High Voltage Leakage Current<br />

DM HK Vthr (16,16)I XA1 Discriminator Threshold Voltage<br />

DM HK Vcadj (16,16)I [V] XA1 output buffer offset adjust<br />

DM HK Vcal (8,16)I [V] Cal pulser voltage (Side 0 ONLY)<br />

DM HK Vfs (8,16)I XA1 Feedback shaper (Side 1 ONLY)<br />

DM Cnts LLD (16,16)J LLD Count<br />

DM Cnts Evt (16,16)J Event Count<br />

DM Cnts 100usec (16,16)B 100 usec Timestamp count<br />

DM Cnts MLD (16,16)I Multi channel hit Count<br />

DM Cnts Lost (16,16)I Lost Event Count<br />

DM Coef SegGain (16,16)I Segment Gain Coefficient<br />

DM Coef SegOffset (16,16)I Segment Offset Coefficient<br />

DM Coef StripGain (16,16)I Strip Gain Coefficient<br />

DM Coef StripOffset (16,16)I Segment Offset Coefficient<br />

DM Parms CalPeriod (16,16)I [ms] Calibration Pulser Period<br />

DM Parms DMC<strong>Version</strong> (16,16)B DMC FPGA <strong>Version</strong> Number<br />

DM Parms TagSrcEn (8,16,16)X Tagged Source Front / Rear Enable<br />

DM Parms TagSrcFrDel (16,16)I [us] Tagged Source Front Delay<br />

DM Parms TagSrcRrDel (16,16)I [us] Tagged Source Rear Delay<br />

DM Parms TestMuxAdr (16,16)B Testport Multiplexer Address Stng<br />

DM Enable (128,16,16)X DM Channel Control Enable Bits<br />

DM DSR1 XA1 VFP A (16,16)I [V] XA1 Feedback preamp Bias Voltage (A)<br />

DM DSR1 XA1 VTHR A (16,16)I [V] XA1 Discriminator Threshold Volt. (A)<br />

DM DSR1 XA1 VCADJ A (16,16)I [V] XA1 Output Buffer Offset Adjust (A)<br />

DM DSR1 XA1 VCAL (16,16)I [V] Calibration Pulser Voltage<br />

DM DSR2 XA1 VFP B (16,16)I [V] XA1 Feedback preamp Bias Voltage (B)<br />

DM DSR2 XA1 VTHR B (16,16)I [V] XA1 Discriminator Threshold Volt. (B)<br />

DM DSR2 XA1 VCADJ B (16,16)I [V] XA1 Output Buffer Offset Adjust (B)<br />

DM DSR2 XA1 VFS (16,16)I [V] XA1 feedback shaper bias voltage<br />

DM ChannelTest (128,16,16)X XA1 Shadow Register Channel Test<br />

DM ChannelMask (128,16,16)X XA1 Shadow Register Channel Mask<br />

DM XSR4 XA1 Addr (16,16)B XA1 Chip Address<br />

DM XSR4 Ctrl (3,16,16)X XA1 Mode Control Bits<br />

APID 1I Application Process Identifier<br />

LDP 1J LDP Product Number<br />

DATA FLAGS 1I Data Quality 0=OK, 1=Problem<br />

Several products have different dimensions. <strong>The</strong> array dimensions refer to data values stored<br />

on a per-block, per-DM or per-side basis, as follows.

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!