uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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INTRODUCTION Target Readers This manual is intended for users who wish to understand the functions of the µPD789871 Subseries and to design and develop application systems and programs using these microcontrollers. Purpose This manual is intended for users to understand the functions described in the organization below. Organization The µPD789871 Subseries User's Manual is divided into two parts: this manual and instructions (common to the 78K/0S Series). µPD789871 78K/0S Series Subseries User’s Manual User’s Manual (This manual) Instructions • Pin functions • CPU function • Internal block functions • Instruction set • Interrupt • Other internal peripheral functions • Instruction description How to Read This Manual It is assumed that the readers of this manual have general knowledge in the fields of electrical engineering, logic circuits, and microcontrollers. To understand the overall functions in general → Read this manual in the order of the CONTENTS. How to interpret register formats → The name of a bit whose number is encircled is reserved for the assembler and is defined for the C compiler by the header file sfrbit.h. To learn the detailed functions of a register whose register name is known → Refer to APPENDIX C REGISTER INDEX. To learn the details of the instruction functions of the 78K/0S Series → Refer to 78K/0S Series User’s Manual Instructions (U11047E). Conventions Data significance: Higher digits on the left and lower digits on the right Active low representation: ××× (overscore over pin or signal name) Note: Footnote for item marked with Note in the text Caution: Information requiring particular attention Remark: Supplementary information Numerical representation: Binary ... ×××× or ××××B Decimal ... ×××× Hexadecimal ... ××××H Related Documents The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. 6 Preliminary User’s Manual U14938EJ1V0UM
Documents Related to Devices Document Name Document No. µPD789870, 789871 Preliminary Product Information U14916E µPD78F9872 Preliminary Product Information U14880E Preliminary User’s Manual U14938EJ1V0UM English µPD789871 Subseries User’s Manual This manual 78K/0S Series User’s Manual Instruction U11047E 78K/0, 78K/0S Series Application Note Flash Memory Write U14458E Documents Related to Development Tools (User’s Manuals) Document Name Document No. RA78K0S Assembler Package Operation U11622E English Assembly Language U11599E Structured Assembly Language U11623E CC78K0S C Compiler Operation U11816E Language U11817E SM78K0S System Simulator Windows TM Based Reference U11489E SM78K Series System Simulator External components user open interface specification U10092E ID78K0S-NS Integrated Debugger Windows Based Reference U12901E IE-78K0S-NS In-Circuit Emulator U13549E IE-789872-NS-EM1 Emulation Board To be prepared Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document for designing. 7
Page 1 and 2: To our customers, Old Company Name
Page 3 and 4: Preliminary User’s Manual µPD789
Page 5 and 6: 1 NOTES FOR CMOS DEVICES PRECAUTION
Page 7: Regional Information Some informati
Page 11 and 12: CONTENTS CHAPTER 1 GENERAL ........
Page 13 and 14: CHAPTER 8 WATCH TIMER .............
Page 15 and 16: LIST OF FIGURES (1/3) Figure No. Ti
Page 17 and 18: LIST OF FIGURES (3/3) Figure No. Ti
Page 19 and 20: LIST OF TABLES (2/2) Table No. Titl
Page 21 and 22: 1.4 Pin Configuration (Top View)
Page 23 and 24: CHAPTER 1 GENERAL The major functio
Page 25 and 26: An outline of the timer is shown be
Page 27 and 28: (2) Non-port pins CHAPTER 2 PIN FUN
Page 29 and 30: CHAPTER 2 PIN FUNCTIONS 2.2.5 P90 t
Page 31 and 32: CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O
Page 33 and 34: 3.1 Memory Space CHAPTER 3 CPU ARCH
Page 35 and 36: Data memory space Program memory sp
Page 37 and 38: CHAPTER 3 CPU ARCHITECTURE 3.1.2 In
Page 39 and 40: FFFFH FF20H FF1FH FF00H FEFFH FE20H
Page 41 and 42: 3.2 Processor Registers CHAPTER 3 C
Page 43 and 44: CHAPTER 3 CPU ARCHITECTURE (3) Stac
Page 45 and 46: CHAPTER 3 CPU ARCHITECTURE 3.2.3 Sp
Page 47 and 48: 3.3 Instruction Address Addressing
Page 49 and 50: 3.3.3 Table indirect addressing CHA
Page 51 and 52: 3.4.2 Short direct addressing CHAPT
Page 53 and 54: 3.4.4 Register addressing CHAPTER 3
Page 55 and 56: 3.4.6 Based addressing CHAPTER 3 CP
Page 57 and 58: CHAPTER 4 PORT FUNCTIONS Table 4-1.
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CHAPTER 4 PORT FUNCTIONS 4.2.2 Port
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Internal bus WRPUB2 RD WRPORT WRPM
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CHAPTER 4 PORT FUNCTIONS 4.2.4 Port
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4.3 Port Function Control Registers
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4.4 Operation of Port Functions CHA
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XT1 XT2 X1 X2 Internal bus FRC SCC
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CHAPTER 5 CLOCK GENERATOR (2) Subos
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CHAPTER 5 CLOCK GENERATOR Figure 5-
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5.5 Clock Generator Operation CHAPT
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CHAPTER 5 CLOCK GENERATOR 5.6.2 Swi
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CHAPTER 6 8-BIT REMOTE CONTROL TIME
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CHAPTER 6 8-BIT REMOTE CONTROL TIME
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7.2 8-Bit Timer Configuration The 8
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7.3 Registers Controlling 8-Bit Tim
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7.4 8-Bit Timer Operation CHAPTER 7
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8.1 Watch Timer Functions The watch
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WTM CHAPTER 8 WATCH TIMER Figure 8-
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CHAPTER 9 WATCHDOG TIMER The watchd
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9.3 Registers Controlling Watchdog
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9.4 Watchdog Timer Operation CHAPTE
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10.1 Serial Interface 10 Functions
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10.3 Register Controlling Serial In
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10.4 Serial Interface 10 Operation
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CHAPTER 10 SERIAL INTERFACE 10 (2)
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11.2 VFD Controller/Driver Configur
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(2) Display mode register 1 (DSPM1)
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CHAPTER 11 VFD CONTROLLER/DRIVER 11
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CHAPTER 11 VFD CONTROLLER/DRIVER (2
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CHAPTER 11 VFD CONTROLLER/DRIVER 11
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T0 T1 S0 CHAPTER 11 VFD CONTROLLER/
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CHAPTER 11 VFD CONTROLLER/DRIVER By
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12.1 Interrupt Function Types CHAPT
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(A) Internal non-maskable interrupt
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12.3 Interrupt Function Control Reg
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CHAPTER 12 INTERRUPT FUNCTIONS (2)
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CHAPTER 12 INTERRUPT FUNCTIONS (4)
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CHAPTER 12 INTERRUPT FUNCTIONS Figu
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CHAPTER 12 INTERRUPT FUNCTIONS Figu
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INTxx CHAPTER 12 INTERRUPT FUNCTION
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13.1 Standby Function and Configura
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13.2 Operation of Standby Function
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CHAPTER 13 STANDBY FUNCTION (c) Rel
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CHAPTER 13 STANDBY FUNCTION (2) Rel
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CHAPTER 14 RESET FUNCTION The follo
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CHAPTER 14 RESET FUNCTION Table 14-
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15.1 Flash Memory Programming VPP R
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CHAPTER 15 µPD78F9872 15.1.4 Examp
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CHAPTER 17 INSTRUCTION SET This cha
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17.2 Operation List CHAPTER 17 INST
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CHAPTER 17 INSTRUCTION SET Mnemonic
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CHAPTER 17 INSTRUCTION SET Mnemonic
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CHAPTER 17 INSTRUCTION SET (2) 16-b
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APPENDIX A DEVELOPMENT TOOLS The fo
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A.1 Language Processing Software AP
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A.3.2 Software ID78K0S-NS Integrate
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C.1 Register Name Index (Alphabetic
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C.2 Register Symbol Index (Alphabet
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Facsimile Message From: Name Compan
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uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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