uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

CHAPTER 5 CLOCK GENERATOR
(2) Suboscillation mode register (SCKM)
SCKM selects a the feedback resistor for the subsystem clock, and controls the oscillation of the clock.
SCKM is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears SCKM to 00H.
Caution Bit 2 to 7 must be set to 0.
Figure 5-3. Suboscillation Mode Register Format
Symbol 7 6 5 4 3 2 1 0 Address After reset R/W
SCKM
(3) Subclock control register (CSS)
CSS specifies whether the main system or subsystem clock oscillator is to be selected. It also specifies the
CPU clock operation status.
CSS is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CSS to 00H.
Symbol
CSS
0 0 0 0 0 0 FRC SCC
FRC
0
1
SCC
0
1
On-chip feedback resistor used
On-chip feedback resistor not used
Operation enabled
Operation stopped
Note Bit 5 read only.
Figure 5-4. Subclock Control Register Format
7 6 5 4 3 2 1 0
0 0 CLS CSS0 0 0 0 0
CLS
0
1
CSS0
0
1
Caution Bits 0 to 3, 6, and 7 must be set to 0.
Feedback resistor selection
FFF0H 00H R/W
Control of subsystem clock oscillator operation
CPU clock operation status
Operation based on the divided main system clock output
Operation based on the subsystem clock output
Address After reset R/W
FFF2H 00H R/W
Selection of the main system or subsystem clock oscillator
Divided output from the main system clock oscillator
Output from the subsystem clock oscillator
Preliminary User’s Manual U14938EJ1V0UM 69
Note