29.01.2013 Views

uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

4.2 Port Configuration<br />

56<br />

A port consists of the following hardware.<br />

CHAPTER 4 PORT FUNCTIONS<br />

Table 4-2. Configuration of Port<br />

Parameter Configuration<br />

Control register Port mode register (PMm: m = 0 to 2)<br />

Pull-up resistor option register 0 (PU0)<br />

Pull-up option register B2 (PUB2)<br />

Port Total: 33<br />

CMOS I/O: 17<br />

P-ch open-drain I/O: 8<br />

P-ch open-drain output: 8<br />

Pull-up resistor 17 (software control)<br />

Pull-down resistor • Mask ROM versions: 16 (8 of these can be specified by the mask option)<br />

• Flash memory versions: None<br />

4.2.1 Port 0<br />

This is a 8-bit I/O port with output latches. Port 0 can be specified as input or output mode in 1-bit units by using<br />

port mode register 0 (PM0). When pins P00 to P07 are used as input port pins, on-chip pull-up resistors can be<br />

connected in 8-bit units by using pull-up resistor option register 0 (PU0).<br />

RESET input sets port 0 to input mode.<br />

Figure 4-2 shows the block diagram of port 0.<br />

Internal bus<br />

WRPU0<br />

RD<br />

WRPORT<br />

WRPM<br />

PU0: Pull-up resistor option register 0<br />

PM: Port mode register<br />

RD: Port 0 read signal<br />

WR: Port 0 write signal<br />

Figure 4-2. Block Diagram of P00 to P07<br />

PU00<br />

Output latch<br />

(P00 to P07)<br />

PM00 to PM07<br />

Selector<br />

Preliminary User’s Manual U14938EJ1V0UM<br />

VDD0<br />

P-ch<br />

P00 to P07

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!