uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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28 CHAPTER 2 PIN FUNCTIONS 2.2.15 IC (mask ROM version only) The IC (Internally Connected) pin is used to set the µPD789870 and µPD789871 in the test mode before shipment. In the normal operation mode, directly connect this pin to the VSS0 pin with as short a wiring length as possible. If a potential difference is generated between the IC pin and VSS0 pin due to a long wiring length, or an external noise superimposed on the IC pin, the user program may not run correctly. Directly connect the IC pin to the VSS0 pin. VSS0 IC Keep short Preliminary User’s Manual U14938EJ1V0UM
CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins The I/O circuit type for each pin and recommended connection of unused pins are shown in Table 2-1. For the input/output circuit configuration of each type, see Figure 2-1. Table 2-1. Types of Pin I/O Circuits Pin Name I/O Circuit Type I/O Recommended Connection of Unused Pins P00 to P07 5-H I/O Input: Independently connect to VDD0 or VSS0 via a resistor. P10 to P12 Output: Leave open. P20/SCK10 8-C P21/SO10 5-H P22/SI10 8-C P23/INTP0 P24/INTP1 P25/TI FIP0 to FIP8 14-F Output Leave open. FIP9/P97 to FIP16/P90 FIP17/P87 to FIP24/P80 (Mask ROM version) 15-G I/O FIP17/P87 to FIP24/P80 15-H (Flash memory version) RESET 2 Input — IC — — Connect directly to VSS0. VPP — — Preliminary User’s Manual U14938EJ1V0UM 29
Page 1 and 2: To our customers, Old Company Name
Page 3 and 4: Preliminary User’s Manual µPD789
Page 5 and 6: 1 NOTES FOR CMOS DEVICES PRECAUTION
Page 7 and 8: Regional Information Some informati
Page 9 and 10: Documents Related to Devices Docume
Page 11 and 12: CONTENTS CHAPTER 1 GENERAL ........
Page 13 and 14: CHAPTER 8 WATCH TIMER .............
Page 15 and 16: LIST OF FIGURES (1/3) Figure No. Ti
Page 17 and 18: LIST OF FIGURES (3/3) Figure No. Ti
Page 19 and 20: LIST OF TABLES (2/2) Table No. Titl
Page 21 and 22: 1.4 Pin Configuration (Top View)
Page 23 and 24: CHAPTER 1 GENERAL The major functio
Page 25 and 26: An outline of the timer is shown be
Page 27 and 28: (2) Non-port pins CHAPTER 2 PIN FUN
Page 29: CHAPTER 2 PIN FUNCTIONS 2.2.5 P90 t
Page 33 and 34: 3.1 Memory Space CHAPTER 3 CPU ARCH
Page 35 and 36: Data memory space Program memory sp
Page 37 and 38: CHAPTER 3 CPU ARCHITECTURE 3.1.2 In
Page 39 and 40: FFFFH FF20H FF1FH FF00H FEFFH FE20H
Page 41 and 42: 3.2 Processor Registers CHAPTER 3 C
Page 43 and 44: CHAPTER 3 CPU ARCHITECTURE (3) Stac
Page 45 and 46: CHAPTER 3 CPU ARCHITECTURE 3.2.3 Sp
Page 47 and 48: 3.3 Instruction Address Addressing
Page 49 and 50: 3.3.3 Table indirect addressing CHA
Page 51 and 52: 3.4.2 Short direct addressing CHAPT
Page 53 and 54: 3.4.4 Register addressing CHAPTER 3
Page 55 and 56: 3.4.6 Based addressing CHAPTER 3 CP
Page 57 and 58: CHAPTER 4 PORT FUNCTIONS Table 4-1.
Page 59 and 60: CHAPTER 4 PORT FUNCTIONS 4.2.2 Port
Page 61 and 62: Internal bus WRPUB2 RD WRPORT WRPM
Page 63 and 64: CHAPTER 4 PORT FUNCTIONS 4.2.4 Port
Page 65 and 66: 4.3 Port Function Control Registers
Page 67 and 68: 4.4 Operation of Port Functions CHA
Page 69 and 70: XT1 XT2 X1 X2 Internal bus FRC SCC
Page 71 and 72: CHAPTER 5 CLOCK GENERATOR (2) Subos
Page 73 and 74: CHAPTER 5 CLOCK GENERATOR Figure 5-
Page 75 and 76: 5.5 Clock Generator Operation CHAPT
Page 77 and 78: CHAPTER 5 CLOCK GENERATOR 5.6.2 Swi
Page 79 and 80: CHAPTER 6 8-BIT REMOTE CONTROL TIME
Page 81 and 82:
CHAPTER 6 8-BIT REMOTE CONTROL TIME
Page 83 and 84:
7.2 8-Bit Timer Configuration The 8
Page 85 and 86:
7.3 Registers Controlling 8-Bit Tim
Page 87 and 88:
7.4 8-Bit Timer Operation CHAPTER 7
Page 89 and 90:
8.1 Watch Timer Functions The watch
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WTM CHAPTER 8 WATCH TIMER Figure 8-
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CHAPTER 9 WATCHDOG TIMER The watchd
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9.3 Registers Controlling Watchdog
Page 97 and 98:
9.4 Watchdog Timer Operation CHAPTE
Page 99 and 100:
10.1 Serial Interface 10 Functions
Page 101 and 102:
10.3 Register Controlling Serial In
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10.4 Serial Interface 10 Operation
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CHAPTER 10 SERIAL INTERFACE 10 (2)
Page 107 and 108:
11.2 VFD Controller/Driver Configur
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(2) Display mode register 1 (DSPM1)
Page 111 and 112:
CHAPTER 11 VFD CONTROLLER/DRIVER 11
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CHAPTER 11 VFD CONTROLLER/DRIVER (2
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CHAPTER 11 VFD CONTROLLER/DRIVER 11
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T0 T1 S0 CHAPTER 11 VFD CONTROLLER/
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CHAPTER 11 VFD CONTROLLER/DRIVER By
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12.1 Interrupt Function Types CHAPT
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(A) Internal non-maskable interrupt
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12.3 Interrupt Function Control Reg
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CHAPTER 12 INTERRUPT FUNCTIONS (2)
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CHAPTER 12 INTERRUPT FUNCTIONS (4)
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CHAPTER 12 INTERRUPT FUNCTIONS Figu
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CHAPTER 12 INTERRUPT FUNCTIONS Figu
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INTxx CHAPTER 12 INTERRUPT FUNCTION
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13.1 Standby Function and Configura
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13.2 Operation of Standby Function
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CHAPTER 13 STANDBY FUNCTION (c) Rel
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CHAPTER 13 STANDBY FUNCTION (2) Rel
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CHAPTER 14 RESET FUNCTION The follo
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CHAPTER 14 RESET FUNCTION Table 14-
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15.1 Flash Memory Programming VPP R
Page 151 and 152:
CHAPTER 15 µPD78F9872 15.1.4 Examp
Page 153 and 154:
CHAPTER 17 INSTRUCTION SET This cha
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17.2 Operation List CHAPTER 17 INST
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CHAPTER 17 INSTRUCTION SET Mnemonic
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CHAPTER 17 INSTRUCTION SET Mnemonic
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CHAPTER 17 INSTRUCTION SET (2) 16-b
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APPENDIX A DEVELOPMENT TOOLS The fo
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A.1 Language Processing Software AP
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A.3.2 Software ID78K0S-NS Integrate
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C.1 Register Name Index (Alphabetic
Page 171 and 172:
C.2 Register Symbol Index (Alphabet
Page 173:
Facsimile Message From: Name Compan
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uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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