uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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APPENDIX B EMBEDDED SOFTWARE The following embedded software products are available for efficient program development and maintenance of the µPD789871 <strong>Subseries</strong>. MX78K0S OS MX78K0S is a subset OS that is based on the µITRON specification. Supplied with the MX78K0S nucleus. The MX78K0S OS controls tasks, events, and time. In task control, the MX78K0S OS controls task execution order, and then perform the switching process to a task to be executed. The MX78K0S is a DOS-based application. Use this software in the DOS pane when running it on Windows. Part number: µS××××MX78K0S Remark ×××× in the part number differ depending on the host machine and OS used. µS××××MX78K0S ×××× Host Machine OS Supply Media AA13 PC-9800 Series Japanese Windows Note 3.5" 2HD FD AB13 IBM PC/AT compatibles Japanese WindowsNote 3.5" 2HD FD BB13 English WindowsNote Note Can also be operated in the DOS environment. 166 Preliminary User’s Manual U14938EJ1V0UM
C.1 Register Name Index (Alphabetic Order) [E] [I] [O] [P] [R] [S] APPENDIX C REGISTER INDEX 8-bit compare registers 80, 81 (CR80, CR81) .............................................................................................. 82 8-bit timer mode control registers 80, 81 (TMC80, TMC81)......................................................................... 83 8-bit timer counters 80, 81 (TM80, TM81) ..................................................................................................... 82 External interrupt mode register 0 (INTM0) ................................................................................................. 126 Interrupt mask flag register 0 (MK0) ............................................................................................................ 125 Interrupt mask flag register 1 (MK1) ............................................................................................................ 125 Interrupt request flag register 0 (IF0) ........................................................................................................... 124 Interrupt request flag register 1 (IF1) ........................................................................................................... 124 Oscillation stabilization time select register (OSTS) ................................................................................... 136 Port 0 (P0) ....................................................................................................................................................... 56 Port 1 (P1) ....................................................................................................................................................... 57 Port 2 (P2) ....................................................................................................................................................... 58 Port 8 (P8) ....................................................................................................................................................... 61 Port 9 (P9) ....................................................................................................................................................... 62 Port mode register 0 (PM0) ............................................................................................................................ 63 Port mode register 1 (PM1) ............................................................................................................................ 63 Port mode register 2 (PM2) ............................................................................................................................ 63 Processor clock control register (PCC) ......................................................................................................... 68 Pull-up resistor option register 0 (PU0) ......................................................................................................... 64 Pull-up resistor option register B2 (PUB2) .................................................................................................... 64 Remote control timer capture registers 50, 51 (CP50, CP51) ..................................................................... 77 Remote control timer control register 50 (TMC50) ....................................................................................... 77 Serial operating mode register 10 (CSIM10) ................................................................................................. 99 Subclock control resistor (CSS) ..................................................................................................................... 69 Suboscillation mode resistor (SCKM) ............................................................................................................ 69 [T] Transmit/receive shift register 10 (TXS10) .................................................................................................... 97 Preliminary User’s Manual U14938EJ1V0UM 167
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To our customers, Old Company Name
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Preliminary User’s Manual µPD789
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1 NOTES FOR CMOS DEVICES PRECAUTION
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Regional Information Some informati
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Documents Related to Devices Docume
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CONTENTS CHAPTER 1 GENERAL ........
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CHAPTER 8 WATCH TIMER .............
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LIST OF FIGURES (1/3) Figure No. Ti
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LIST OF FIGURES (3/3) Figure No. Ti
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LIST OF TABLES (2/2) Table No. Titl
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1.4 Pin Configuration (Top View)
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CHAPTER 1 GENERAL The major functio
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An outline of the timer is shown be
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(2) Non-port pins CHAPTER 2 PIN FUN
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CHAPTER 2 PIN FUNCTIONS 2.2.5 P90 t
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CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O
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3.1 Memory Space CHAPTER 3 CPU ARCH
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Data memory space Program memory sp
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CHAPTER 3 CPU ARCHITECTURE 3.1.2 In
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FFFFH FF20H FF1FH FF00H FEFFH FE20H
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3.2 Processor Registers CHAPTER 3 C
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CHAPTER 3 CPU ARCHITECTURE (3) Stac
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CHAPTER 3 CPU ARCHITECTURE 3.2.3 Sp
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3.3 Instruction Address Addressing
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3.3.3 Table indirect addressing CHA
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3.4.2 Short direct addressing CHAPT
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3.4.4 Register addressing CHAPTER 3
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3.4.6 Based addressing CHAPTER 3 CP
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CHAPTER 4 PORT FUNCTIONS Table 4-1.
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CHAPTER 4 PORT FUNCTIONS 4.2.2 Port
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Internal bus WRPUB2 RD WRPORT WRPM
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CHAPTER 4 PORT FUNCTIONS 4.2.4 Port
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4.3 Port Function Control Registers
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4.4 Operation of Port Functions CHA
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XT1 XT2 X1 X2 Internal bus FRC SCC
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CHAPTER 5 CLOCK GENERATOR (2) Subos
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CHAPTER 5 CLOCK GENERATOR Figure 5-
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5.5 Clock Generator Operation CHAPT
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CHAPTER 5 CLOCK GENERATOR 5.6.2 Swi
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CHAPTER 6 8-BIT REMOTE CONTROL TIME
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CHAPTER 6 8-BIT REMOTE CONTROL TIME
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7.2 8-Bit Timer Configuration The 8
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7.3 Registers Controlling 8-Bit Tim
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7.4 8-Bit Timer Operation CHAPTER 7
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8.1 Watch Timer Functions The watch
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WTM CHAPTER 8 WATCH TIMER Figure 8-
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CHAPTER 9 WATCHDOG TIMER The watchd
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9.3 Registers Controlling Watchdog
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9.4 Watchdog Timer Operation CHAPTE
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10.1 Serial Interface 10 Functions
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10.3 Register Controlling Serial In
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10.4 Serial Interface 10 Operation
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CHAPTER 10 SERIAL INTERFACE 10 (2)
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11.2 VFD Controller/Driver Configur
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(2) Display mode register 1 (DSPM1)
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CHAPTER 11 VFD CONTROLLER/DRIVER 11
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CHAPTER 11 VFD CONTROLLER/DRIVER (2
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CHAPTER 11 VFD CONTROLLER/DRIVER 11
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Page 129 and 130: CHAPTER 12 INTERRUPT FUNCTIONS (4)
Page 131 and 132: CHAPTER 12 INTERRUPT FUNCTIONS Figu
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Page 135 and 136: INTxx CHAPTER 12 INTERRUPT FUNCTION
Page 137 and 138: 13.1 Standby Function and Configura
Page 139 and 140: 13.2 Operation of Standby Function
Page 141 and 142: CHAPTER 13 STANDBY FUNCTION (c) Rel
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Page 145 and 146: CHAPTER 14 RESET FUNCTION The follo
Page 147 and 148: CHAPTER 14 RESET FUNCTION Table 14-
Page 149 and 150: 15.1 Flash Memory Programming VPP R
Page 151 and 152: CHAPTER 15 µPD78F9872 15.1.4 Examp
Page 153 and 154: CHAPTER 17 INSTRUCTION SET This cha
Page 155 and 156: 17.2 Operation List CHAPTER 17 INST
Page 157 and 158: CHAPTER 17 INSTRUCTION SET Mnemonic
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Page 161 and 162: CHAPTER 17 INSTRUCTION SET (2) 16-b
Page 163 and 164: APPENDIX A DEVELOPMENT TOOLS The fo
Page 165 and 166: A.1 Language Processing Software AP
Page 167: A.3.2 Software ID78K0S-NS Integrate
Page 171 and 172: C.2 Register Symbol Index (Alphabet
Page 173: Facsimile Message From: Name Compan
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uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

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