uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM

LIST OF FIGURES (1/3)
Figure No. Title Page
2-1 Pin I/O Circuits ...................................................................................................................................... 30
3-1 Memory Map (µPD789870) .................................................................................................................. 31
3-2 Memory Map (µPD789871) .................................................................................................................. 32
3-3 Memory Map (µPD78F9872) ................................................................................................................ 33
3-4 Data Memory Addressing (µPD789870) .............................................................................................. 36
3-5 Data Memory Addressing (µPD789871) .............................................................................................. 37
3-6 Data Memory Addressing (µPD78F9872) ............................................................................................ 38
3-7 Program Counter Configuration ........................................................................................................... 39
3-8 Program Status Word Configuration .................................................................................................... 39
3-9 Stack Pointer Configuration .................................................................................................................. 41
3-10 Data to Be Saved to Stack Memory ..................................................................................................... 41
3-11 Data to Be Restored from Stack Memory ............................................................................................ 41
3-12 General-Purpose Register Configuration ............................................................................................. 42
4-1 Port Types ............................................................................................................................................. 54
4-2 Block Diagram of P00 to P07 ............................................................................................................... 56
4-3 Block Diagram of P10 to P12 ............................................................................................................... 57
4-4 Block Diagram of P20 ........................................................................................................................... 58
4-5 Block Diagram of P21 ........................................................................................................................... 59
4-6 Block Diagram of P22 to P25 ............................................................................................................... 60
4-7 Block Diagram of P80 to P87 (µPD789870, 789871) ......................................................................... 61
4-8 Block Diagram of P80 to P87 (µPD78F9872) ...................................................................................... 61
4-9 Block Diagram of P90 to P97 (µPD789870, 789871) ......................................................................... 62
4-10 Block Diagram of P90 to P97 (µPD78F9872) ...................................................................................... 62
4-11 Port Mode Register Format .................................................................................................................. 64
4-12 Pull-Up Resistor Option Register 0 Format ......................................................................................... 64
4-13 Pull-Up Resistor Option Register B2 Format ....................................................................................... 64
5-1 Block Diagram of Clock Generator....................................................................................................... 67
5-2 Processor Clock Control Register Format ........................................................................................... 68
5-3 Suboscillation Mode Register Format .................................................................................................. 69
5-4 Subclock Control Register Format ....................................................................................................... 69
5-5 External Circuit of Main System Clock Oscillator ................................................................................ 70
5-6 External Circuit of Subsystem Clock Oscillator ................................................................................... 70
5-7 Examples of Incorrect Resonator Connection ..................................................................................... 71
5-8 Switching Between System Clock and CPU Clock ............................................................................. 75
6-1 Block Diagram of 8-Bit Remote Control Timer .................................................................................... 76
6-2 Remote Control Timer Control Register 50 Format............................................................................. 77
6-3 Pulse Width Measurement Timing........................................................................................................ 78
7-1 Block Diagram of 8-Bit Timer 80 .......................................................................................................... 81
7-2 Block Diagram of 8-Bit Timer 81 .......................................................................................................... 82
Preliminary User’s Manual U14938EJ1V0UM 13