uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM
uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM
uPD789871 Subseries 8-Bit Single-Chip Microcontrollers PUM
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(2) Display mode register 1 (DSPM1)<br />
DSPM1 performs the following setting.<br />
Symbol<br />
DSPM1<br />
• Blanking width of VFD output signal<br />
• Number of display patterns<br />
CHAPTER 11 VFD CONTROLLER/DRIVER<br />
DSPM1 is set with a 1-bit or 8-bit memory manipulation instruction.<br />
RESET input sets DSPM1 to 01H.<br />
7<br />
FBLK2<br />
6<br />
FBLK1<br />
Figure 11-3. Display Mode Register 1 Format<br />
FBLK2 FBLK1 FBLK0 Blanking width of VFD output signal<br />
0 0 0 1/16<br />
0 0 1 2/16<br />
0 1 0 4/16<br />
0 1 1 6/16<br />
1 0 0 8/16<br />
1 0 1 10/16<br />
1 1 0 12/16<br />
1 1 1 14/16<br />
5<br />
FBLK0<br />
4<br />
FPAT4<br />
3<br />
FPAT3<br />
FPAT4 FPAT3 FPAT2 FPAT1 FPAT0 Number of display patterns<br />
0 0 0 0 1 2<br />
0 0 0 1 0 3<br />
0 0 0 1 1 4<br />
0 0 1 0 0 5<br />
0 0 1 0 1 6<br />
0 0 1 1 0 7<br />
0 0 1 1 1 8<br />
0 1 0 0 0 9<br />
0 1 0 0 1 10<br />
0 1 0 1 0 11<br />
0 1 0 1 1 12<br />
0 1 1 0 0 13<br />
0 1 1 0 1 14<br />
0 1 1 1 0 15<br />
0 1 1 1 1 16<br />
Other than above Setting prohibited<br />
2<br />
FPAT2<br />
Caution Do not write data to the display mode register 1 (DSPM1) when bit 7 (DSPEN) of the display<br />
mode register 0 (DSPM0) is 1.<br />
Preliminary User’s Manual U14938EJ1V0UM<br />
1<br />
FPAT1<br />
0<br />
FPAT0<br />
Address<br />
FFA1H<br />
After reset<br />
01H<br />
R/W<br />
R/W<br />
107
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