uPD780065 Subseries PUM - Renesas Electronics

3.4.8 Based indexed addressing
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CHAPTER 3 CPU ARCHITECTURE
[Function]
The B or C register contents specified in an instruction are added to the contents of the base register, that is,
the HL register pair in an instruction word of the register bank specified with the register bank select flag (RBS0
and RBS1) and the sum is used to address the memory.
Addition is performed by expanding the offset data as a positive number to 16 bits. A carry from the 16th bit
is ignored. This addressing can be carried out for all the memory spaces.
[Operand format]
[Description example]
In the case of MOV A, [HL + B]
3.4.9 Stack addressing
Identifier Description
— [HL + B], [HL + C]
Operation code 1 0 1 0 1 0 1 1
[Function]
The stack area is indirectly addressed with the stack pointer (SP) contents.
This addressing method is automatically employed when the PUSH, POP, subroutine call and return instructions
are executed or the register is saved/reset upon generation of an interrupt request.
Stack addressing enables to address the internal high-speed RAM area only.
[Description example]
In the case of PUSH DE
Operation code 1 0 1 1 0 1 0 1
Preliminary User’s Manual U13420EJ2V0UM00