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uPD780065 Subseries PUM - Renesas Electronics

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The following shows major revisions up to now.<br />

APPENDIX D REVISION HISTORY<br />

Edition Major Revisions from Previous Edition Revised Chapters<br />

2nd Modification of description of on-chip pull-up resistor specification CHAPTER 2 PIN<br />

Modification of description of TI00 pin<br />

Addition of input/output circuit type of each pin and pin input/output circuit figures<br />

Preliminary User’s Manual U13420EJ2V0UM00<br />

FUNCTION<br />

Modification of caution on register initial setting for memory space CHAPTER 3 CPU<br />

Modification of register symbols<br />

ADTC → ADTC0, ADTP → ADTP0, ADTI → ADTI0<br />

ARCHITECTURE<br />

Modification of setting of on-chip pull-up resistor to not depend on input/output CHAPTER 4 PORT<br />

mode FUNCTION<br />

Addition of PPG output column and modification of number of interval timers CHAPTER 6 16-BIT<br />

Addition of clear by OSPT bit in block diagram of TM0<br />

Addition of CR01 column in table of pin valid edges and capture triggers<br />

Addition of OSPT bit caution<br />

Addition and modification of cautions on external clock and capture trigger<br />

(addition of description of sampling clock for noise elimination)<br />

TIMER/EVENT COUNTER<br />

Modification of input buffer to schmitt triggered input in block diagram of UART CHAPTER 13 SERIAL<br />

INTERFACE (UART0)<br />

Modification of register symbols and bit names CHAPTER 14 SERIAL<br />

• Automatic data transmit/receive address pointer (ADTP0) INTERFACE (SIO1)<br />

• Automatic data transmit/receive control register (ADTC0)<br />

• Automatic data transmit/receive interval register (ADTI0)<br />

• Bit name of serial operation mode register 1 (CSM1)<br />

Deletion of direction control circuit in block diagrams of SIO30, SIO31 CHAPTER 15 SERIAL<br />

INTERFACE (SIO30)<br />

CHAPTER 16 SERIAL<br />

INTERFACE (SIO31)<br />

Addition of description of capture register specification to INTTM00, INTTTM01 CHAPTER 17<br />

triggers INTERRUPT FUNCTIONS<br />

Modification of interrupt flag name (WTPR → WTPR0)<br />

Addition of a caution on initial setting of memory size switching register (IMS) CHAPTER 21<br />

Addition of Flashpro III as a flash writing tool<br />

μPD78F0066<br />

Addition of description of Windows for supporting PC98-NX series, modification of APPENDIX A<br />

supported OS version, addition of Solaris to OSs, addition of performance board<br />

IE-78K0-NS-PA, and interface adapter IE-70000-PCI-IF<br />

DEVELOPMENT TOOLS<br />

349

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