uPD780065 Subseries PUM - Renesas Electronics

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LIST OF TABLES (2/2) Table No. Title Page 15-1 Serial Interface (SIO30) Configuration .............................................................................................. 252 16-1 Serial Interface (SIO31) Configuration .............................................................................................. 258 17-1 Interrupt Source List ......................................................................................................................... 264 17-2 Flags Corresponding to Interrupt Request Sources ......................................................................... 267 17-3 Times from Generation of Maskable Interrupt until Servicing ........................................................... 276 17-4 Interrupt Request Enabled for Multiple Interrupt during Interrupt Servicing ...................................... 279 18-1 Pin Functions in External Memory Expansion Mode ........................................................................ 283 18-2 State of Port 4 to 6 Pins in External Memory Expansion Mode ........................................................ 283 19-1 HALT Mode Operating Statuses ....................................................................................................... 295 19-2 Operation after HALT Mode Release ................................................................................................ 297 19-3 STOP Mode Operating Status .......................................................................................................... 298 19-4 Operation after STOP Mode Release ............................................................................................... 300 20-1 Hardware Statuses after Reset ......................................................................................................... 303 21-1 Differences between μPD78F0066 and Mask ROM Version ............................................................ 305 21-2 Transmission Method List ................................................................................................................. 308 21-3 Main Functions of Flash Memory Programming ............................................................................... 309 22-1 Operand Identifiers and Description Methods .................................................................................. 312 A-1 System-up Method from Former In-circuit Emulator for 78K/0 Series to the IE-78001-R-A ............. 336 24 Preliminary User’s Manual U13420EJ2V0UM00
1.1 Features • Internal Memory CHAPTER 1 OUTLINE Type Program Memory Data Memory Part Number (Mask ROM/Flash memory) High-Speed RAM Expansion RAM Buffer RAM μPD780065 40 Kbytes 1024 bytes 4096 bytes 32 bytes μPD78F0066 48 Kbytes Note Note The capacity of internal flash memory can be changed by means of the memory size switching register (IMS). • External Memory Expansion Space: 64 Kbytes • Minimum instruction execution time changeable from high speed (0.24 μs: @ 8.38-MHz operation with main system clock) to ultra-low speed (122 μs: @ 32.768-kHz operation with subsystem clock) • Instruction set suited to system control • Bit manipulation possible in all address spaces • Multiply and divide instructions • Sixty I/O ports • 8-bit resolution A/D converter: 8 channels • Serial interface: 4 channels • 3-wire serial I/O mode (provided with automatic transmission/reception function): 1 channel • 3-wire serial I/O mode: 1 channel • 2-wire serial I/O mode: 1 channel • UART mode: 1 channel • Timer: Five channels • 16-bit timer/event counter: 1 channel • 8-bit timer/event counter: 2 channels • Watch timer: 1 channel • Watchdog timer: 1 channel • Vectored interrupts: 20 • Two types of on-chip clock oscillators (main system clock and subsystem clock) • Power supply voltage: VDD = 2.7 to 5.5 V Preliminary User’s Manual U13420EJ2V0UM00 25
Page 1 and 2: To our customers, Old Company Name
Page 3 and 4: Preliminary User’s Manual μPD780
Page 5 and 6: NOTES FOR CMOS DEVICES 1 PRECAUTION
Page 7 and 8: NEC Electronics Inc. (U.S.) Santa C
Page 9 and 10: INTRODUCTION Readers This manual ha
Page 11 and 12: • Related documents for embedded
Page 13 and 14: CONTENTS CHAPTER 1 OUTLINE ........
Page 15 and 16: 5.5 Clock Generator Operations ....
Page 17 and 18: CHAPTER 15 SERIAL INTERFACE (SIO30)
Page 19 and 20: LIST OF FIGURES (1/5) Figure No. Ti
Page 25: LIST OF TABLES (1/2) Table No. Titl
Page 29 and 30: 1.4 Pin Configuration (Top View)
Page 31 and 32: 1.5 78K/0 Series Lineup CHAPTER 1 O
Page 33 and 34: 1.6 Block Diagram TI00/TO0/P20 TI01
Page 35 and 36: 2.1 Pin Functions (1) Port Pins (1/
Page 37 and 38: (2) Non-port Pins (2/2) CHAPTER 2 P
Page 39 and 40: CHAPTER 2 PIN FUNCTION 2.2.3 P30 to
Page 41 and 42: CHAPTER 2 PIN FUNCTION 2.2.8 P80 to
Page 43 and 44: CHAPTER 2 PIN FUNCTION 2.3 Pin I/O
Page 45 and 46: 3.1 Memory Space CHAPTER 3 CPU ARCH
Page 47 and 48: CHAPTER 3 CPU ARCHITECTURE 3.1.1 In
Page 49 and 50: CHAPTER 3 CPU ARCHITECTURE 3.1.2 In
Page 51 and 52: FFFFH FF20H FF1FH FF00H FEFFH FEE0H
Page 53 and 54: CHAPTER 3 CPU ARCHITECTURE (a) Inte
Page 55 and 56: CHAPTER 3 CPU ARCHITECTURE 3.2.2 Ge
Page 57 and 58: CHAPTER 3 CPU ARCHITECTURE Table 3-
Page 59 and 60: CHAPTER 3 CPU ARCHITECTURE Table 3-
Page 61 and 62: 3.3.2 Immediate addressing CHAPTER
Page 63 and 64: 3.3.4 Register addressing CHAPTER 3
Page 65 and 66: 3.4.2 Register addressing CHAPTER 3
Page 67 and 68: 3.4.4 Short direct addressing CHAPT
Page 69 and 70: 3.4.5 Special-function register (SF
Page 71 and 72: 3.4.7 Based addressing CHAPTER 3 CP
Page 73 and 74: 4.1 Port Functions CHAPTER 4 PORT F
Page 75 and 76: 4.2 Port Configuration A port consi
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CHAPTER 4 PORT FUNCTIONS 4.2.2 Port
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Internal bus WRPU RD WRPORT WRPM PU
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CHAPTER 4 PORT FUNCTIONS Figure 4-1
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CHAPTER 4 PORT FUNCTIONS Figure 4-1
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5.1 Clock Generator Functions CHAPT
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5.3 Clock Generator Control Registe
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CHAPTER 5 CLOCK GENERATOR The faste
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CHAPTER 5 CLOCK GENERATOR Cautions
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CHAPTER 5 CLOCK GENERATOR 5.4.3 Sca
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CHAPTER 5 CLOCK GENERATOR 5.5.1 Mai
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Set Value before Switchover CHAPTER
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CHAPTER 6 16-BIT TIMER/EVENT COUNTE
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TI01/P21 fX/2 3 TI00/TO0/P20 Captur
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TMC03 TMC02 TMC01 CHAPTER 6 16-BIT
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TI00/TO0/P20 Count clock TM0 count
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CRC0 CHAPTER 6 16-BIT TIMER/EVENT C
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fX/2 3 Valid edge of TI00 TI00 pin
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Count clock TM0 count value CR00 IN
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7.1 8-Bit Timer/Event Counter Funct
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7.2 8-Bit Timer/Event Counter Confi
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CHAPTER 7 8-BIT TIMER/EVENT COUNTER
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Count clock TM5n count value CR5n T
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n = 0, 1 Count clock TM5 CR5n TCE5n
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Count clock n = 0, 1 TM5n CR5n TCE5
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8.1 Watch Timer Functions The watch
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8.3 Register to Control Watch Timer
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Count clock fW/2 9 Watch timer inte
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9.1 Watchdog Timer Functions The wa
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9.2 Watchdog Timer Configuration CH
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CHAPTER 9 WATCHDOG TIMER (2) Watchd
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9.4 Watchdog Timer Operations CHAPT
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CHAPTER 10 CLOCK OUTPUT CONTROL CIR
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Address: FF40H After reset: 00H R/W
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11.1 A/D Converter Functions CHAPTE
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CHAPTER 11 A/D CONVERTER (6) ANI0 t
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CHAPTER 11 A/D CONVERTER (2) Analog
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A/D converter operation SAR ADCR0 I
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CHAPTER 11 A/D CONVERTER 11.4.3 A/D
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CHAPTER 11 A/D CONVERTER (4) Noise
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CHAPTER 12 SERIAL INTERFACE OUTLINE
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13.1 Serial Interface (UART0) Funct
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CHAPTER 13 SERIAL INTERFACE (UART0)
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13.4 Serial Interface (UART0) Opera
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Address: FFA0H After reset: 00H R/W
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(2) Communication operations CHAPTE
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14.1 Serial Interface (SIO1) Functi
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Figure 14-1. Block Diagram of Seria
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14.3 Serial Interface (SIO1) Contro
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CHAPTER 14 SERIAL INTERFACE (SIO1)
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Symbol Address: FF68H After reset:
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Symbol Address: FF6BH After reset:
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(3) Communication operation CHAPTER
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SCK1 CHAPTER 14 SERIAL INTERFACE (S
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SCK1 SO1 SI1 BUSY CSIIF1 TRF0 CHAPT
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15.1 Serial Interface (SIO30) Funct
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16.1 Serial Interface (SIO31) Funct
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17.1 Interrupt Function Types CHAPT
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(A) Internal non-maskable interrupt
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17.3 Interrupt Function Control Reg
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CHAPTER 17 INTERRUPT FUNCTIONS (2)
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CHAPTER 17 INTERRUPT FUNCTIONS (4)
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17.4 Interrupt Servicing Operations
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CHAPTER 17 INTERRUPT FUNCTIONS Figu
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CHAPTER 17 INTERRUPT FUNCTIONS 17.4
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CHAPTER 18 EXTERNAL DEVICE EXPANSIO
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ASTB RD AD0 to AD7 A8 to A15 ASTB R
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ASTB RD WR AD0 to AD7 A8 to A15 AST
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19.1 Standby Function and Configura
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19.2 Standby Function Operations 19
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CHAPTER 19 STANDBY FUNCTION (c) Cle
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CHAPTER 19 STANDBY FUNCTION (2) STO
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20.1 Reset Function CHAPTER 20 RESE
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CHAPTER 20 RESET FUNCTION Table 20-
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CHAPTER 21 μPD78F0066 The μPD78F0
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CHAPTER 21 μPD78F0066 21.2 Interna
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CHAPTER 21 μPD78F0066 21.3.2 Flash
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CHAPTER 22 INSTRUCTION SET This cha
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CHAPTER 22 INSTRUCTION SET 22.1.2 D
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Instruction Group 16-bit data trans
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Instruction Group 8-bit operation C
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CHAPTER 22 INSTRUCTION SET Instruct
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CHAPTER 22 INSTRUCTION SET Instruct
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CHAPTER 22 INSTRUCTION SET Second O
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CHAPTER 22 INSTRUCTION SET (4) Call
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APPENDIX A DEVELOPMENT TOOLS The fo
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(2) When using the in-circuit emula
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APPENDIX A DEVELOPMENT TOOLS Remark
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A.3.1 Hardware (2/2) (2) When using
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A.3.2 Software (2/2) ID78K0-NS Inte
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APPENDIX A DEVELOPMENT TOOLS Conver
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APPENDIX B EMBEDDED SOFTWARE For ef
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Real-Time OS (2/2) APPENDIX B EMBED
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APPENDIX C REGISTER INDEX C.1 Regis
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16-bit timer/counter 0 (TM0) … 10
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[P] P0: Port 0 … 73 P2: Port 2
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