uPD780065 Subseries PUM - Renesas Electronics
uPD780065 Subseries PUM - Renesas Electronics
uPD780065 Subseries PUM - Renesas Electronics
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LIST OF FIGURES (3/5)<br />
Figure No. Title Page<br />
8-1 Watch Timer Block Diagram ............................................................................................................. 155<br />
8-2 Format of Watch Timer Mode Control Register (WTM) .................................................................... 157<br />
8-3 Operation Timing of Watch Timer/Interval Timer ............................................................................... 159<br />
9-1 Watchdog Timer Block Diagram ....................................................................................................... 161<br />
9-2 Format of Watchdog Timer Clock Select Register (WDCS) .............................................................. 164<br />
9-3 Format of Watchdog Timer Mode Register (WDTM) ........................................................................ 165<br />
9-4 Format of Oscillation Stabilization Time Select Register (OSTS) ..................................................... 166<br />
10-1 Clock Output Control Circuit Block Diagram ..................................................................................... 169<br />
10-2 Format of Clock Output Select Register (CKS) ................................................................................ 171<br />
10-3 Format of Port Mode Register 7 (PM7) ............................................................................................. 171<br />
10-4 Remote Control Output Application Example ................................................................................... 172<br />
11-1 A/D Converter Block Diagram ........................................................................................................... 173<br />
11-2 Format of A/D Converter Mode Register (ADM0) ............................................................................. 176<br />
11-3 Format of Analog Input Channel Specification Register (ADS0) ...................................................... 177<br />
11-4 Basic Operation of A/D Converter ..................................................................................................... 179<br />
11-5 Relationship between Analog Input Voltage and A/D Conversion Result ......................................... 180<br />
11-6 A/D Conversion ................................................................................................................................. 181<br />
11-7 Example of Method of Reducing Current Consumption in Standby Mode ....................................... 182<br />
11-8 Analog Input Pin Connection ............................................................................................................ 183<br />
11-9 A/D Conversion End Interrupt Request Generation Timing .............................................................. 184<br />
13-1 Serial Interface (UART0) Block Diagram .......................................................................................... 187<br />
13-2 Format of Asynchronous Serial Interface Mode Register (ASIM0) ................................................... 190<br />
13-3 Format of Asynchronous Serial Interface Status Register (ASIS0) .................................................. 191<br />
13-4 Format of Baud Rate Generator Control Register (BRGC0) ............................................................ 192<br />
13-5 Error Tolerance (when k = 0), Including Sampling Errors ................................................................. 200<br />
13-6 Format of Transmit/Receive Data in Asynchronous Serial Interface ................................................ 201<br />
13-7 Timing of Asynchronous Serial Interface Transmit Completion Interrupt Request ............................ 203<br />
13-8 Timing of Asynchronous Serial Interface Receive Completion Interrupt Request ............................ 204<br />
13-9 Receive Error Timing ........................................................................................................................ 205<br />
13-10 Data Format Comparison between Infrared Data Transfer Mode and UART Mode ......................... 206<br />
14-1 Block Diagram of Serial Interface (SIO1) .......................................................................................... 211<br />
14-2 Format of Serial Operation Mode Register 1 (CSIM1) ...................................................................... 214<br />
14-3 Format of Automatic Data Transmit/Receive Control Register (ADTC0) .......................................... 215<br />
14-4 Format of Automatic Data Transmit/Receive Interval Specification Register (ADTI0) ...................... 217<br />
14-5 3-Wire Serial I/O Mode Timings ........................................................................................................ 222<br />
14-6 Switching Circuit in Transfer Bit Order .............................................................................................. 223<br />
14-7 Basic Transmit/Receive Mode Operation Timings ............................................................................ 231<br />
14-8 Basic Transmit/Receive Mode Flowchart .......................................................................................... 232<br />
14-9 Buffer RAM Operation in 6-Byte Transmission/Reception (in Basic Transmit/Receive Mode) ......... 233<br />
Preliminary User’s Manual U13420EJ2V0UM00<br />
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