uPD780065 Subseries PUM - Renesas Electronics

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CHAPTER 6 16-BIT TIMER/EVENT COUNTER
Figure 6-18. Timing of Pulse Width Measurement Operation by Free-Running Counter
and Two Capture Registers (with Rising Edge Specified)
Count clock
TM0 count value
TI00 pin input
CR01 capture value
CR00 capture value
INTTM01
OVF0
t
0000H 0001H D0 D0 + 1 D1 D1 + 1 FFFFH 0000H D2 D2 + 1 D3
D0
(4) Pulse width measurement by means of restart
When input of a valid edge to the TI00/TO0/P20 pin is detected, the count value of 16-bit timer/counter 0 (TM0)
is taken into 16-bit timer capture/compare register 01 (CR01), and then the pulse width of the signal input to the
TI00/TO0/P20 pin is measured by clearing TM0 and restarting the count (see register settings in Figure 6-19).
The edge specification can be selected from two types, rising and falling edges by bits 4 and 5 (ES00 and ES01)
of the prescaler mode resister 0 (PRM0).
In a valid edge detection, the sampling is performed by a cycle selected by the prescaler mode resistor 0 (PRM0)
and a capture operation is only performed when a valid level is detected twice, thus eliminating noise with a short
pulse width.
Caution If the valid edge of TI00/TO0/P20 pin is specified to be both rising and falling edges, 16-bit
capture/compare register 00 (CR00) cannot perform the capture operation.
Preliminary User’s Manual U13420EJ2V0UM00
D1 D3
(D1 – D0) × t (10000H – D1 + D2) × t
(D3 – D2) × t
D2