uPD780065 Subseries PUM - Renesas Electronics

TMC03 TMC02 TMC01
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
Figure 6-2. Format of 16-Bit Timer Mode Control Register 0 (TMC0)
Address FF60H After reset: 00H R/W
Symbol
TMC0
7
0
Operating mode
and clear mode selection
Preliminary User’s Manual U13420EJ2V0UM00
TO0 output timing selection Interrupt request generation
0 0 0 Operation stop No change Not generated
0 0 1 (TM0 cleared to 0)
0 1 0 Free running mode Match between TM0 and
CR00 or match between TM0
and CR01
0 1 1 Match between TM0 and
CR00, match between TM0
and CR01 or TI00 valid edge
1 0 0 Clear & start on TI00 valid —
1 0 1 edge
1 1 0 Clear & start on match Match between TM0 and
between TM0 and CR00 CR00 or match between TM0
and CR01
1 1 1 Match between TM0 and
CR00, match between TM0
and CR01 or TI00 valid edge
OVF0 TM0 overflow detection
0 Overflow not detected
1 Overflow detected
6
0
5
0
4
0
Cautions 1. Timer operation must be stopped before writing to bits other than the OVF0 flag.
2. Set the valid edge of the TI00/TO0/P20 pin with prescaler mode register 0 (PRM0).
3. If clear & start mode on match between TM0 and CR00 is selected, when the set value of
CR00 is FFFFH and the TM0 value changes from FFFFH to 0000H, OVF0 flag is set to 1.
Remarks 1. TO0: 16-bit timer/event counter output pin
2. TI00: 16-bit timer/event counter input pin
3. TM0: 16-bit timer/counter 0
4. CR00: Compare register 00
5. CR01: Compare register 01
3
2
TMC03 TMC02 TMC01 OVF0
1
0
Generated on match
between TM0 and CR00, or
match between TM0 and
CR01
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