MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

I- 16 Index
rules 109
block write request protocol 117
buffers 89
bus encoding
description of buses 95
SysAD 102
SysCmd 95
SysResp 105
SysState 104
cached request buffer 89
clock domain 156
cluster bus 82
cluster request buffer 89
coherency 141
coherency conflicts, action taken 143
connecting to an external agent 81
connections to various system configurations 83
directory-based coherency protocol 153
error handling
on buses 181
on SysAD bus 182
on SysCmd bus 181
on SysResp bus 184
on SysState bus 184
schemes 180
error protection
for buses 180
schemes 180
external agent 79
external allocate request number request protocol 134
external block data response protocol 127
external coherency requests, action taken 142
external completion response protocol 130
external data response flow control 93, 94
external double/single/partial-word data response
protocol 129
external duplicate tags, support for 152
external interrupt request protocol 136
external intervention exclusive request 141
external intervention request protocol 133
external intervention shared request 141
external invalidate request 141
protocol 135
external request 80, 87
flow control 93
protocol 132
external response 80, 87
protocol 127
flow control 93
frequencies 80
grant parking 108
hardware emulation, support for 154
I/O 152
incoming buffer 90
internal coherency conflicts 143
interrupts 105
master state 81
multiprocessor connections
with cluster bus 85
with dedicated external agents 84
outgoing buffer 91
outstanding processor requests 87
outstanding requests on the System interface 87
port 4
processor block read request protocol 113
processor coherency data response protocol 139
processor coherency state response protocol 138
processor double/single/partial-word read request
protocol 115
processor double/single/partial-word write request
protocol 119
processor eliminate request protocol 123
processor request 80, 86
flow control protocol 125
protocol 112
processor response 80, 87
protocols 137
processor upgrade request protocol 121
register-to-register operation 80
request 86
cycle 80
number field 87
protocol 112
response 86
cycle 80
protocol 112
signals 41, 81
slave state 81
split transaction 87
support for I/O 152
uncached attribute 153
uncached buffer 92
uniprocessor connections 83
SysUncErr, signal 42, 169, 170, 174, 175, 179
SysVal, signal 42, 113, 115, 117, 119, 121, 123, 127,
129, 133, 134, 135, 136, 139, 181, 360,
364, 365, 366, 367
Version 2.0 of January 29, 1997 MIPS R10000 Microprocessor User's Manual