MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

252 Chapter 14.
14.11 Cause Register (13)
1
The 32-bit read/write Cause register describes the cause of the most recent
exception.
Figure 14-13 shows the fields of this register; Table 14-12 describes the Cause
register fields. A 5-bit exception code (ExcCode) indicates one of the causes, as
listed in Table 14-13.
All bits in the Cause register, with the exception of the IP[1:0] bits, are read-only;
IP[1:0] are used for software interrupts.
BD
CE
Table 14-12 Cause Register Fields
Field Description
Indicates whether the last exception taken occurred in a branch
delay slot.
1 → delay slot
0 → normal
Coprocessor unit number referenced when a Coprocessor
Unusable exception is taken. This bit is undefined for any other
exception.
Indicates an interrupt is pending. This bit remains unchanged for
NMI, Soft Reset, and Cache Error exceptions.
IP
1 → interrupt pending
0 → no interrupt
ExcCode Exception code field (see Table 14-13)
0
Reserved. Must be written as zeroes, and returns zeroes when
read.
Cause Register
31 30 29 28 27 16 15
BD 0 CE 0 IP7
IP0
1
2 12
Figure 14-13 Cause Register Format
Version 2.0 of January 29, 1997 MIPS R10000 Microprocessor User's Manual
8 7 6 2 1 0
Exc
Code
8 1 5 2
0
0