MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library
MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library
MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library
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xx Table of Contents<br />
10<br />
CACHE Instructions<br />
Notes on CACHE Instruction Operations ..................................................................................188<br />
Virtual Address ....................................................................................................................188<br />
Physical Address ..................................................................................................................188<br />
CP0 Not Usable.....................................................................................................................188<br />
TLB Refill and TLB Invalid Exceptions on CacheOps ....................................................189<br />
Hit Operation Accesses .......................................................................................................189<br />
Watch Exception...................................................................................................................189<br />
Address Error Exception.....................................................................................................189<br />
Write Back .............................................................................................................................189<br />
Invalidation ...........................................................................................................................190<br />
CE Bit......................................................................................................................................190<br />
CH Bit.....................................................................................................................................190<br />
Serial Operation of CACHE Instructions..........................................................................190<br />
Instructions Not Supported ................................................................................................190<br />
Op Field Encoding ...............................................................................................................191<br />
Index Invalidate (I).........................................................................................................................192<br />
Index WriteBack Invalidate (D)....................................................................................................192<br />
Index WriteBack Invalidate (S).....................................................................................................193<br />
Index Load Tag (I) ..........................................................................................................................194<br />
Index Load Tag (D) ........................................................................................................................194<br />
Index Load Tag (S) .........................................................................................................................195<br />
Index Store Tag (I) ..........................................................................................................................195<br />
Index Store Tag (D) ........................................................................................................................196<br />
Index Store Tag (S) .........................................................................................................................196<br />
Hit Invalidate (I) .............................................................................................................................197<br />
Hit Invalidate (D) ...........................................................................................................................197<br />
Hit Invalidate (S) ............................................................................................................................198<br />
Cache Barrier...................................................................................................................................198<br />
Hit Writeback Invalidate (D) ........................................................................................................199<br />
Hit WriteBack Invalidate (S) .........................................................................................................200<br />
Index Load Data (I) ........................................................................................................................201<br />
Index Load Data (D).......................................................................................................................201<br />
Index Load Data (S)........................................................................................................................201<br />
Index Store Data (I) ........................................................................................................................202<br />
Index Store Data (D).......................................................................................................................202<br />
Index Store Data (S)........................................................................................................................202<br />
Version 2.0 of January 29, 1997 <strong>MIPS</strong> <strong>R10000</strong> <strong>Microprocessor</strong> <strong>User's</strong> <strong>Manual</strong>