MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

System Interface Operations 125
Processor Request Flow Control Protocol
The processor provides the signals SysRdRdy* and SysWrRdy* to allow an
external agent to control the flow of processor requests. SysRdRdy* controls the
flow of processor read and upgrade requests whereas SysWrRdy* controls the
flow of processor write and eliminate requests.
The processor can only issue a processor read or upgrade request address cycle to
the System interface if SysRdRdy* was asserted two SysClk cycles previously.
Similarly, the processor can only issue the address cycle of a processor write or
eliminate request to the System interface if SysWrRdy* was asserted two SysClk
cycles previously.
To determine the processor request buffering requirements for the external agent,
note that the processor can issue any combination of processor requests in
adjacent SysClk cycles. Also, since the System interface operates register-toregister
with the external agent, a round trip delay of four SysClk cycles occurs
between a processor request address cycle which prompts the external agent for
flow control, and the flow control actually preventing any additional processor
request address cycles from occurring. Consequently, if the maximum number of
outstanding processor requests specified by the PrcReqMax mode bits is four, the
external agent must be able to accept at least four processor read or upgrade
requests. Also, the external agent must be able to accept at least four processor
eliminate requests, two processor double/single/partial-word write requests, or
one processor block write request.
Figure 6-16 depicts three processor double/single/partial-word write requests
and four processor block read requests. After sensing the first processor double/
single/partial-word write request, the external agent negates SysWrRdy*. The
external agent must have buffering sufficient for one additional processor write
request before the flow control takes effect.
The external agent negates SysRdRdy* upon observing the first processor read
request. The external agent must have buffering sufficient for three additional
processor read requests before the flow control takes effect.
MIPS R10000 Microprocessor User's Manual Version 2.0 of January 29, 1997