MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

108 Chapter 6.
6.16 System Interface Arbitration
SysResp[4:0] Abbreviations
Rsp Unspecified completion response
ACK Acknowledge completion response
ERR Error completion response
NACK Negative acknowledge completion response
Master Abbreviations
EA External agent
Pn R10000 processor whose device number is n
- Dead cycle
The processor supports a simple System interface arbitration protocol, which relies
on an external arbiter. This protocol is used in uniprocessor systems,
multiprocessor systems using dedicated external agents, and multiprocessor
systems using the cluster bus. System interface arbitration is handled by the
SysReq*, SysGnt*, and SysRel* signals (request, grant, and release).
As described earlier in this chapter, the System interface resides in either master or
slave state; the processor enters slave state during all of the reset sequences.
When mastership of the System interface changes, there is always one dead
SysClk cycle during which the bidirectional signals are not driven; the processor
ignores all bidirectional signals during this dead SysClk cycle.
The protocol supports overlapped arbitration which allows arbitration to occur in
parallel with requests and responses. This results in fewer wasted cycles when
mastership of the System interface changes.
Grant parking is also supported, allowing a device to retain mastership of the
System interface as long as no other device requests the System interface.
In multiprocessor systems using the cluster bus, the external arbiter typically
implements a round-robin priority scheme.
Version 2.0 of January 29, 1997 MIPS R10000 Microprocessor User's Manual