MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

98 Chapter 6.
During the address cycle of processor double/single/partial-word read and write
requests, SysCmd[2:0] contain the data size indication, as shown in Table 6-10.
Table 6-10 Encoding of SysCmd[2:0] for Processor Double/Single/Partial-Word Read/
Write Requests
SysCmd[2:0] Data Size Indication
0 One byte valid (Byte)
1 Two bytes valid (Halfword)
2 Three bytes valid (Tribyte)
3 Four bytes valid (Word)
4 Five bytes valid (Quintibyte)
5 Six bytes valid (Sextibyte)
6 Seven bytes valid (Septibyte)
7 Eight bytes valid (Doubleword)
During the address cycle of external intervention and invalidate requests,
SysCmd[10:8] contain the request number, as shown in Table 6-11. The request
number provides a mechanism to associate a potential processor coherency data
response with the corresponding external coherency request.
Table 6-11 Encoding of SysCmd[10:8] for External Intervention
and Invalidate Requests
SysCmd[10:8] Request Number
During the address cycle of external requests, SysCmd[7:5] contain the command,
as shown in Table 6-12.
Table 6-12 Encoding of SysCmd[7:5] for External Requests
SysCmd[7:5] Command
0 Intervention shared
1 Intervention exclusive
2 Allocate request number
3 Allocate request number
4 NOP
5 NOP
6 Invalidate
7 Special
Version 2.0 of January 29, 1997 MIPS R10000 Microprocessor User's Manual