MIPS R10000 Microprocessor User's Manual - SGI TechPubs Library

82 Chapter 6.
6.7 Cluster Bus
In a multiprocessor system using the cluster bus, the cluster coordinator performs
the cluster bus arbitration and data flow management. The arbitration scheme
assures that either one of the processors or the cluster coordinator is master at any
given time, while the remaining devices are slave.
A processor request issued by the master processor is observed as an external
request by all slave R10000 processors, as shown in Figure 6-1. Similarly, a
processor coherency data response issued by a master processor is observed as an
external data response by the slave processors.
(Master) (Slave)
(Slave)
R10000
R10000
(Slave)
R10000
R10000
System Interface
Processor Request
R10000
R10000
System Interface
Cluster Bus
Cluster
Coordinator Cluster
Coordinator
System Interface
External Request
Figure 6-1 Processor Request Master/Slave Status
In a multiprocessor system using the cluster bus, a mode bit specifies whether
processor coherent requests are to target the external agent only, or all processors
and the external agent. This allows systems with efficient snoopy, duplicate tag,
or directory-based coherency protocols to be created.
Version 2.0 of January 29, 1997 MIPS R10000 Microprocessor User's Manual
R10000
R10000
System Interface