DesignCon 2002
DesignCon 2002
DesignCon 2002
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A B<br />
Figure 17: A: SIwave isometric view of the extracted differential pair on the Blade card. B:<br />
SIwave top-down view of the Switch card.<br />
The post-layout model is shown in Figure 18 and consists of the three SIwave models,<br />
SMP connector models, and a high speed connector model. A Touchstone file was<br />
created for each PWB in the system (Blade, Switch, and Backplane); these were used to<br />
model the channel in lieu of w-elements and discreet vias. The full-wave package and<br />
PWB extraction tool performs a 2D FEM solution on all planar objects within the PWB<br />
and combines this with a Method of Moments solution for the signal traces. The final<br />
solution incorporates the fabricated board including the stack-up, plane geometries, trace<br />
geometries, components, vias, via padstacks, and frequency dependent dielectrics for<br />
each layer. Upon completion of the simulation, a Touchstone file was exported to the<br />
statistical tools for rapid,statistical analysis.<br />
0 1 2 3 4 5 0<br />
ref<br />
0<br />
Port1 Port2<br />
SWITCH<br />
HFSS<br />
Mid-Plane<br />
HFSS<br />
Blade<br />
switch<br />
switch<br />
Port3 Port4<br />
ref<br />
ref<br />
ref<br />
0<br />
smp+<br />
smp- conn-<br />
ref<br />
conn+<br />
C<br />
sw+<br />
blade+<br />
sw- blade-<br />
ref<br />
0 0 0 0 0<br />
1 = Switch PCB Model (SIwave)<br />
2 = Connector Model (HFSS)<br />
3 = Mid-plane PCB Model (SIwave)<br />
4 = Connector Model (HFSS)<br />
5 = Blade PCB Model (SIwave)<br />
Figure 18: Post-layout circuit model.<br />
The post-layout simulation results show a very similar solution space to that of the final<br />
pre-layout simulation (2 ps difference at a BER of 1x10 -12 ). VerifEye BER results are<br />
shown in Figure 19 for the post-layout simulation.<br />
C<br />
conn+<br />
smp+<br />
conn- smp-<br />
ref<br />
blade<br />
blade<br />
ref<br />
ref<br />
0<br />
0