DesignCon 2002
DesignCon 2002
DesignCon 2002
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Abstract<br />
A fundamentally important aspect of high speed channel design at 10 Gb/s is that<br />
significant optimization of the physical channel is required. Path degradation in channels,<br />
from ISI effects, causes poor signal quality and must be minimized or eliminated. This<br />
paper explores how equalization, statistical analysis, and accurate models can be used to<br />
optimize high speed channels. A case study, based on a 10 Gb/s BladeServer Ethernet<br />
backplane, will serve to illustrate how an integrated approach using equalization, accurate<br />
physical models, and statistical simulation can be used to optimize the design of an<br />
industrial application.<br />
Author(s) Biography<br />
Pravin Patel<br />
Pravin Patel pravinp@us.ibm.com Pravin Patel is a Senior Engineer and Technical<br />
Leader working for IBM xSeries Server Development. He is involved in defining product<br />
architecture, creating product strategies, and time and Frequency Domain SI<br />
analysis/simulation of Intel base server products. His current activities include the design<br />
and analysis of Serdes interfaces for BladeCenter product. He performs modeling,<br />
simulation and measurements of the high speed serial link Channels. The other areas of<br />
his responsibilities include design and development of models for line cards, backplanes,<br />
traces, via and performing simulations for system level voltage and timing budgets and<br />
jitter characterization. He is an active member of T11.2 and IEEE802.3 channel model<br />
standard committee from IBM. He received a B.S. degree in electrical engineering from<br />
the New Jersey Institute of Technology in 1989. Pravin has received 12 U.S. Patents, 3<br />
IBM Invention Plateau Achievement Awards, 7th IBM Authors Recognition Awards, one<br />
IBM Outstanding Technical Achievement Awards, and One IBM Corporate Award.<br />
IBM. He has authored or co-authored 25 technical papers in IEEE EPEP, IEEE ECTC<br />
and <strong>DesignCon</strong> conferences.<br />
Jeff Cutcher<br />
Jeff Cutcher joined Ansoft Corporation as an Applications Engineer in 2005 with a focus<br />
on supporting their Designer, Nexxim, and SIwave products. Prior to joining<br />
Ansoft, Jeff held the position of Senior Staff Electrical Engineer at Motorola, where he<br />
was involved in various wireless communications development projects that included<br />
digital, analog, and RF circuit design, to pcb layout, and system modeling and simulation.<br />
Jeff is currently a Senior Member of the IEEE, a registered Professional Engineer in the<br />
State of Florida, and holds his BSEE and MSEE from New Jersey Institute of<br />
Technology.<br />
Tony Donisi<br />
Tony Donisi has been a Senior Applications Engineer for Ansoft since 2000. During his<br />
time with Ansoft, he has developed a broad range of applications and designs in many<br />
different areas, such as RF & microwave circuits, wireless communication systems, and<br />
SI related products. Prior to Ansoft, he worked as a RF design engineer for over 17