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A1L-A Oversampling ADCs I (Lecture) 

Time: Monday, May 28, 2007, 9:30 - 11:00 

Place: Grand Salon B- S9 

Chair(s): Felix Lustenberger, CSEM SA Image Sensing 

Franco Maloberti, University of Pavia 

Monday, May 28, 2007 

9:30 

A1L-A.1 A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator .................................. 1 

Ramón Tortosa, Instituto de Microelectrónica de Sevilla; Antonio Aceituno, Instituto de Microelectrónica de 

Sevilla; José M. de la Rosa, Instituto de Microelectrónica de Sevilla; Angel Rodríguez-Vázquez, Instituto de 

Microelectrónica de Sevilla; Francisco V. Fernández, Instituto de Microelectrónica de Sevilla 

9:48 

A1L-A.2 An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver ............... 5 

Minho Kwon, Yonsei University; Gunhee Han, Yonsei University 

10:06 

A1L-A.3 On the Modeling and the Stability of Continuous-Time ΣΔ-Modulators ................................................... 9 

Jens Anders, Leibniz University Hannover; Wolfgang Mathis, Leiniz University Hannover 

10:24 

A1L-A.4 Delta-Sigma Analog-to-Digital Conversion via Time-Mode Signal Processing ........................................ 13 

Christopher S. Taillefer, McGill University; Gordon W. Roberts, McGill University 

10:42 

A1L-A.5 A 1.2V 130µA 10-bit MOS-Only Log-Domain ΣΔ Modulator ....................................................................... 17 

X. Redondo, Institut de Microelectrònica de Barcelona, Centro Nacional de Microelectrónica; J. Pallarès, 

Institut de Microelectrònica de Barcelona, Centro Nacional de Microelectrónica; F. Serra-Graells, Institut de 

Microelectrònica de Barcelona, Centro Nacional de Microelectrónica 

A1L-B SPECIAL SESSION: Signal Processing for RF Impairment Mitigation in Comm. 

Transceivers I (Lecture) 



Chair(s): Ediz Cetin, University of Westminster 

Jim Haslett, University of Calgary 

9:30 

A1L-B.1 Living and Dealing with RF Impairments in Communication Transceivers ............................................. 21 

Ediz Cetin, University of Westminster; Izzet Kale, University of Westminster; Richard C.S. Morling, 

University of Westminster

9:48 

A1L-B.2 3.9G Radio Reception with SC-FDMA Waveforms Under I/Q Imbalance ................................................ 25 

Lauri Anttila, Tampere University of Technology; Mikko Valkama, Tampere University of Technology; 

Markku Renfors, Tampere University of Technology 

10:06 

A1L-B.3 Blind I/Q Imbalance Compensation in Multipath Environments .............................................................. 29 

Piotr Rykaczewski, A.T. Kearney; Friedrich Jondral, Universität Karlsruhe 

10:24 

A1L-B.4 On the Impact of I/Q Imbalance in Multi-Carrier Systems for Different Channel Scenarios ................ 33 

Marcus Windisch, Dresden University of Technology; Gerhard Fettweis, Dresden University of Technology 

10:42 

A1L-B.5 On the Joint Compensation of IQ Imbalances and Phase Noise in MIMO-OFDM Systems .................... 37 

Qiyue Zou, University of California, Los Angeles; Alireza Tarighat, University of California, Los Angeles; 

Ali H. Sayed, University of California, Los Angeles 

A1L-C Advanced Picture Coding (Lecture) 



Chair(s): Kai-Kuang Ma, Nanyang Technological University 

Jar-Ferr Yang, National Cheng Kung University 

9:30 

A1L-C.1 Distributed Video Coding with Spatial Correlation Exploited Only at the Decoder ................................ 41 

Mei Guo, Harbin Institute of Technology; Yan Lu, Microsoft Research Asia; Feng Wu, Microsoft Research 

Asia; Shipeng Li, Microsoft Research Asia; Wen Gao, Harbin Institute of Technology 

9:48 

A1L-C.2 Peak Transform for Efficient Image Representation and Coding ............................................................. 45 

Zhihai He, University of Missouri 

10:06 

A1L-C.3 Rate Control for Hierarchical B-Picture Coding with Scaling-Factors ..................................................... 49 

Long Xu, Chinese Academy of Sciences; Wen Gao, Chinese Academy of Sciences; Xiangyang Ji, 

Chinese Academy of Sciences; Debin Zhao, Harbin Institute of Technology 

10:24 

A1L-C.4 Block-Interleaved Error-Resilient Entropy Coding ...................................................................................... 53 

Yong Fang, ZheJiang University; Lu Yu, ZheJiang University 

10:42 

A1L-C.5 A Perceptual Coding Method based on the Luma Sensitivity Model ....................................................... 57 

Shilin Xu, Huazhong University of Science and Technology; Li Yu, Huazhong University of Science and 

Technology; Guangxi Zhu, Huazhong University of Science and Technology

A1L-D Power Systems I (Lecture) 



Chair(s): Karen Miu, Drexel University 

Hiroyuki Mori, Meiji University 

9:30 

A1L-D.1 Fundamental Performance Limits in Lossy Polyphase Systems: Apparent Power and 

Optimal Compensation .................................................................................................................................. 61 

Hanoch Lev-Ari, Northeastern University; Aleksandar M. Stankovic, Northeastern University 

9:48 

A1L-D.2 Computing Criticality of Lines in Power Systems ....................................................................................... 65 

Ali Pinar, Lawrence Berkeley National Laboratory; Adam Reichert, University of Illinois; Bernard Lesieutre, 

Lawrence Berkeley National Laboratory 

10:06 

A1L-D.3 Probability Distribution of Blackouts in Complex Power Networks ......................................................... 69 

Bei Gou, University of Texas at Arlington; Hui Zheng, University of Texas at Arlington; Weibiao Wu, 

University of Chicago; Xingbin Yu, Electric Reliability Council of Texas 

10:24 

A1L-D.4 Analog Emulation of a Reconfigurable Tap Changing Transformer ......................................................... 73 

Aaron St. Leger, Drexel University; Juan C. Jimenez, Drexel University; Agung Fu, Drexel University; 

Sanal Djimbinov, Drexel University; Sa Em Soeurn, Drexel University; Sun Sit Lwin, Drexel University; 

Chika O. Nwankpa, Drexel University 

10:42 

A1L-D.5 Application of Two-Layered Tabu Search to Optimal Allocation of D-FACTS for Uncertain 

Wind Power Generation ................................................................................................................................. 77 

Hiroyuki Mori, Meiji University; Hidenori Tani, Keio Corp. 

A1L-E BioMEMS (Lecture) 


Place: Grand Salon C- S13 

Chair(s): Maysam Ghovanloo, North Carolina State University 

Mohamad Sawan, Polytechnique, Montreal 

9:30 

A1L-E.1 Design and Optimization of a Capacitive Micromachined Ultrasonic Transducer Micro-Array 

for Near Field Sensing .................................................................................................................................... 81 

Clyde Clarke, Morgan State University; Ralph Etienne-Cummings, Johns Hopkins University; 

Carl White, Morgan State University 

9:48 

A1L-E.2 A CMOS-Based Capacitive Sensor for Laboratory-On-Chips: Design and Experimental Results .......... 85 

Ebrahim Ghafar-Zadeh, École Polytechnique de Montréal; Mohamad Sawan, École Polytechnique de Montréal 

10:06 

A1L-E.3 Piezo-Powered Floating Gate Injector for Self-Powered Fatigue Monitoring in 

Biomechanical Implants ................................................................................................................................ 89 

Nizar Lajnef, Michigan State University; Shantanu Chakrabartty, Michigan State University; 

Niell Elvin, Michigan State University; Alex Elvin, University of Witwatersrand

10:24 

A1L-E.4 A Novel Current Scaling Active Pixel Sensor with Correlated Double Sampling Readout 

Circuit for Real Time Medical X-Ray Imaging ............................................................................................. 93 

N. Safavian, University of Waterloo; G.R. Chaji, University of Waterloo; S.J. Ashtiani, University of Waterloo; 

A. Nathan, University of Waterloo; J.A. Rowlands, University of Toronto 

10:42 

A1L-E.5 DSP Implementation of a Low-Complexity Algorithm for Real-Time Automated Vessel 

Detection in Images of the Fundus of the Human Retina ......................................................................... 97 

Andrea Anzalone, University of Genova; Federico Bizzarri, University of Genova; Paolo Camera, University of 

Genova; Luca Petrillo, University of Genova; Marco Storace, University of Genova 

A1L-F Adaptive Signal Processing (Lecture) 



Chair(s): Tapio Saramaki, Tampere University of Technology 

Lars Wanhammar, Linköpings Universitet 

9:30 

A1L-F.1 A Novel Interference Supression Technique Employing Complex Adaptive ICA for Time-Varying 

Channels in Diversity Wireless QAM Receivers ....................................................................................... 101 

Raghuram Ranganathan, University of Central Florida; Wasfy B. Mikhael, University of Central Florida 

9:48 

A1L-F.2 Adaptive IIR Filtering via a Recursive Total Instrumental Variable Algorithm .................................... 105 

Da-Zheng Feng, Xidian University; Wei Xing Zheng, University of Western Sydney 

10:06 

A1L-F.3 Generalized Blind Mismatch Correction for a Two-Channel Time-Interleaved ADC: 

Analytic Approach ........................................................................................................................................ 109 

Munkyo Seo, University of California, Santa Barbara; Mark Rodwell, University of California, Santa Barbara 

10:24 

A1L-F.4 An Adaptive Low Rank Algorithm for Semispherical Antenna Arrays ................................................... 113 

Jeffrey A. Foutz, Arizona State University; Andreas S. Spanias, Arizona State University 

10:42 

A1L-F.5 New Normalized LMS Algorithms based on the Kalman Filter .............................................................. 117 

Paulo A.C. Lopes, INESC-ID; José B. Gerald, INESC-ID 

A1L-G Nanoelectronics I (Lecture) 



Chair(s): Sorin Cotofana, Delft University of Technology 

Wai-Chi Fang, NASA’s Jet Propulsion Laboratory 

9:30 

A1L-G.1 Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors ........... 121 

Praveen Raghavan, IMEC vzw and KULeuven; José L. Ayala, Universidad Politécnica de Madrid; 

David Atienza, EPFL; Francky Catthoor, IMEC, Belgium; Giovanni De Micheli, EPFL; 

Marisa López-Vallejo, Universidad Politécnica de Madrid 

9:48 

A1L-G.2 Non Return Mobile Logic Family ................................................................................................................ 125 

Héctor Pettenghi, Instituto de Microelectrónica de Sevilla; María J. Avedillo, Instituto de Microelectrónica de 

Sevilla; José M. Quintana, Instituto de Microelectrónica de Sevilla

10:06 

A1L-G.3 A Four-Resonant-Tunneling-Diode (4RTD) NAND/NOR Logic Gate ....................................................... 129 

T. Waho, Sophia University; A. Yamada, Sophia University; H. Okuyama, Sophia University; V. Khorenko, 

University of Duisburg-Essen; T. Do, University of Duisburg-Essen; W. Prost, University of Duisburg-Essen 

10:24 

A1L-G.4 Synthesis of Finite State Machines with Magnetic Domain Wall Logic ............................................... 133 

Jacques-Olivier Klein, Université Paris Sud 11; Eric Belhaire, Université Paris Sud 11; Claude Chappert, 

Université Paris Sud 11; Florent Ouchet, Université Paris Sud 11; Russel Cowburn, Imperial College London; 

Dan Read, Imperial College London; Dorothée Petit, Imperial College London 

10:42 

A1L-G.5 A Self-Biased Operational Transconductance Amplifier in 0.18 Micron 3D SOI-CMOS ..................... 137 

Jennifer Blain Christen, Johns Hopkins University; Andreas G. Andreou, Johns Hopkins University 

A1L-H Testing I (Lecture) 



Chair(s): Malgorzata Jeske, Portland State University 

Martin Margala, University of Rochester 

9:30 

A1L-H.1 Soft Error Mitigation in Switch Modules of SRAM-Based FPGAs .......................................................... 141 

Hamid R. Zarandi, Sharif University of Technology, Bristol University; Seyed G. Miremadi, Sharif University of 

Technology; Dhiraj K. Pradhan, Bristol University; Jimson Mathew, Bristol University 

9:48 

A1L-H.2 Efficient Thermal via Planning for Placement of 3D Integrated Circuits ............................................. 145 

Jing Li, University of Kitakyushu; Hiroshi Miyashita, University of Kitakyushu 

10:06 

A1L-H.3 Design for Secure Test – A Case Study on Pipelined Advanced Encryption Standard ....................... 149 

Youhua Shi, Waseda University; Nozomu Togawa, Waseda University; Masao Yanagisawa, Waseda University; 

Tatsuo Ohtsuki, Waseda University 

10:24 

A1L-H.4 Embedded Jitter Measurement of High-Speed I/O Signals .................................................................... 153 

Xueqing Wang, University of Florida; William R. Eisenstadt, University of Florida; 

Robert M. Fox, University of Florida 

10:42 

A1L-H.5 GALS based Shared Test Architecture for Embedded Memories .......................................................... 157 

Prashant Dubey, STMicroelectronics India Pvt. Ltd.; Akhil Garg, STMicroelectronics India Pvt. Ltd.; Sravan 

Kumar Bhaskarani, STMicroelectronics India Pvt. Ltd. 

A1L-J FPGAs & FPAAs (Lecture) 


Place: Grand Salon D- S21 

Chair(s): Tughrul Arslan, University of Edinburgh 

Dimitrios Soudris, Demokritos University of Thrace 

9:30 

A1L-J.1 A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware .................. 161 

Yang Qu, Technical Research Centre of Finland (VTT); Juha-Pekka Soininen, Technical Research Centre of 

Finland (VTT); Jari Nurmi, Tampere University of Technology

9:48 

A1L-J.2 Real-Time Extraction of Maximally Stable Extremal Regions on an FPGA .......................................... 165 

Fredrik Kristensen, Lund University; W. James MacLean, University of Toronto 

10:06 

A1L-J.3 Programmable Floating Gate FPAA Switches are not Dead Weight ..................................................... 169 

Christopher M. Twigg, Georgia Institute of Technology; Jordan D. Gray, Georgia Institute of Technology; 

Paul E. Hasler, Georgia Institute of Technology 

10:24 

A1L-J.4 Programmable Conductance Switches for FPAAs .................................................................................. 173 

Christopher M. Twigg, Georgia Institute of Technology; Paul E. Hasler, Georgia Institute of Technology 

10:42 

A1L-J.5 An OTA-Based Large-Scale Field Programmable Analog Array (FPAA) for Faster On-Chip 

Communication and Computation ............................................................................................................. 177 

Paul E. Hasler, Georgia Institute of Technology; Christopher M. Twigg, Georgia Institute of Technology 

A1L-K Wireline Communications Circuits (Lecture) 



Chair(s): Tony Chan Carusone, University of Toronto 

Deuk Heo, Washington State University 

9:30 

A1L-K.1 A 1Gb/s Optical Transceiver Array Chipset for Automotive Wired Interconnects ............................... 181 

Boo-Young Choi, Ewha Womans University; J.-W. Han, Ewha Womans University; S.M. Park, Ewha Womans 

University; K. Park, Korea Electronics Technology Institute; W.-S. Oh, Korea Electronics Technology Institute; 

J.-C. Choi, Korea Electronics Technology Institute 

9:48 

A1L-K.2 A Novel Tri-State Binary Phase Detector .................................................................................................. 185 

David Rennie, University of Waterloo; Manoj Sachdev, University of Waterloo 

10:06 

A1L-K.3 Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links ....................................... 189 

Mike Bichan, University of Toronto; Anthony Chan Carusone, University of Toronto 

10:24 

A1L-K.4 A 0.25-um BiCMOS Feed Foward Equalizer using Active Delay Line for Backplane Communication ... 193 

H. Kim, Georgia Institute of Technology; F. Bien, Georgia Institute of Technology; Y. Hur, Georgia Institute of 

Technology; S. Chandramouli, Georgia Institute of Technology; J. Cha, Georgia Institute of Technology; 

E. Gebara, Georgia Institute of Technology & Quellan, Inc.; J. Laskar, Georgia Institute of 

Technology & Quellan, Inc. 

10:42 

A1L-K.5 Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in 

Standard CMOS Technology ....................................................................................................................... 197 

F. Bien, Georgia Institute of Technology; S. Mojtaba Chandramouli, Georgia Institute of Technology; H. Kim, 

Georgia Institute of Technology; E. Gebara, Georgia Institute of Technology, Quellan, Inc.; J. Laskar, Georgia 

Institute of Technology, Quellan, Inc.

A1L-L Chaos, Bifurcation & Applications (Lecture) 



Chair(s): Maciej Ogorzalek, University of Science and Technology 

C. K. Michael Tse, Hong Kong Polytechnic University 

9:30 

A1L-L.1 Generation of White Noise by using Chaos in Practical Phase-Locked Loop 

Integrated Circuit Module .......................................................................................................................... 201 

Tetsuro Endo, Meiji University; Jun Yokota, Meiji University 

9:48 

A1L-L.2 Reverse-Time Chaos from a Randomly Driven Filter ............................................................................... 205 

Ned J. Corron, US Army RDECOM; Scott T. Hayes, US Army RDECOM; Shawn D. Pethel, US Army 

RDECOM; Jonathan N. Blakely, US Army RDECOM 

10:06 

A1L-L.3 Switching Phase States of Chaotic Circuits Coupled by Time-Varying Resistor ................................. 209 

Yoko Uwate, Tokushima University; Yoshifumi Nishio, Tokushima University 

10:24 

A1L-L.4 ADCs, Chaos and TRNGs: A Generalized View Exploiting Markov Chain Lumpability Properties ...... 213 

Sergio Callegari, University of Bologna; Gianluca Setti, University of Bologna, University of Ferrara 

10:42 

A1L-L.5 Design of Multi-Directional Multi-Scroll Chaotic Attractors based on 

Fractional Differential Systems ................................................................................................................. 217 

Weihua Deng, Lanzhou University; Jinhu Lü, Chinese Academy of Sciences 

A1L-M Amplifiers I (Lecture) 



Chair(s): Mohammed Ismail, Ohio State University 

Un-Ku Moon, Oregon State University 

9:30 

A1L-M.1 A Compact High Current Efficiency Low-Voltage MOS Transconductor with Nearly 

Constant Input Voltage Range ................................................................................................................... 221 

Chutham Sawigun, Mahanakorn University of Technology; Jirayuth Mahattanakul, Mahanakorn 

University of Technology 

9:48 

A1L-M.2 A Three-Stage Amplifier with Quenched Multipath Frequency Compensation 

for All Capacitive Loads .............................................................................................................................. 225 

Jingjing Hu, Delft University of Technology; Johan H. Huijsing, Delft University of Technology; 

Kofi A.A. Makinwa, Delft University of Technology 

10:06 

A1L-M.3 Low-Power Digitally Controlled CMOS Source Follower Variable Attenuator ...................................... 229 

T. Hui Teo, Institute of Microelectronics; Wooi Gan Yeoh, Institute of Microelectronics 

10:24 

A1L-M.4 Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity ............................. 233 

Hirokazu Yoshizawa, Saitama Institute of Technology; Gabor C. Temes, Oregon State University

10:42 

A1L-M.5 150µA CMOS Transconductor with 82 dB SFDR ..................................................................................... 237 

Salvatore Pennisi, Università di Catania; Giuseppe Scotti, Università di Roma “La Sapienza”; 

Alessandro Trifiletti, Università di Roma “La Sapienza” 

A2L-A Oversampling Data Conversion I (Lecture) 




Shahriar Mirabbasi, University of British Columbia 

11:20 

A2L-A.1 A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators ............... 241 

Matthias Keller, University of Freiburg - IMTEK; Alexander Buhmann, University of Freiburg - IMTEK; 

Maurits Ortmanns, University of Freiburg - IMTEK; Yiannos Manoli, University of Freiburg - IMTEK 

11:38 

A2L-A.2 A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT ΔΣ Modulator ................................. 245 

Chi-Tung Ko, Chinese University of Hong Kong; Kong-Pang Pun, Chinese University of Hong Kong 

11:56 

A2L-A.3 Noise-Coupled Multi-Cell Delta-Sigma ADCs ........................................................................................... 249 

Kyehyung Lee, Oregon State University; Gabor C. Temes, Oregon State University; 

Franco Maloberti, University of Pavia 

12:14 

A2L-A.4 Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass 

Delta-Sigma Modulators ............................................................................................................................. 253 

Ghyslain Gagnon, Carleton University; Leonard MacEachern, Carleton University 

12:32 

A2L-A.5 Mixed-Order Sturdy MASH Δ-Σ Modulator ................................................................................................ 257 

N. Maghari, Oregon State University; S. Kwon, Oregon State University; G.C. Temes, Oregon State University; 

U. Moon, Oregon State University 

A2L-B SPECIAL SESSION: Signal Processing for RF Impairment Mitigation 

in Comm. Transceivers II (Lecture) 



Chair(s): Ediz Cetin, University of Westminster 

Leonid Goldgeisser, Synopsys Inc. 

11:20 

A2L-B.1 Carrier Frequency Synchronization for Mobile Television Receivers .................................................... 261 

Timo Roman, Nokia Research Center; Visa Koivunen, Helsinki University of Technology 

11:38 

A2L-B.2 Efficient Transmitter Self-Calibration and Amplifier Linearization Techniques .................................. 265 

Xinping Huang, Communications Research Centre Canada; Mario Caron, Communications Research Centre Canada 

11:56 

A2L-B.3 Digital Compensation of Frequency Dependent Imperfections in Direct Conversion I-Q Modulators ... 269 

Antonio Cantoni, University of Western Australia; John Tuthill, QRSciences Pty Ltd

12:14 

A2L-B.4 Multipath Polyphase Circuits and their Application to RF Transceivers .............................................. 273 

Eric Klumperink, University of Twente; Rameswor Shrestha, University of Twente; Eisse Mensink, University of 

Twente; Gerard Wienk, University of Twente; Zhiyu Ru, University of Twente; Bram Nauta, University of Twente 

12:32 

A2L-B.5 Adaptive Pre-Distortion of Nonlinear Systems using Out-of-Band Energy Minimization .................... 277 

Kutluyil Doğançay, University of South Australia 

A2L-C Coding Efficiency & Encoder Optimization (Lecture) 



Chair(s): Ishfaq Ahmad, University of Texas, Arlington 

Shipeng Li, Microsoft 

11:20 

A2L-C.1 A Universal Approach to Developing Fast Algorithm for Simplified Order-16 ICT ............................... 281 

Jie Dong, Chinese University of Hong Kong; King Ngi Ngan, Chinese University of Hong Kong; Chi 

Keung Fong, Chinese University of Hong Kong; Wai Kuen Cham, Chinese University of Hong Kong 

11:38 

A2L-C.2 A PD Feed-Back Rate Control Algorithm for Multiple Video Object Coding ........................................ 285 

Jiancong Luo, Thomson Corporate Research; Yu Sun, University of Central Arkansas; 

Ishfaq Ahmad, University of Texas at Arlington 

11:56 

A2L-C.3 On Model Parameter Estimation for H.264/AVC Rate Control .............................................................. 289 

Jianpeng Dong, Santa Clara University; Nam Ling, Santa Clara University 

12:14 

A2L-C.4 Chroma Coding Efficiency Improvement with Context Adaptive Lagrange Multiplier (CALM) .......... 293 

Jun Zhang, Santa Clara University; Xiaoquan Yi, Santa Clara University; Nam Ling, Santa Clara University; 

Weijia Shang, Santa Clara University 

12:32 

A2L-C.5 Image Compression using 2D Dual-Tree Discrete Wavelet Transform (DDWT) ................................... 297 

Jingyu Yang, Tsinghua University; Wenli Xu, Tsinghua University; Qionghai Dai, Tsinghua University; 

Yao Wang, Polytechnic University 

A2L-D On-Chip Low-Power Electronics (Lecture) 



Chair(s): Eduard Alarcón, University Politécnica Catalunya 

Gabriel Rincon-Mora, Georgia Institute of Technology 

11:20 

A2L-D.1 A PEEC Approach for Circular Spiral Inductive Components Modeling ................................................ 301 

Philippe Artillan, LAAS-CNRS; Bruno Estibals, LAAS-CNRS; Alain Salles, LAAS-CNRS; Jean Abboud, LAAS- 

CNRS; Pierre Aloïsi, LAAS-CNRS; Corinne Alonso, LAAS-CNRS 

11:38 

A2L-D.2 An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control .......................... 305 

Feng Lou, University of Arizona; Dongsheng Ma, University of Arizona

11:56 

A2L-D.3 Modeling the Substrate Noise Injected by a DC-DC Converter .............................................................. 309 

Vincent Binet, Ecole Polytechnique de Montréal; Yvon Savaria, Ecole Polytechnique de Montréal; 

Michel Meunier, Ecole Polytechnique de Montréal; Yves Gagnon, LTRIM Technologies Inc. 

12:14 

A2L-D.4 Digital Inverse Timing Generator with Wide Dynamic Range ................................................................ 313 

Bharath Balaji Kannan, University of Florida, Gainesville; Khai D.T. Ngo, Virginia Tech 

12:32 

A2L-D.5 Design of Maximum-Efficiency Integrated Voltage Doubler .................................................................. 317 

A. Cabrini, University of Pavia; L. Gobbi, University of Pavia; G. Torelli, University of Pavia 

A2L-E Circuits for Medical Applications (Lecture) 



Chair(s): Wael Badawy, University of Calgary 

Yong Lian, National University of Singapore 

11:20 

A2L-E.1 A Low-Noise Preamplifier with Adjustable Gain and Bandwidth for 

Biopotential Recording Applications ........................................................................................................ 321 

Ming Yin, North Carolina State University; Maysam Ghovanloo, North Carolina State University 

11:38 

A2L-E.2 An Experimental Study of Voltage, Current, and Charge Controlled Stimulation 

Front-End Circuitry ....................................................................................................................................... 325 

Jim Simpson, North Carolina State University; Maysam Ghovanloo, North Carolina State University 

11:56 

A2L-E.3 A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications .... 329 

AbdEl-Monem M. El-Sharkawy, Johns Hopkins University; Paul P. Sotiriadis, Johns Hopkins University; Paul 

A. Bottomley, Johns Hopkins University; Ergin Atalar, Johns Hopkins University 

12:14 

A2L-E.4 A 2.5-V 4-µW Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with 

Periodic Bias Current Reduction Technique ............................................................................................ 333 

Chae-Ryung Kim, Korea University; Yu-Ri Kang, Korea University; Young-Jae Min, Korea University; 

Soo-Won Kim, Korea University 

12:32 

A2L-E.5 A Novel Variable-Gain Micro-Power Band-Pass Auto-Zeroing CMOS Amplifier ................................... 337 

Chiu-Hsien Chan, University of Southern California, Los Angeles; Jack Wills, University of Southern California, 

Marina del Rey; Jeff LaCoss, University of Southern California, Marina del Rey; John J. Granacki, University of 

Southern California, Marina del Rey; John Choma, Jr., University of Southern California, Los Angeles 

A2L-F Audio & Speech Processing I (Lecture) 



Chair(s): Bah-Hwee Gwee, Nanyang Technological University 

Wei-Ping Zhu, Concordia University 

11:20 

A2L-F.1 Fast Basis Selection and Instantaneous Frequency Tracking for Audio Signal 

Analysis and Synthesis ............................................................................................................................... 341 

Huimin Chen, University of New Orleans; Dimitrios Charalampidis, University of New Orleans

11:38 

A2L-F.2 Emotion Recognition using Novel Speech Signal Features ................................................................... 345 

Talieh Seyed Tabatabaei, Ryerson University; Sridhar Krishnan, Ryerson University; Aziz Guergachi, Ryerson University 

11:56 

A2L-F.3 An Identification Technique for Noisy ARMA Systems in Correlation Domain .................................... 349 

S.A. Fattah, Concordia University; W.-P. Zhu, Concordia University; M.O. Ahmad, Concordia University 

12:14 

A2L-F.4 Real-Time DSP Implementation of a Subband Beamforming Algorithm for 

Dual Microphone Speech Enhancement .................................................................................................. 353 

Zohra Yermeche, Blekinge Institute of Technology; Benny Sällberg, Blekinge Institute of Technology; 

Nedelko Grbić, Blekinge Institute of Technology; Ingvar Claesson, Blekinge Institute of Technology 

12:32 

A2L-F.5 Novel Non-Linear Inverse Quantization Algorithm and its Architecture for Digital Audio Codecs .... 357 

Han Jae Hee, Ajou University; Myung Hoon Sunwoo, Ajou University; Jong Ha Moon, LG Electronics Inc. 

A2L-G Nanoelectronics II (Lecture) 



Chair(s): Sorin Cotofana, Delft University of Technology 

Wai-Chi Fang, NASA’s Jet Propulsion Laboratory 

11:20 

A2L-G.1 Fault Tolerance Analysis of NoC Architectures ....................................................................................... 361 

Teijo Lehtonen, Turku Centre for Computer Science, University of Turku; Pasi Liljeberg, University of Turku; 

Juha Plosila, Academy of Finland, University of Turku 

11:38 

A2L-G.2 Multiple Upsets Tolerance in SRAM Memory .......................................................................................... 365 

Costas Argyrides, Bristol University; Hamid R. Zarandi, Bristol University, Sharif University of Technology; 

Dhiraj K. Pradhan, Bristol University 

11:56 

A2L-G.3 A Miniaturized Delay Line based on Slow-Wave Substrates .................................................................. 369 

Themistoklis Prodromakis, Imperial College London; Christos Papavassiliou, Imperial College London; 

George Konstantinidis, Microelectronics Research Group IESL FORTH 

12:14 

A2L-G.4 Gigascale System Design of Sensor Networks for Active Volcanoes .................................................... 373 

Wai-Chi Fang, NASA Jet Propulsion Laboratory; Sharon Kedar, NASA Jet Propulsion Laboratory 

12:32 

A2L-G.5 Open Two-State Quantum Systems Solved by Harmonic Balance ......................................................... 377 

Pier Paolo Civalleri, Politecnico di Torino; Marco Gilli, Politecnico di Torino; Michele Bonnin, Politecnico di Torino

A2L-H Networks on Chip (Lecture) 



Chair(s): Mohamed Elgamel, University of Louisiana at Lafayette 

Viktor Öwall, Lund University 

11:20 

A2L-H.1 Characterization of a Fault-Tolerant NoC Router .................................................................................... 381 

Sumit Dharamphal Mediratta, University of Southern California, Marina del Rey; Jeffrey Draper, University of 

Southern California, Marina del Rey 

11:38 

A2L-H.2 Fast Fair Crossbar Scheduler for On-Chip Router ................................................................................... 385 

Shyue-Wen Yang, National Yunlin University of Science & Technology; Ming-Hwa Sheu, National Yunlin 

University of Science and Technology; Chun-Kai Yeh, National Yunlin University of Science and Technology; 

Chih-Yuen Wen, National Yunlin University of Science and Technology; Chih-Chieh Lin, National Yunlin 

University of Science and Technology; Wen-Kai Tsai, National Yunlin University of Science and Technology 

11:56 

A2L-H.3 Evaluation of Algorithms for Low Energy Mapping onto NoCs .............................................................. 389 

César A.M. Marcon, Pontifícia Universidade Católica do Rio Grande do Sul; Edson I. Moreno, Pontifícia 

Universidade Católica do Rio Grande do Sul; Ney L.V. Calazans, Pontifícia Universidade Católica do Rio 

Grande do Sul; Fernando G. Moraes, Pontifícia Universidade Católica do Rio Grande do Sul 

12:14 

A2L-H.4 An Information Theory Approach to Power – Optimal Traffic Routing in Networks on Chips ............ 393 

Paul P. Sotiriadis, Johns Hopkins University 

12:32 

A2L-H.5 Binary-Truncated CDMA-Based On-Chip Network ................................................................................... 397 

Ik-Jae Chun, Electronics and Telecommunications Research Institute; Tae-Moon Roh, Electronics and 

Telecommunications Research Institute; Bo-Gwan Kim, Chungnam National University 

A2L-J FPGAs & System Design (Lecture) 



Chair(s): Fathi Salem, Michigan State University 

Amal Zaki, Electronic Research Institute, Egypt 

11:20 

A2L-J.1 Holographic Memory Reconfigurable VLSI ............................................................................................... 401 

Minoru Watanabe, Kyushu Institute of Technology; Fuminori Kobayashi, Kyushu Institute of Technology 

11:38 

A2L-J.2 Area and Throughput Aware Comparator Networks Optimization for Parallel 

Data Processing on FPGA ........................................................................................................................... 405 

Christophe Layer, University of Ulm; Daniel Schaupp, University of Ulm; Hans-Jörg Pfleiderer, University of Ulm 

11:56 

A2L-J.3 Rapid C to FPGA Prototyping with Multithreaded Emulation Engine ................................................... 409 

Shin-Kai Chen, National Chiao Tung University; Bing-Shiun Wang, National Chiao Tung University; 

Tay-Jyi Lin, National Chiao Tung University; Chih-Wei Liu, National Chiao Tung University 

12:14 

A2L-J.4 Visualization of SystemC Designs ............................................................................................................. 413 

Christian Genz, University of Bremen; Rolf Drechsler, University of Bremen; Gerhard Angst, Concept 

Engineering GmbH; Lothar Linhard, Concept Engineering GmbH

12:32 

A2L-J.5 Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications ....... 417 

Sayed Hafizur Rahman, Concordia University; Asif Iqbal Ahmed, Concordia University; 

Otmane Ait Mohamed, Concordia University 

A2L-K Wireless PAN Circuits (Lecture) 



Chair(s): Cherif Aissi, University of Louisiana at Lafayette 

Chang-Ho Lee, Samsung 

11:20 

A2L-K.1 A 0.18-µm CMOS Squarer Circuit for a Non-Coherent UWB Receiver .................................................. 421 

A. Gerosa, University of Padova; M. Soldan, University of Padova; A. Bevilacqua, University of Padova; 

A. Neviani, University of Padova 

11:38 

A2L-K.2 A Fully Integrated Concurrent Dual-Band Low Noise Amplifier with Suspended Inductors in 

SiGe 0.35 µm BiCMOS Technology ........................................................................................................... 425 

Yu-Tso Lin, National Taiwan University; Tao Wang, National Taiwan University; Shey-Shi Lu, 

National Taiwan University 

11:56 

A2L-K.3 A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 

2.4 GHz Zigbee Transceiver Applications ................................................................................................. 429 

Rangakrishnan Srinivasan, Texas A&M University; Didem Zeliha Türker, Texas A&M University; 

Sang Wook Park, Texas A&M University; Edgar Sánchez-Sinencio, Texas A&M University 

12:14 

A2L-K.4 A Low-Power CMOS Low-IF Receiver Front-End for 2450-MHz Band 

IEEE 802.15.4 ZigBee Standard ................................................................................................................ 433 

Saeed Sarhangian, Sharif University of Technology; S. Mojtaba Atarodi, Sharif University of Technology 

12:32 

A2L-K.5 A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers ................. 437 

Zhou Zhujin, Fudan University; Li Ning, Fudan University; Li Wei, Fudan University; Ren Junyan, Fudan University 

A2L-L Modeling & Simulation of Nonlinear Circuits (Lecture) 



Chair(s): Leonid Goldgeisser, Synopsys Inc. 

Alan Mantooth, University of Arkansas 

11:20 

A2L-L.1 The Composition Rule for Multivariate Volterra Operators and its Application to Circuit Analysis ..... 441 

Heinz Koeppl, Swiss Federal Institute of Technology Lausanne 

11:38 

A2L-L.2 Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform .................................. 445 

K. Odame, Georgia Institute of Technology; C.M. Twigg, Georgia Institute of Technology; A. Basu, Georgia 

Institute of Technology; P.E. Hasler, Georgia Institute of Technology 

11:56 

A2L-L.3 Per-Element Decompostion in Distortion Analysis .................................................................................. 449 

Guoji Zhu, University of Waterloo; Ajoy Opal, University of Waterloo

12:14 

A2L-L.4 Modeling the Telephone Call Network ...................................................................................................... 453 

Wai M. Tam, Hong Kong Polytechnic University; Francis C.M. Lau, Hong Kong Polytechnic University; 

Chi K. Tse, Hong Kong Polytechnic University 

12:32 

A2L-L.5 Novel Analysis of Phase Noise in Oscillators ........................................................................................... 457 

Andrew Buschmeier, Lehigh University; Doug Frey, Lehigh University 

A2L-M Amplifiers II (Lecture) 



Chair(s): Andrea Baschirotto, University of Pavia 

Sameer Sonkusale, Tufts University 

11:20 

A2L-M.1 Low-Voltage Linearly Tunable CMOS Transconductor with Common-Mode Feedforward ................. 461 

B. Calvo, University of Zaragoza; S. Celma, University of Zaragoza; M.T. Sanz, University of Zaragoza; 

J.P. Alegre, University of Zaragoza 

11:38 

A2L-M.2 THD+Noise Estimation in Class-D Amplifiers ........................................................................................... 465 

Burak Kelleci, Texas A&M University; Edgar Sánchez-Sinencio, Texas A&M University; 

Aydın İlker Karşılayan, Texas A&M University 

11:56 

A2L-M.3 Two-Stage OTA Design based on Settling-Time Constraints .................................................................. 469 

Gianluca Giustolisi, Università di Catania 

12:14 

A2L-M.4 A Very Linear OTA with V-I Conversion based on Quasi-Floating MOS Resistor .................................. 473 

R.G. Carvajal, University of Sevilla; J. Galan, University of Sevilla; A. Torralba, University of Sevilla; 

C. Lujan-Martínez, University of Sevilla; Jaime Ramirez-Angulo, New Mexico State University; 

Antonio Lopez-Martin, Universidad Pública de Navarra 

12:32 

A2L-M.5 A Robust Rail-to-Rail Input Stage with Constant-gm and Constant Slew Rate using a 

Novel Level Shifter ....................................................................................................................................... 477 

Tongyu Song, University or Texas at Austin; Shouli Yan, University of Texas at Austin 

A3L-A Oversampling Data Conversion II (Lecture) 



Chair(s): Un-Ku Moon, Oregon State University 

Albert Wang, Illinois Institute of Technology 

14:30 

A3L-A.1 A Segmented Data-Weighted-Averaging Technique ............................................................................... 481 

Zhenyong Zhang, Oregon State University; Gabor C. Temes, Oregon State University 

14:48 

A3L-A.2 A Digital-Summing Feedforward Σ-Δ Modulator and its Application to a Cascade ADC .................... 485 

Yi Tang, University of Washington; Subhanshu Gupta, University of Washington; Jeyanandh Paramesh, 

University of Washington; David J. Allstot, University of Washington

15:06 

A3L-A.3 A 0.9mA 95dB ΣΔ Modulator for Digital RF Hearing Aid in 0.35µm CMOS ......................................... 489 

Long-Xi Chang, Industrial Technology Research Institute; Day-Uei Li, Industrial Technology Research 

Institute; Chi-Chen Chung, Industrial Technology Research Institute; Tim-Kuei Shia, Industrial Technology 

Research Institute 

15:24 

A3L-A.4 A Theoretical Analysis of Split Delta-Sigma ADCs ................................................................................... 493 

Sudhakar Pamarti, University of California, Los Angeles 

15:42 

A3L-A.5 Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators ....................... 497 

Philip M. Chopp, McGill University; Anas A. Hamoui, McGill University 

A3L-B SPECIAL SESSION: Algorithms for RF Circuit Simulation (Lecture) 



Chair(s): Angelo Brambilla, Politecnico di Milano 

Florin Constantinescu, Politehnica University, Bucharest 

14:30 

A3L-B.1 Algorithmic Aspects in RF Circuit Simulation .......................................................................................... 501 

Florin Constantinescu, Politehnica University; Angelo Brambilla, Politecnico di Milano; 

Giancarlo Storti Gajani, Politecnico di Milano; Miruna Nitescu, Politehnica University 

14:48 

A3L-B.2 Nonlinear, Transient Simulation of Distributed RF Circuits using Discrete-Time Convolution .......... 505 

Thomas J. Brazil, University College Dublin 

15:06 

A3L-B.3 An Inverse Method of Characteristics for Analyzing Circuits with Widely Separated Time-Scales ...... 509 

Hans-Georg Brachtendorf, University of Applied Science of Upper Austria; Angelika Bunse-Gerstner, University 

of Bremen; Barbara Lang, University of Bremen; Rainer Laur, University of Bremen 

15:24 

A3L-B.4 Noise Analysis Problems and Techniques for RF Electronic Circuits and Optical Fiber 

Communication Systems ............................................................................................................................ 513 

Alper Demir, Koc University 

15:42 

A3L-B.5 Multi-Time Method based on State Equations for RF Circuit Analysis ................................................. 517 

Mihai Iordache, “Politehnica” University of Bucharest; Lucia Dumitriu, “Politehnica” University of Bucharest 

A3L-C Advances in Discrete Cosine Transform (Lecture) 



Chair(s): Oscar Au, Hong Kong University of Science & Technology 

Zhibo Chen, Thomson R&D Center 

14:30 

A3L-C.1 A Comparative Study of Compensation Techniques in Directional DCT’s ............................................ 521 

Jingjing Fu, Hong Kong University of Science and Technology; Bing Zeng, Hong Kong University of Science 

and Technology

14:48 

A3L-C.2 Efficient Vertical/Horizontal-Space 1D-DCT Processing based on Massive-Parallel 

Matrix-Processing Engine .......................................................................................................................... 525 

Takeshi Kumaki, Hiroshima University; Tetsushi Koide, Hiroshima University; Hans Jürgen Mattausch, 

Hiroshima University; Yasuto Kuroda, Renesas Technology Corporation; Hideyuki Noda, Renesas Technology 

Corporation; Katsumi Dosaka, Renesas Technology Corporation; Kazutami Arimoto, Renesas Technology 

Corporation; Kazunori Saito, Renesas Technology Corporation 

15:06 

A3L-C.3 Macroblock-Level Reduced Resolution Video Coding Allowing Adaptive 

DCT Coefficients Selection ......................................................................................................................... 529 

Qiang Hao, Chinese Academy of Sciences; Xiangyang Ji, Chinese Academy of Sciences; Qingming Huang, 

Chinese Academy of Sciences; Debin Zhao, Harbin Institute of Technology; Wen Gao, Chinese Academy of 

Sciences; Xilin Chen, Chinese Academy of Sciences 

15:24 

A3L-C.4 High-Accuracy and Low-Complexity Fixed-Point Inverse Discrete Cosine Transform based on 

AAN’s Fast Algortihm .................................................................................................................................. 533 

Honggang Qi, Chinese Academy of Sciences; Wen Gao, Chinese Academy of Sciences 

15:42 

A3L-C.5 Macroblock-Level Adaptive Scan Scheme for Discrete Cosine Transform Coefficients .................... 537 

Li Zhang, Chinese Academy of Sciences; Wen Gao, Chinese Academy of Sciences; Qiang Wang, Harbin 

Institute of Technology; Debin Zhao, Harbin Institute of Technology 

A3L-D Power Electronic Circuits (Lecture) 



Chair(s): Chika Nwankpa, Drexel University 

Tadashi Suetsugu, Fukuoka University 

14:30 

A3L-D.1 Output Characteristics of Class E Amplifier with Nonlinear Shunt 

Capacitance versus Supply Voltage .......................................................................................................... 541 

Tadashi Suetsugu, Fukuoka University; Marian K. Kazimierczuk, Wright State University 

14:48 

A3L-D.2 Dynamic Droop Scaling for Improving Current Sharing Performance in a 

System with Multiple Supplies ................................................................................................................... 545 

Hsin-Hsin Ho, National Chiao Tung University; Ke-Horng Chen, National Chiao Tung University; Wen- 

Tsao Chen, Industrial Technology Research Institute 

15:06 

A3L-D.3 Designing an Accurate and Robust LC-Compliant Asynchronous ΣΔ Boost DC-DC Converter .......... 549 

Neeraj Keskar, Georgia Institute of Technology; Gabriel A. Rincón-Mora, Georgia Institute of Technology 

15:24 

A3L-D.4 Class DE Inverter with Asymmetric Shunt Capacitors ............................................................................ 553 

Hirotaka Koizumi, Tokyo University of Agriculture and Technology; Kosuke Kurokawa, Tokyo University of 

Agriculture and Technology 

15:42 

A3L-D.5 Power Harvesting with PZT Ceramics ....................................................................................................... 557 

Hong Chen, Tsinghua University; Chen Jia, Tsinghua University; Chun Zhang, Tsinghua University; 

Zhihua Wang, Tsinghua University; Chunsheng Liu, University of Nebraska-Lincoln

A3L-E Wearable & Implantable Devices (Lecture) 



Chair(s): Joseph S. Chang, Nanyang Technological University 

Ralph Etienne-Cummings, Johns Hopkins University 

14:30 

A3L-E.1 Design Strategies for Multi-Channel Low-Noise Recording Systems ................................................... 561 

Robert Rieger, National Sun Yat-Sen University; John Taylor, University of Bath; Yen-Yow Pan, National Sun 

Yat-Sen University 

14:48 

A3L-E.2 Wireless Stimulus-Reflex Detection for Neonatal Monitoring ............................................................... 565 

Craig Hyatt, North Carolina State University 

15:06 

A3L-E.3 Novel Charge-Metering Stimulus Amplifier for Biomimetic Implantable Prosthesis .......................... 569 

Xiang Fang, University of Southern California, Los Angeles; Jack Wills, University of Southern California, Los 

Angeles; John Granacki, University of Southern California, Los Angeles; Jeff LaCoss, University of Southern 

California, Los Angeles; Artak Arakelian, University of Southern California, Los Angeles; James Weiland, 

University of Southern California, Los Angeles 

15:24 

A3L-E.4 Charge Balancing in Functional Electrical Stimulators: A Comparative Study ................................... 573 

Maurits Ortmanns, University of Freiburg 

15:42 

A3L-E.5 A 70dB Gain Low-Power Band-Pass Amplifier for Bio-Signals Sensing Applications ......................... 577 

Cheng Chih Liu, Oklahoma State University 

A3L-F Digital Filterbanks & Multi-Dimensional DSP (Lecture) 



Chair(s): Soontorn Oraintara, University of Texas at Arlington 

Eric Rogers, University of Southampton 

14:30 

A3L-F.1 A Class of Cosine-Modulated Filter Banks with Multiple Prototype Filters ......................................... 581 

Chao Wu, Concordia University; Wei-Ping Zhu, Concordia University; M.N.S. Swamy, Concordia University 

14:48 

A3L-F.2 Design of Cosine-Modulated Pseudo-QMF Banks using Semidefinite Programming Relaxation ..... 585 

H.H. Kha, University of New South Wales; H.D. Tuan, University of New South Wales; T.Q. Nguyen, University 

of California, San Diego 

15:06 

A3L-F.3 Beamforming of Temporally-Broadband-Bandpass Plane Waves using Real Polyphase 

2-D FIR Trapezoidal Filters ......................................................................................................................... 589 

Thushara K. Gunaratne, University of Calgary; Len T. Bruton, University of Calgary 

15:24 

A3L-F.4 Filtering of Discrete Linear Repetitive Processes with H∞ and ℓ2-ℓ∞ Performance ......................... 593 

Ligang Wu, Harbin Institute of Technology; James Lam, University of Hong Kong; Wojciech Paszke, University 

of Zielona Góra; Krzysztof Galkowski, University of Zielona Góra; Eric Rogers, University of Southampton; 

Anton Kummert, University of Wuppertal

15:42 

A3L-F.5 Revisiting the Absolutely Minimal Realization for Two-Dimensional Digital Filters ........................... 597 

Zhiping Lin, Nanyang Technological University; Li Xu, Akita Prefectural University; Yoshihisa Anazawa, Akita 

Prefectural University 

A3L-G SPECIAL SESSION: Sensor Integration in Autonomous Systems (Lecture) 



Chair(s): Csaba Rekeczky, Hungarian Academy of Sciences 

Bertram Shi, Hong Kong University of Science & Technology 

14:30 

A3L-G.1 Sensor Integration in Autonomous Systems ............................................................................................ 601 

Bertram E. Shi, Hong Kong University of Science and Technology; Csaba Rekeczky, 

Péter Pázmány Catholic University 

14:48 

A3L-G.2 A Systems View of a Neuromorphic VLSI Echolocation System ............................................................ 605 

Timothy K. Horiuchi, University of Maryland, College Park; Matthew Cheely, University of Maryland, College Park 

15:06 

A3L-G.3 Integrating High-Level Sensor Features via STDP for Bio-Inspired Navigation ................................... 609 

P. Arena, Università degli Studi di Catania; L. Fortuna, Università degli Studi di Catania; M. Frasca, Università 

degli Studi di Catania; L. Patanè, Università degli Studi di Catania; C. Sala, Università degli Studi di Catania 

15:24 

A3L-G.4 Sensor-Based Dynamic Control of the Central Pattern Generator for Locomotion ............................. 613 

Francesco Tenore, Johns Hopkins University; R. Jacob Vogelstein, Johns Hopkins University; 

Ralph Etienne-Cummings, Johns Hopkins University 

15:42 

A3L-G.5 Elastic Grid based Analysis of Motion Field for Object-Motion Detection in Airborne Video Flows ..... 617 

Gergely Balázs Soós, Péter Pázmány Catholic University; Csaba Rekeczky, Computer and Automation 

Research Institute, HAS 

A3L-H Clocked Circuits (Lecture) 



Chair(s): Koushik Maharatna, University of Southampton 

Chua-Chin Wang, National Sun Yat-sen University 

14:30 

A3L-H.1 Delay and Clock Skew Variation due to Coupling Capacitance and Inductance ................................ 621 

Abinash Roy, University of Illinois at Chicago; Noha Mahmoud, University of Illinois at Chicago; 

Masud H. Chowdhury, University of Illinois at Chicago 

14:48 

A3L-H.2 Design of Reversible Sequential Elements with Feasibility of Transistor Implementation ............... 625 

Himanshu Thapliyal, Nanyang Technological University; A.P. Vinod, Nanyang Technological University 

15:06 

A3L-H.3 Crosstalk Effects in Event-Driven Self-Timed Circuits Designed with 90nm CMOS Technology ....... 629 

Syed Rafay Hasan, Concordia University; Yvon Savaria, École Polytechnique de Montréal

15:24 

A3L-H.4 A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and 

Standard-Cell based Designs ..................................................................................................................... 633 

Bill Pontikakis, École Polytechnique de Montréal; Hung Tien Bui, Université du Québec à Chicoutimi; 

François-Raymond Boyer, École Polytechnique de Montréal; Yvon Savaria, École Polytechnique de Montréal 

15:42 

A3L-H.5 Power-Delay Efficient Overlap-Based Charge-Sharing Free Pseudo-Dynamic D Flip-Flops ............... 637 

O. Sarbishei, Ferdowsi University of Mashhad; M. Maymandi-Nejad, Ferdowsi University of Mashhad 

A3L-J Interconnect Design & Analysis I (Lecture) 




Morris Ker, National Chiao-Tung University 

14:30 

A3L-J.1 Quasi-Resonant Interconnects: A Low Power Design Methodology ..................................................... 641 

Jonathan Rosenfeld, University of Rochester; Eby G. Friedman, University of Rochester 

14:48 

A3L-J.2 Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew ...................................... 645 

Sherif A. Tawfik, University of Wisconsin-Madison; Volkan Kursun, University of Wisconsin-Madison 

15:06 

A3L-J.3 Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding ............... 649 

Ethiopia Nigussie, University of Turku; Juha Plosila, University of Turku; Jouni Isoaho, University of Turku 

15:24 

A3L-J.4 Wavelet-Based Interpolation Point Selection for Multi-Shifted Arnoldi ............................................... 653 

Mehboob Alam, Rice University; Arthur Nieuwoudt, Rice University; Yehia Massoud, Rice University 

15:42 

A3L-J.5 A Novel Active Decoupling Capacitor Design in 90nm CMOS ............................................................... 657 

Xiongfei Meng, University of British Columbia; Karim Arabi, PMC-Sierra Inc.; Resve Saleh, University of 

British Columbia 

A3L-K MIMO Systems (Lecture) 



Chair(s): Tzi-Dar Chiueh, National Taiwan University 

Nam Ling, Santa Clara University 

14:30 

A3L-K.1 On the Degree of MIMO Systems ............................................................................................................... 661 

P.P. Vaidyanathan, California Institute of Technology 

14:48 

A3L-K.2 High Speed Sphere Decoding based on Vertically Incremental Computation ..................................... 665 

Se-Hyeon Kang, Samsung Electronics; In-Cheol Park, KAIST 

15:06 

A3L-K.3 Beamforming MIMO Receiver with Reduced Hardware Complexity ..................................................... 669 

Omid Oliaei, University of Massachusetts, Amherst

15:24 

A3L-K.4 VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding .... 673 

A. Burg, ETH Zurich; D. Seethaler, Vienna University of Technology; G. Matz, Vienna University of Technology 

15:42 

A3L-K.5 MIMO Transceiver Design based on a Modified Geometric Mean Decomposition ............................. 677 

Wen-Chih Kan, University of Minnesota; Gerald E. Sobelman, University of Minnesota 

A3L-L Nonlinear Circuit Design & Implementation (Lecture) 



Chair(s): Michael Green, University of California, Irvine 

Wallace Tang, City University of Hong Kong 

14:30 

A3L-L.1 Improved Dynamic Model of Fast-Settling Linear-in-dB Automatic Gain Control Circuit ................... 681 

Hsuan-Yu Marcus Pan, University of California, San Diego; Lawrence E. Larson, University of California, San Diego 

14:48 

A3L-L.2 A Simplicial PWL Integrated Circuit Realization ..................................................................................... 685 

Martin Di Federico, Universidad Nacional del Sur; Pedro Julián, Universidad Nacional del Sur; 

Tomaso Poggi, University of Genova; Marco Storace, University of Genova 

15:06 

A3L-L.3 Class AB Pseudo-Differential CMOS Squarer Circuit .............................................................................. 689 

Jaime Ramirez-Angulo, New Mexico State University; Raghavender Chintham, New Mexico State University; 

Antonio J. Lopez-Martin, Public University of Navarra; Ramon G. Carvajal, University of Seville 

15:24 

A3L-L.4 Maximum-Period PRNGs Derived from a Piecewise Linear One-Dimensional Map ............................ 693 

Tommaso Addabbo, University of Siena; Massimo Alioto, University of Siena; Ada Fort, University of Siena; 

Santina Rocchi, University of Siena; Valerio Vignoli, University of Siena 

15:42 

A3L-L.5 From n-Scroll to n×m-Scroll Attractors: A General Structure based on Chua’s Circuit Framework .. 697 

Simin Yu, Guangdong University of Technology; Wallace K.S. Tang, City University of Hong Kong; 

Guanrong Chen, City University of Hong Kong 

A3L-M Amplifiers III (Lecture) 




Paul Hasler, Georgia Institute of Technology 

14:30 

A3L-M.1 Power Supply Noise in Bang-Bang Control Class D Amplifier ................................................................ 701 

Tong Ge, Nanyang Technological University; Joseph S. Chang, Nanyang Technological University; Wei Shu, 

Nanyang Technological University 

14:48 

A3L-M.2 Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers using Body-Driven 

Gain-Boosting Technique ............................................................................................................................ 705 

S. Alireza Zabihian, Ferdowsi University of Mashhad; Reza Lotfi, Ferdowsi University of Mashhad

15:06 

A3L-M.3 Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier .......... 709 

Rahul Singh, École Polytechnique de Montréal; Yves Audet, École Polytechnique de Montréal; Yves Gagnon, 

LTRIM Technologies Inc.; Yvon Savaria, École Polytechnique de Montréal 

15:24 

A3L-M.4 Highly Linear Bipolar Transconductor for Broadband High-Frequency Applications with 

Improved Input Voltage Swing ................................................................................................................... 713 

Hsuan-Yu Marcus Pan, University of California, San Diego; Lawrence E. Larson, University of California, San Diego 

15:42 

A3L-M.5 A New High-Speed Class-AB Current-Mode Circuit ................................................................................. 717 

Behnam Sedighi, Sharif University of Technology; Mehrdad Sharif-Bakhtiar, Sharif University of Technology 

A4L-A Oversampling Data Conversion III (Lecture) 




Sameer Sonkusale, Tufts University 

16:20 

A4L-A.1 On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping 

Sigma-Delta Modulators ............................................................................................................................. 721 

Matthias Keller, University of Freiburg - IMTEK; Alexander Buhmann, University of Freiburg - IMTEK; 

Maurits Ortmanns, University of Freiburg - IMTEK; Yiannos Manoli, University of Freiburg - IMTEK 

16:38 

A4L-A.2 Design of a 130-nm CMOS Reconfigurable Cascade ΣΔ Modulator for GSM/UMTS/Bluetooth ...... 725 

Alonso Morgado, University of Sevilla; Rocío del Río, University of Sevilla; José M. de la Rosa, University of Sevilla 

16:56 

A4L-A.3 Tonality Index of Sigma-Delta Modulators: A Psychoacoustics Model based Approach .................... 729 

Jaswinder Lota, Sepura Ltd., University of Westminster; Mohommad Al-Janabi, University of Westminster; 

Izzet Kale, University of Westminster, Eastern Mediterranean University 

17:14 

A4L-A.4 A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement ................................. 733 

Sunwoo Kwon, Oregon State University; Un-Ku Moon, Oregon State University 

17:32 

A4L-A.5 A 10-Bit 2GHz Current-Steering CMOS D/A Converter ........................................................................... 737 

Ling Yuan, Chinese Academy of Sciences; Weining Ni, Chinese Academy of Sciences; Yin Shi, Chinese 

Academy of Sciences; Foster F. Dai, Auburn University 

A4L-B SPECIAL SESSION: Multifunctional Circuits & Systems for Future 

Generations of Wireless Comm. (Lecture) 



Chair(s): Shahriar Mirabbasi, University of British Columbia 

Aleksandar Tasic, Delft University of Technology 

16:20 

A4L-B.1 Design Considerations for Future RF Circuits ......................................................................................... 741 

Behzad Razavi, University of California, Los Angeles

16:38 

A4L-B.2 Receiver Front-End Circuits for Future Generations of Wireless Communications ............................ 745 

M. Sanduleanu, Philips Research Eindhoven; M. Vidojkovic, Eindhoven University of Technology; 

V. Vidojkovic, Philips Research Eindhoven; A. van Roermund, Eindhoven University of Technology; 

A. Tasic, Delft University of Technology 

16:56 

A4L-B.3 Companding Baseband Switched Capacitor Filters and ADCs for WLAN Applications ...................... 749 

Vaibhav Maheshwari, Delft University of Technology; Wouter A. Serdijn, Delft University of Technology; 

John R. Long, Delft University of Technology 

17:14 

A4L-B.4 Multifunctional RF Transmitters for Next Generation Wireless Transceivers ..................................... 753 

Lawrence Larson, University of California, San Diego; Peter Asbeck, University of California, San Diego; 

Donald Kimball, University of California, San Diego 

17:32 

A4L-B.5 Low-Complexity Ultra Wideband Communications ................................................................................. 757 

John F.M. Gerrits, CSEM; John R. Farserotu, CSEM; John R. Long, Delft University of Technology 

A4L-C Efficient Multimedia Hardware (Lecture) 



Chair(s): Liang Gee Chen, National Taiwan University 

Bin-Da Liu, National Cheng Kung University 

16:20 

A4L-C.1 Analysis of an SOC Architecture for MPEG Reconfigurable Video Coding Framework ...................... 761 

Jer-Min Hsiao, National Chiao Tung University; Chun-Jen Tsai, National Chiao Tung University 

16:38 

A4L-C.2 Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware .................. 765 

Jae-Sung Yoon, KAIST; Chang-Hyo Yu, KAIST; Donghyun Kim, KAIST; Lee-Sup Kim, KAIST 

16:56 

A4L-C.3 CREMA: A Parallel Hardware Raytracing Machine ................................................................................. 769 

Ulf Ochsenfahrt, University of Rostock; Ralf Salomon, University of Rostock 

17:14 

A4L-C.4 A Real Time and Low Cost Hardware Architecture for Video Abstraction System .............................. 773 

Li-Chuan Chang, National Cheng Kung University; Yen-Sung Chen, National Cheng Kung University; 

Rung-Wen Liou, National Cheng Kung University; Chih-Hung Kuo, National Cheng Kung University; 

Chia-Hung Yeh, National Dong Hwa University; Bin-Da Liu, National Cheng Kung University 

17:32 

A4L-C.5 VLSI Implementation for Portable Application Oriented MPEG-4 Audio Codec ................................... 777 

Peilin Liu, Shanghai Jiaotong University; Lingzhi Liu, Shanghai Jiaotong University; Ning Deng, Fujitsu R&D 

Center Co.,LTD; Xuan Fu, Fujitsu R&D Center Co.,LTD; Jiayan Liu, Shanghai Jiaotong University; 

Qianru Liu, Shanghai Jiaotong University; Guocheng Zhang, Shanghai Jiaotong University; 

Bin He, Shanghai Jiaotong University

A4L-D Switching Power Converters (Lecture) 



Chair(s): Dariusz Czarkowski, Polytechnic University Brooklyn 

Marian K. Kazimierczuk, Wright State University 

16:20 

A4L-D.1 Adaptive Variable Switching Frequency Digital Controller Algorithm to Optimize Efficiency ........... 781 

Wisam Al-Hoor, University of Central Florida; Jaber A. Abu Qahouq, Intel Corporation; Lilly Huang, Intel 

Corporation; Issa Batarseh, University of Central Florida 

16:38 

A4L-D.2 Feed-Forward Pulse Width Modulation for High Line Regulation Buck or Boost Converters ............ 785 

Huan-Jen Yang, National Chiao Tung University; Ke-Horng Chen, National Chiao Tung University; 

Yung-Pin Lee, Industrial Technology Research Institute 

16:56 

A4L-D.3 Bifurcation of Multiple-Input Parallel dc-dc Converters with Dynamic Winner-Take-All Switching .. 789 

Yuki Ishikawa, Hosei University; Toshimichi Saito, Hosei University 

17:14 

A4L-D.4 Computer-Aided Average-Value Modeling of Fourth-Order PWM DC-DC Converters .......................... 793 

Ali Davoudi, University of Illinois; Juri Jatskevich, University of British Columbia; 

Patrick L. Chapman, University of Illinois 

17:32 

A4L-D.5 Hopf-Type Intermediate-Scale Bifurcation in Single-Stage Power-Factor-Correction 

Power Supplies ............................................................................................................................................ 797 

Dong Dai, Xi’an Jiaotong University; Shengnan Li, Xi’an Jiaotong University; Xikui Ma, Xi’an Jiaotong 

University; Chi K. Tse, Hong Kong Polytechnic University 

A4L-E Medical Interfacing System (Lecture) 



Chair(s): Andreas Demosthenous, University College London 

Roman Genov, University of Toronto 

16:20 

A4L-E.1 Incorporating Back Telemetry in a Full-Wave CMOS Rectifier for RFID and 

Biomedical Applications ............................................................................................................................. 801 

Suresh Atluri, North Carolina State University; Maysam Ghovanloo, North Carolina State University 

16:38 

A4L-E.2 Low-Power Low-Noise Neural Amplifier in 0.18µm FD-SOI Technology ................................................ 805 

Donghwi Kim, Stony Brook University; Ridha Kamoua, Stony Brook University; 

Milutin Stanaćević, Stony Brook University 

16:56 

A4L-E.3 Wireless Implant Communications for Biomedical Monitoring Sensor Network ................................ 809 

Marc Simon Wegmueller, ETH Zurich; Martin Hediger, ETH Zurich; Thomas Kaufmann, ETH Zurich; 

Felix Buergin, ETH Zurich; Wolfgang Fichtner, ETH Zurich 

17:14 

A4L-E.4 A CMOS Contact Imager for Cell Detection in Bio-Sensing Applications ............................................. 813 

T. Tam, University of Calgary; G.A. Jullien, University of Calgary; O. Yadid-Pecht, University of Calgary

17:32 

A4L-E.5 A Matching Technique for Biphasic Stimulation Pulse .......................................................................... 817 

Edward K.F. Lee, Alfred Mann Foundation; Anthony Lam, Alfred Mann Foundation 

A4L-F Discrete-Time Transforms & Statistical/Nonlinear Signal Processing (Lecture) 



Chair(s): Dominic K. C. Ho, University of Missouri-Columbia 

Ioannis Pitas, University of Thessaloniki 

16:20 

A4L-F.1 A Simultaneous Div-Curl 2D Clifford Fourier Transform Filter for Enhancing Vortices, Sinks and 

Sources in Sampled 2D Vector Field Images ........................................................................................... 821 

Hoda Mohammadzade, University of Calgary; Len T. Bruton, University of Calgary 

16:38 

A4L-F.2 Direct Batch Evaluation of Desirable Eigenvectors of the DFT Matrix by Constrained Optimization .... 825 

Magdy Tawfik Hanna, Fayoum University 

16:56 

A4L-F.3 An Efficient Identification Algorithm for FIR Filtering with Noisy Data ................................................ 829 

Da-Zheng Feng, Xidian University; Wei Xing Zheng, University of Western Sydney 

17:14 

A4L-F.4 A New Minimum Variance Spectral Estimation Method for Analyzing 

Click-Evoked Otoacoustic Emissions ........................................................................................................ 833 

Z.G. Zhang, University of Hong Kong; S.C. Chan, University of Hong Kong; V.W. Zhang, University of Hong 

Kong; B. McPherson, University of Hong Kong 

17:32 

A4L-F.5 A Novel Motion Detection Pointing Device using a Binary CMOS Image Sensor ................................ 837 

Hee Ju Park, Korea University; Kyung Bum Kim, Korea University; Jeong Hun Kim, Korea University; 

Suki Kim, Korea University 

A4L-G SPECIAL SESSION: Spike Processing Based Hardware Vision Systems (Lecture) 



Chair(s): Bernabe Linares-Barranco, Instituto de Microelectronica de Sevilla 

Shih-Chii Liu, ETH Zurich 

16:20 

A4L-G.1 Spike Events Processing for Vision Systems ........................................................................................... 841 

R. Serrano-Gotarredona, Instituto de Microelectrónica de Sevilla; T. Serrano-Gotarredona, Instituto de Microelectrónica 

de Sevilla; A.J. Acosta-Jiménez, Instituto de Microelectrónica de Sevilla; A. Linares-Barranco, Instituto de 

Microelectrónica de Sevilla; G. Jimenez-Moreno, Instituto de Microelectrónica de Sevilla; A. Civit-Balcells, 

Instituto de Microelectrónica de Sevilla; B. Linares-Barranco, Instituto de Microelectrónica de Sevilla 

16:38 

A4L-G.2 Fast Sensory Motor Control based on Event-Based Hybrid Neuromorphic-Procedural System ........ 845 

T. Delbruck, Institute of Neuroinformatics, UNI-ETH Zürich; Patrick Lichtsteiner, Institute of Neuroinformatics, 

UNI-ETH Zürich 

16:56 

A4L-G.3 Address-Event Video Streaming over Wireless Sensor Networks .......................................................... 849 

Joon Hyuk Park, Yale University; Andreas Savvides, Yale University; Eugenio Culurciello, Yale University

17:14 

A4L-G.4 Quantifying Input and Output Spike Statistics of a Winner-Take-All Network in a Vision System .... 853 

Matthias Oster, Institute of Neuroinformatics, UNI-ETH Zürich; Rodney Douglas, Institute of Neuroinformatics, 

UNI-ETH Zürich; Shih-Chii Liu, Institute of Neuroinformatics, UNI-ETH Zürich 

17:32 

A4L-G.5 High-Speed Serial AER on FPGA ................................................................................................................ 857 

Hans Kristian Otnes Berge, University of Oslo; Philipp Häfliger, University of Oslo 

A4L-H On-Chip Data Communication & Clock (Lecture) 



Chair(s): Eby Friedman, University of Rochester 


16:20 

A4L-H.1 Mixed Techniques to Protect Precharged Busses Against Differential Power Analysis Attacks ...... 861 

Massimo Alioto, University of Siena; Massimo Poli, University of Siena; Santina Rocchi, University of Siena; 

Valerio Vignoli, University of Siena 

16:38 

A4L-H.2 Power Reduction of On-Chip Serial Links ................................................................................................. 865 

Amit Kedia, University of British Columbia; Resve Saleh, University of British Columbia 

16:56 

A4L-H.3 Low-Latency Quasi-Synchronous Transmission Technique for 

Multiple-Clock-Domain IP Modules ........................................................................................................... 869 

Jhao-Ji Ye, National Taiwan University; You-Gang Chen, National Taiwan University; I-Chyn Wey, National 

Taiwan University; An-Yeu Wu, National Taiwan University 

17:14 

A4L-H.4 Reconfigurable Heterogeneous Communications and Core Reallocation for 

Dynamic HW Task Management ................................................................................................................ 873 

Yana Krasteva, Universidad Politécnica de Madrid; Eduardo de la Torre, Universidad Politécnica de Madrid; 

Teresa Riesgo, Universidad Politécnica de Madrid 

17:32 

A4L-H.5 Reconfigurable Clock Distribution Circuitry ............................................................................................ 877 

Atanu Chattopadhyay, McGill University; Zeljko Zilic, McGill University 

A4L-J Interconnect Design & Analysis II (Lecture) 





16:20 

A4L-J.1 Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects ....................................... 881 

José Carlos García, University of Las Palmas de Gran Canaria; Juan A. Montiel-Nelson, University of Las 

Palmas de Gran Canaria; Saeid Nooshabadi, Gwangju Institute of Science and Technology 

16:38 

A4L-J.2 Global Interconnect Optimization in the Presence of On-Chip Inductance .......................................... 885 

Abinash Roy, University of Illinois at Chicago; Masud H. Chowdhury, University of Illinois at Chicago

16:56 

A4L-J.3 A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the 

Performance and Suppressing EMI of the SoC ........................................................................................ 889 

Hirokazu Tohya, ICAST, Inc.; Noritaka Toya, ICAST, Inc. 

17:14 

A4L-J.4 Asymmetric Clock Driver for Improved Power and Noise Performances .............................................. 893 

Javier Castro, Instituto de Microelectrónica de Sevilla-CNM-CSIC/Universidad de Sevilla; Pilar Parra, Instituto 

de Microelectrónica de Sevilla-CNM-CSIC/Universidad de Sevilla; Manuel Valencia, Instituto de 

Microelectrónica de Sevilla-CNM-CSIC/Universidad de Sevilla; Antonio J. Acosta, Instituto de 

Microelectrónica de Sevilla-CNM-CSIC/Universidad de Sevilla 

17:32 

A4L-J.5 Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy ........................................................ 897 

Mosin Mondal, Rice University; Sami Kirolos, Rice University; Yehia Massoud, Rice University 

A4L-K Coding for Communications (Lecture) 



Chair(s): Myung Sunwoo, Ajou University 

Xinmiao Zhang, Case Western Reserve University 

16:20 

A4L-K.1 A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm 

Architecture for Reed-Solomon Decoders ................................................................................................ 901 

Seungbeom Lee, Inha University; Hanho Lee, Inha University; Jongyoon Shin, ETRI; Je-Soo Ko, ETRI 

16:38 

A4L-K.2 Simplified Degree Computationless Modified Euclid’s Algorithm and its Architecture ..................... 905 

Jaehyun Baek, Ajou University; Myung H. Sunwoo, Ajou University 

16:56 

A4L-K.3 Towards Gb/s Turbo Decoding of Product Code onto an FPGA Device ................................................ 909 

Camille Leroux, GET/ENST Bretagne, CNRS; Christophe Jego, GET/ENST Bretagne, CNRS; Patrick Adde, 

GET/ENST Bretagne, CNRS; Michel Jezequel, GET/ENST Bretagne, CNRS 

17:14 

A4L-K.4 Low-Latency Memory-Efficient 150-Mbps Turbo FEC Encoder and Decoder ....................................... 913 

Tzu-Chieh Kuo, University of California, Los Angeles; Alan N. Willson, Jr., University of California, Los Angeles 

17:32 

A4L-K.5 Efficient Message Passing Architecture for High Throughput LDPC Decoder ..................................... 917 

Zhiqiang Cui, Oregon State University; Zhongfeng Wang, Oregon State University 

A4L-L Nonlinear Oscillators (Lecture) 



Chair(s): Martin Hasler, EPFL-IC-LANOS 

Yoshifumi Nishio, Tokushima University 

16:20 

A4L-L.1 An Efficient Oscillator Design based on OTA Nonlinearity ..................................................................... 921 

Kofi M. Odame, Georgia Institute of Technology; Paul Hasler, Georgia Institute of Technology

16:38 

A4L-L.2 Application of Pulsed Digital Oscillators in ‘Reverse Mode’ to Eliminate Undesired Vibrations 

in High-Q MEMS Resonators ...................................................................................................................... 925 

Manuel Domínguez, Technical University of Catalonia; Joan Pons, Technical University of Catalonia; 

Jordi Ricart, Technical University of Catalonia 

16:56 

A4L-L.3 CMOS Current-Controlled Oscillators ........................................................................................................ 929 

Junhong Zhao, Concordia University; Chunyan Wang, Concordia University 

17:14 

A4L-L.4 A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-µm CMOS Process ................... 933 

Mostafa Savadi Oskooei, University of Tehran; Ali Afzali-Kusha, University of Tehran; S. Atarodi, Sharif 


17:32 

A4L-L.5 A Noise Reduced Digitally Controlled Oscillator using Complementary Varactor Pairs ..................... 937 

Shaohua Wang, Tsinghua University; Jinguo Quan, Graduate School at Shenzhen; Rong Luo, Tsinghua 

University; Hao Cheng, RF Integrated Corp.; Huazhong Yang, Tsinghua University 

A4L-M Analog Circuits I (Lecture) 



Chair(s): William Eisenstadt, University of Florida 

Shanthi Pavan, IIT Madras 

16:20 

A4L-M.1 Highly Linear V/I Converter with Programmable Current Mirrors ......................................................... 941 

Ivan Padilla, New Mexico State University; Jaime Ramírez-Angulo, New Mexico State University; 

Ramon G. Carvajal, University of Seville; Antonio Lopez-Martin, Universidad Publica de Navarra 

16:38 

A4L-M.2 Electrical Stress-Free High Gain and High Swing Analog Buffer using an 

Adaptive Biasing Scheme ........................................................................................................................... 945 

Hayg Dabag, Ruhr-University of Bochum; Dongwon Seo, Qualcomm Inc.; Manu Mishra, Qualcomm Inc.; 

Josef Hausner, Ruhr-University of Bochum 

16:56 

A4L-M.3 A SiGe BiCMOS Variable Gain Amplifier for Cryogenic Temperature Applications ............................. 949 

Tiejun Cao, University of Arkansas; Hung P. Hoang, University of Arkansas; Beth O. Woods, University of 

Arkansas; H. Alan Mantooth, University of Arkansas 

17:14 

A4L-M.4 Transient Noise Analysis for Comparator-Based Switched-Capacitor Circuits .................................... 953 

Albert Chow, MIT; Hae-Seung Lee, MIT 

17:32 

A4L-M.5 A Fully Integrated Architecture for Fast Programming of Floating Gates ........................................... 957 

Arindam Basu, Georgia Institute of Technology; Paul Hasler, Georgia Institute of Technology

A5P-N Multimedia Analysis & Processing (Poster) 


Place: Poster Area 1 

Chair(s): Julia Chung, National Cheng Kung University 

A5P-N.1 Incremental Spatio-Temporal Feature Extraction and Retrieval for Large Video Database .............. 961 

Bo Geng, Fudan University; Hong Lu, Fudan University; Xiangyang Xue, Fudan University 

A5P-N.4 A Missing Data-Based Feature Fusion Strategy for Noise-Robust Automatic Speech 

Recognition using Noisy Sensors .............................................................................................................. 965 

Cenk Demiroglu, Georgia Institute of Technology; David V. Anderson, Georgia Institute of Technology; 

Mark A. Clements, Georgia Institute of Technology 

A5P-N.5 Gait Analysis for Human Identification through Manifold Learning and HMM .................................... 969 

Ming-Hsu Cheng, National Tsing Hua University; Meng-Fen Ho, National Tsing Hua University; 

Chung-Lin Huang, National Tsing Hua University 

A5P-P Multimedia Communication (Poster) 



Chair(s): Zhengguo Li, Agency for Science, Technology and Research 

A5P-P.1 Efficient Multi-Hypothesis Error Concealment Technique for H.264 .................................................... 973 

Kwanwoong Song, Korea University; Taeyoung Chung, Korea University; Chang-Su Kim, Korea University; 

Young-O Park, Samsung Electronics; Yongdeok Kim, Samsung Electronics; Younghun Joo, Samsung 

Electronics; Yunje Oh, Samsung Electronics 

A5P-P.2 Optimized Multi-Path Routing using Dual Decomposition for Wireless Video Streaming ................. 977 

Yifeng He, Ryerson University; Ivan Lee, Ryerson University; Ling Guan, Ryerson University 

A5P-P.3 Content-Adaptive Wavelet-Based Scalable Video Coding ...................................................................... 981 

Dionisis Athanasopoulos, University of Patras; Thanos Stouraitis, University of Patras 

A5P-Q 3D Video & Perceptual Coding (Poster) 



Chair(s): Frank Shih, New Jersey Institute of Technology 

A5P-Q.1 An Object-Based Approach to Plenoptic Video Processing .................................................................... 985 

Shing-Chow Chan, University of Hong Kong; Zhi-Feng Gan, University of Hong Kong; Heung-Yeung Shum, 

Microsoft Research, Asia 

A5P-Q.2 A Human Vision System based Flash Picture Coding Method for Video Coding ................................. 989 

Quqing Chen, Thomson Corporate Research; Zhengang Nie, Thomson Corporate Research; Zhibo Chen, 

Thomson Corporate Research; Xiaodong Gu, Thomson Corporate Research; Guoping Qiu, University of 

Nottingham; Charles Wang, Thomson Corporate Research 

A5P-Q.3 Disparity Estimation and Virtual View Synthesis from Stereo Video ..................................................... 993 

Jong Dae Oh, University of Southern California, Los Angeles; Siwei Ma, University of Southern California, Los 

Angeles; C.-C. Jay Kuo, University of Southern California, Los Angeles 

A5P-Q.4 Low-Delay View Random Access for Multi-View Video Coding .............................................................. 997 

Yanwei Liu, Chinese Academy of Sciences; Qingming Huang, Chinese Academy of Sciences; Debin Zhao, 

Chinese Academy of Sciences; Wen Gao, Peking University

A5P-Q.5 System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint ..................... 1001 

Pei-Kuei Tsung, National Taiwan University; Li-Fu Ding, National Taiwan University; Wei-Yin Chen, National 

Taiwan University; Shao-Yi Chien, National Taiwan University; Tung-Chien Chen, National Taiwan 

University; Liang-Gee Chen, National Taiwan University 

A5P-R Neural Networks (Poster) 



Chair(s): Derong Liu, University of Illinois at Chicago 

A5P-R.1 Global Asymptotic Stability of Recurrent Neural Networks with Time Varying Delays ..................... 1005 

Huanxin Guan, Northeastern University; Huaguang Zhang, Northeastern University; Zhanshan Wang, Shenyang 

Ligong University; Derong Liu, University of Illinois at Chicago 

A5P-R.2 Upper-Triangulization of Non-Symmetric Matrices using Sanger’s Type Learning Systems ............ 1009 

Mohammed H. Hasan, University of Minnesota Duluth 

A5P-R.3 Accurate Modeling of Drain Current Derivatives of MESFET/HEMT Devices for 

Intermodulation Analysis .......................................................................................................................... 1013 

Aderinto J. Ogunniyi, Morgan State University; Stanley L. Henriquez, Morgan State University; 

Caroline W. Karangu, Morgan State University; Corey Dickens, Morgan State University; 

Carl White, Morgan State University 

A5P-R.4 Cort-X II: Low Power Element Design of a Large-Scale Spatio-Temporal 

Pattern Clustering System ....................................................................................................................... 1017 

Jie Yuan, Hong Kong University of Science and Technology; Ning Song, University of Pennsylvania; 

Nabil Farhat, University of Pennsylvania; Jan Van der Spiegel, University of Pennsylvania 

A5P-R.5 Automatic Detection of Solder Joint Defects on Integrated Circuits .................................................. 1021 

Giuseppe Acciani, Politecnico di Bari; Gioacchino Brunetti, Politecnico di Bari; Girolamo Fornarelli, 

Politecnico di Bari 

A5P-S Graph Theory & Computing in Circuits & Systems II (Poster) 



Chair(s): Krishnaiyan Thulasiraman, University of Oklahoma 

A5P-S.1 Minimum-Cost Load Balancing Document Distribution in Distributed Web Server Systems .......... 1025 

Tsukasa Sone, Saitama University; Toshinori Yamada, Saitama University 

A5P-S.2 Topology Design for Fast Convergence of Network Consensus Algorithms ...................................... 1029 

Ming Cao, Yale University; Chai Wah Wu, IBM Thomas J. Waston Research Center 

A5P-S.3 Cellular Automata with Large Channel Separations ............................................................................. 1033 

Christopher Jenkins, Southern Illinois University; Jayawant Kakade, Southern Illinois University; 

Dimitri Kagaris, Southern Illinois University 

A5P-S.4 Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units ..... 1037 

Awni Itradat, Concordia University; M.O. Ahmad, Concordia University; Ali Shatnawi, Jordan University of 

Science and Technology 

A5P-S.5 2-MITE Product-of-Power-Law Networks ................................................................................................ 1041 

Shyam Subramanian, Georgia Institute of Technology; David V. Anderson, Georgia Institute of Technology

A5P-T CAD I (Poster) 



Chair(s): Sunil Khatri, Texas A&M University 

A5P-T.1 DTS: A Tree based Representation for 3D-Block Packing .................................................................... 1045 

Kunihiro Fujiyoshi, Tokyo University of Agriculture and Technology; Hidenori Kawai, Tokyo University of 

Agriculture and Technology; Keisuke Ishihara, Tokyo University of Agriculture and Technology 

A5P-T.2 Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring ............................ 1049 

Wai-Chung Tang, Chinese University of Hong Kong; Wing-Hang Lo, Chinese University of Hong Kong; 

Yu-Liang Wu, Chinese University of Hong Kong 

A5P-T.3 Thermal Modeling and Temperature Driven Placement for FPGAs ..................................................... 1053 

Shilpa Bhoj, University of Texas at Dallas; Dinesh Bhatia, University of Texas at Dallas 

A5P-T.4 Two Clustering Preprocessing Techniques for Large-Scale Circuits ................................................... 1057 

L. Behjat, University of Calgary; J. Li, University of Calgary; L.J. Rakai, University of Calgary; J. Huang, 

University of Calgary 

A5P-T.5 Design Exploration of a Thermal Management Unit for Dynamic Control of 

Temperature-Induced Clock Skew ........................................................................................................... 1061 

K. Duraisami, Politecnico di Torino; P. Sithambaram, Politecnico di Torino; A. Sathanur, Politecnico di Torino; 

A. Macii, Politecnico di Torino; E. Macii, Politecnico di Torino; M. Poncino, Politecnico di Torino 

A5P-U CAD II (Poster) 



Chair(s): Volkan Kursun, University of Wisconsin at Madison 

A5P-U.1 Programmable Routing Tables for Degradable Torus-Based Networks on Chips ............................. 1065 

A. Shahabi, University of Tehran; N. Honarmand, University of Tehran; Z. Navabi, University of Tehran 

A5P-U.2 A Study on Impact of Leakage Current on Dynamic Power .................................................................. 1069 

Ashesh Rastogi, University of Massachusetts, Amherst; Kunal Ganeshpure, University of Massachusetts, 

Amherst; Sandip Kundu, University of Massachusetts, Amherst 

A5P-U.3 Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency .................... 1073 

Igor Vytvaz, Oregon State University; David C. Lee, Berkeley Design Automation; Suihua Lu, Berkeley Design 

Automation; Amit Mehrotra, Berkeley Design Automation; Un-Ku Moon, Oregon State University; 

Kartikeya Mayaram, Oregon State University 

A5P-U.4 Effective Acceleration of Iterative Slack Distribution Process ............................................................ 1077 

Xinjie Wei, Tsinghua University; Yici Cai, Tsinghua University; Xianlong Hong, Tsinghua University 

A5P-V Adders (Poster) 



Chair(s): Bin-Da Liu, National Cheng Kung University 

A5P-V.1 Design and Synthesis of a Three Input Flagged Prefix Adder .............................................................. 1081 

Vibhuti Dave, Illinois Institute of Technology; Erdal Oruklu, Illinois Institute of Technology; Jafar Saniie, 

Illinois Institute of Technology

A5P-V.2 Designing Efficient Online Testable Reversible Adders with New Reversible Gate .......................... 1085 

Himanshu Thapliyal, Nanyang Technological University; A.P. Vinod, Nanyang Technological University 

A5P-V.3 Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder .................................................... 1089 

John Moskal, Illinois Institute of Technology; Erdal Oruklu, Illinois Institute of Technology; Jafar Saniie, Illinois 

Institute of Technology 

A5P-V.4 High Speed 1-bit Bypass Adder Design for Low Precision Additions .................................................. 1093 

Jong-Suk Lee, Virginia Tech; Dong Sam Ha, Virginia Tech 

A5P-V.5 A Difference based Adder Graph Heuristic for Multiple Constant Multiplication Problems ............ 1097 

Oscar Gustafsson, Linköping University 

A5P-W Video, Image & Speech (Poster) 



Chair(s): Massimo Alioto, Università di Siena v. Roma 

A5P-W.1 Implementation of a Labeling Algorithm based on Contour Tracing with Feature Extraction ........ 1101 

Hugo Hedberg, Lund University; Fredrik Kristensen, Lund University; Viktor Öwall, Lund University 

A5P-W.2 Flexible and Cost Effective Transport Stream Processor for DTV ....................................................... 1105 

Chia-Liang Tsai, National Taiwan University; Shao-Yi Chien, National Taiwan University 

A5P-W.3 Efficient Color Space Conversion using Custom Instruction in a RISC Processor ............................ 1109 

Muhammad Bilal, Lahore University of Management Sciences; Shahid Masud, Lahore University of 

Management Sciences 

A5P-W.4 A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 

16.4MTriangles/s Performance .............................................................................................................. 1113 

Chih-Hao Chao, National Taiwan University; Yen-Lin Kuo, National Taiwan University; An-Yeu Wu, National 

Taiwan University; Weber Chien, Sitronix Technology Cooperation 

A5P-W.5 Flexible Low Power Probability Density Estimation Unit for Speech Recognition ............................ 1117 

Ullas Pazhayaveetil, North Carolina State University; Dhruba Chandra, North Carolina State University; 

Paul Franzon, North Carolina State University 

A5P-X Interconnect Design & Analysis III (Poster) 



Chair(s): Morris Ker, National Chiao-Tung University 

A5P-X.1 Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology .................... 1121 

Ming-Dou Ker, National Chiao-Tung University; Hung-Tai Liao, National Chiao-Tung University 

A5P-X.2 Efficient Insertion of Crosstalk Shielding along On-Chip Interconnect Trees ................................... 1125 

Boyan Semerdjiev, Illinois Institute of Technology; Dimitrios Velenis, Illinois Institute of Technology 

A5P-X.3 Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN) ....... 1129 

C. Raghunandan, International Institute of Information Technology, Hyderabad; K.S. Sainarayanan, 

International Institute of Information Technology, Hyderabad; M.B. Srinivas, International Institute of 

Information Technology, Hyderabad 

A5P-X.5 Applications of AOGL Model-Order Reduction Techniques in Interconnect Analysis ....................... 1133 

Ming-Hong Lai, Chang Gung University; Chia-Chi Chu, National Tsing Hua University; Wu-Shiung Feng, 

Chang Gung University

A5P-Y Low Power Circuits III (Poster) 



Chair(s): Chua-Chin Wang, National Sun Yat-sen University 

A5P-Y.1 A 1.9mW Portable ADPLL-Based Frequency Synthesizer for High Speed Clock Generation ........... 1137 

Ming-Hung Chang, National Chiao-Tung University; Zong-Xi Yang, National Chiao-Tung University; 

Wei Hwang, National Chiao-Tung University 

A5P-Y.2 Clock Gating and Negative Edge Triggering for Energy Recovery Clock ............................................ 1141 

Vishwanadh Tirumalashetty, San Francisco State University; Hamid Mahmoodi, San Francisco State University 

A5P-Y.3 Efficient Power Macromodeling Technique for IP-Based Digital System ........................................... 1145 

Yaseer A. Durrani, Universidad Politécnica de Madrid; Ana Abril, Universidad Politécnica de Madrid; 

Teresa Riesgo, Universidad Politécnica de Madrid 

A5P-Y.4 A CMOS Low Power Fully Digital Adaptive Power Delivery System based on Finite State 

Machine Control ........................................................................................................................................ 1149 

Yong-Bin Kim, Northeastern University; Kyung Ki Kim, Northeastern University; 

James Doyle, Northeastern University 

A5P-Y.5 Impact of Strain on the Design of Low-Power High-Speed Circuits .................................................... 1153 

H. Ramakrishnan, Newcastle University; K. Maharatna, University of Southampton; S. Chattopadhyay, 

Newcastle University; A. Yakovlev, Newcastle University 

A5P-Z Low Power Circuits IV (Poster) 



Chair(s): Masud Chowdhury, University of Illinois at Chicago 

A5P-Z.1 An Energy-Efficient Dual-Edge Triggered Level-Converting Flip-Flop ................................................. 1157 

Lih-Yih Chiou, National Cheng Kung University; Shien-Chun Luo, National Cheng-Kung University 

A5P-Z.2 Optimal Body Biasing for Minimum Leakage Power in Standby Mode .............................................. 1161 

Kyung Ki Kim, Northeastern University; Yong-Bin Kim, Northeastern University 

A5P-Z.3 A Low Power 4-Bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio .................... 1165 

Xiaodong Zhang, University of Louisiana at Lafayette; Magdy Bayoumi, University of Louisiana at Lafayette 

A5P-Z.4 A Low Energy FFT/IFFT Processor for Hearing Aids ............................................................................. 1169 

Kwen-Siong Chong, Nanyang Technological University; Bah-Hwee Gwee, Nanyang Technological University; 

Joseph S. Chang, Nanyang Technological University 

A5P-Z.5 Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency ..................................... 1173 

Bo Fu, University of Rochester; Paul Ampadu, University of Rochester 

A6P-N SPECIAL SESSION: Live Demonstrations of Circuits & Systems I (Poster) 



Chair(s): Tobi Delbruck, Institute of Neuroinformatics 

Philipp Hafliger, University of Oslo 

A6P-N.1 High Performance Processor Array for Image Processing ................................................................... 1177 

Péter Földesy, Hungarian Academy of Sciences, Eutecus Inc.; Ákos Zarándy, Hungarian Academy of Sciences, 

Eutecus Inc.; Csaba Rekeczky, Hungarian Academy of Sciences, AnaLogic Computers; Tamás Roska, 

Hungarian Academy of Sciences

A6P-N.2 The RunBot Architecture for Adaptive, Fast, Dynamic Walking .......................................................... 1181 

Poramate Manoonpong, University of Göttingen; Tao Geng, University of Essex; Bernd Porr, University of 

Glasgow; Florentin Wörgötter, University of Göttingen 

A6P-N.3 ISCAS Special Session Demo: Wireless Video Sensor for Ad-Hoc Networks ..................................... 1185 

Y. Chi, Johns Hopkins University; P. Carpenter, IWT; K. Colling, IWT; G. Cauwenberghs, University of 

California, San Diego; R. Etienne-Cummings, Johns Hopkins University 

A6P-N.4 Silicon Neurons that Inhibit to Synchronize ........................................................................................... 1186 

John V. Arthur, Stanford University; Kwabena Boahen, Stanford University 

A6P-N.5 A Self-Contained Large-Scale FPAA Development Platform ................................................................ 1187 

Christopher M. Twigg, Georgia Institute of Technology; Paul E. Hasler, Georgia Institute of Technology; 

Faik Baskaya, Georgia Institute of Technology 

A6P-P SPECIAL SESSION: Live Demonstrations of Circuits & Systems II (Poster) 





A6P-P.1 Using FPGA for Visuo-Motor Control with a Silicon Retina and a Humanoid Robot ......................... 1192 

A. Linares-Barranco, Universidad de Sevilla; F. Gómez-Rodríguez, Universidad de Sevilla; A. Jiménez- 

Fernández, Universidad de Sevilla; T. Delbrück, UNI-ETH Zürich; P. Lichtensteiner, UNI-ETH Zürich 

A6P-P.2 Wide Dynamic Range, High-Speed Machine Vision with a 2×256 Pixel Temporal 

Contrast Vision Sensor .............................................................................................................................. 1196 

C. Posch, Neuroinformatics, ARC Seibersdorf research GmbH; M. Hofstätter, Neuroinformatics, ARC 

Seibersdorf research GmbH; M. Litzenberger, Neuroinformatics, ARC Seibersdorf research GmbH; D. Matolin, 

Neuroinformatics, ARC Seibersdorf research GmbH; N. Donath, Neuroinformatics, ARC Seibersdorf research 

GmbH; P. Schön, Neuroinformatics, ARC Seibersdorf research GmbH; H. Garn, Neuroinformatics, ARC 

Seibersdorf research GmbH 

A6P-P.3 Battery Powered High Dynamic Range Vision System ......................................................................... 1200 

Pierre-François Rüedi, CSEM S.A.; Eric Grenet, CSEM S.A.; Felix Lustenberger, CSEM S.A. 

A6P-P.4 AER Auditory Filtering and CPG for Robot Control ................................................................................ 1201 

F. Gómez-Rodríguez, Universidad de Sevilla; A. Linares-Barranco, Universidad de Sevilla; L. Miro Amarante, 

Universidad de Sevilla; Shih-Chii Liu, UNI-ETH Zürich; André van Schaik, University of Sydney; 

R. Etienne-Cummings, Johns Hopkins University; M.A. Lewis, Iguana Robotics, Inc. 

A6P-P.5 An Integrated Patch-Clamp Amplifier for High-Density Whole-Cell Recordings ................................ 1205 

Pujitha Weerakoon, Yale University; Kate Klemic, Yale University; Fred J. Sigworth, Yale University; 

Eugenio Culurciello, Yale University 

A6P-Q SPECIAL SESSION: Live Demonstrations of Circuits & Systems III (Poster) 





A6P-Q.1 A Universal Method for Hierarchical Object Recognition based on Low-Power Vision Sensors ..... 1209 

Felix Lustenberger, CSEM SA, Zurich Center; David Beyeler, CSEM SA, Zurich Center; Edo Franzi, CSEM SA, 

Zurich Center; Peter Seitz, CSEM SA, Zurich Center; Thierry Zamofing, CSEM SA, Zurich Center

A6P-Q.2 Thresholded Samplers for UWB Impulse Radar ..................................................................................... 1210 

Håkon A. Hjortland, University of Oslo; Dag T. Wisland, University of Oslo; Tor Sverre Lande, University of 

Oslo; Claus Limbodal, Novelda AS; Kjetil Meisal, Novelda AS 

A6P-Q.3 Data Matrix Code Recognition using the Eye-RIS Vision System ........................................................ 1214 

Amanda Jiménez-Marrufo, AnaFocus Innovaciones Microelectrónicas SL; Ainhoa Mendizábal, AnaFocus 

Innovaciones Microelectrónicas SL; Sergio Morillas-Castillo, AnaFocus Innovaciones Microelectrónicas SL; 

Rafael Domínguez-Castro, AnaFocus Innovaciones Microelectrónicas SL; Servando Espejo, AnaFocus 

Innovaciones Microelectrónicas SL; Rafael Romay-Juárez, AnaFocus Innovaciones Microelectrónicas SL; 

Angel Rodríguez-Vázquez, AnaFocus Innovaciones Microelectrónicas SL 

A6P-Q.4 An On-line, Multi-Parametric, Multi-Channel Physicochemical Monitoring Platform for Stem 

Cell Culture Bioprocessing ....................................................................................................................... 1215 

Xicai Yue, Imperial College London; E.M. Drakakis, Imperial College London; Hua Ye, Imperial College 

London; Mayasari Lim, Imperial College London; A. Mantalaris, Imperial College London; Nicki Panoskaltsis, 

Imperial College London; Anna Radomska, Imperial College London; C. Toumazou, Imperial College London; 

T. Cass, Imperial College London 

A6P-Q.5 A Micropower Cochlear Prosthesis System Demonstrator .................................................................. 1219 

Julius Georgiou, University of Cyprus; Timothy Constandinou, University of Cyprus & Imperial College; 

Christopher Toumazou, Imperial College London 

A6P-Q.6 A Prototyping Co-Design Platform with a Simplified Architecture for Video 

Codec Implementation .............................................................................................................................. 1220 

Yifeng Qiu, University of Calgary; Wael Badawy, University of Calgary; Robert Turney, Xilinx Inc. 

Tuesday, May 29, 2007 

B1L-A Non-Sampling Data Converters (Lecture) 

Time: Tuesday, May 29, 2007, 9:30 - 11:00 


Chair(s): Emmanuel Drakasis, Imperial College London 

Jin Liu, University of Texas, Dallas 

9:30 

B1L-A.1 Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs .... 1225 

Yongjian Tang, Eindhoven University of Technology; Hans Hegt, Eindhoven University of Technology; 

Arthur van Roermund, Eindhoven University of Technology; Konstantinos Doris, NXP Semiconductors; 

Joost Briaire, NXP Semiconductors 

9:48 

B1L-A.2 A Continuous Time Analog-to-Digital Converter with 90µW and 1.8µV/LSB based on 

Differential Ring Oscillator Structures ................................................................................................... 1229 

Andreas Tritschler, Robert Bosch GmbH 

10:06 

B1L-A.3 Digital Background Calibration of Higher Order Nonlinearities in Pipelined ADCs .......................... 1233 

Anand Meruva, Arizona State University; Bahar Jalali, Arizona State University 

10:24 

B1L-A.4 “Split-ADC” Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity 

Errors in a 14b Pipeline ADC .................................................................................................................... 1237 

John A. McNeill, Worcester Polytechnic Institute; Sanjeev Goluguri, Worcester Polytechnic Institute; 

Abhilash Nair, Worcester Polytechnic Institute

10:42 

B1L-A.5 A Gradient-Based Algorithm for Sampling Clock Skew Calibration of SHA-Less Pipeline ADCs ..... 1241 

Pingli Huang, University of Illinois at Urbana-Champaign; Yun Chiu, University of Illinois at Urbana-Champaign 

B1L-B SPECIAL SESSION: Circuit Design in the Presence of Device Variability (Lecture) 



Chair(s): Glenn E. Cowan, IBM T.J. Watson Research Center 

Keith A. Jenkins, IBM T.J. Watson Research Center 

9:30 

B1L-B.1 Device Mismatch: An Analog Design Perspective ................................................................................. 1245 

Peter R. Kinget, Columbia University 

9:48 

B1L-B.2 Transient Variations in Emerging SOI Technologies: Modeling and Impact on 

Analog/Mixed-Signal Circuits .................................................................................................................. 1249 

Michael Fulde, Technical University Munich, Infineon Technologies AG; Doris Schmitt-Landsiedel, Technical 

Univerity Munich; Gerhard Knoblinger, Infineon Technologies AG 

10:06 

B1L-B.3 Digital RF Processing Techniques for Device Mismatch Tolerant Transmitters in 

Nanometer-Scale CMOS ........................................................................................................................... 1253 

Khurram Waheed, Texas Instruments, Inc.; Robert Bogdan Staszewski, Texas Instruments Inc. 

10:24 

B1L-B.4 An Approach to Detect Negative Bias Temperature Instability (NBTI) in Ultra-Deep 

Submicron Technologies .......................................................................................................................... 1257 

Ronald Carlsten, Ridgetop Group, Inc.; Jeremy Ralston-Good, Ridgetop Group, Inc.; Douglas Goodman, 

Ridgetop Group, Inc. 

10:42 

B1L-B.5 Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates ....................................... 1261 

Brian Greskamp, University of Illinois at Urbana-Champaign; Smruti R. Sarangi, University of Illinois at 

Urbana-Champaign; Josep Torrellas, University of Illinois at Urbana-Champaign 

B1L-C Multimedia Watermarking & Color Processing (Lecture) 



Chair(s): Oscar Au, Hong Kong University of Science & Technology 

Min Wu, University of Maryland 

9:30 

B1L-C.1 Effect of Recompression on Attacking JPEG Steganographic Schemes – An Experimental Study ... 1265 

Yun Q. Shi, New Jersey Institute of Technology; Chunhua Chen, New Jersey Institute of Technology; Wen Chen, 

New Jersey Institute of Technology; Maala P. Kaundinya, New Jersey Institute of Technology 

9:48 

B1L-C.2 Data Hiding for Binary Images Authentication by Considering a Larger Neighborhood .................. 1269 

Huijuan Yang, Nanyang Technological University; Alex C. Kot, Nanyang Technological University 

10:06 

B1L-C.3 Enhanced Image Trans-Coding using Reversible Data Hiding ............................................................. 1273 

Richard Y.M. Li, Hong Kong University of Science and Technology; Oscar C. Au, Hong Kong University of 

Science and Technology; Carman K.M. Yuk, Hong Kong University of Science and Technology; Shu-Kei Yip, Hong 

Kong University of Science and Technology; Tai-Wai Chan, Hong Kong University of Science and Technology

10:24 

B1L-C.4 Cost Effective Color Filter Array Demosaicking with Chrominance Variance 

Weighted Interpolation ............................................................................................................................. 1277 

Tsung-Huang Chen, National Taiwan University; Shao-Yi Chien, National Taiwan University 

10:42 

B1L-C.5 Color Demosaicking using Direction Similarity in Color Difference Spaces ...................................... 1281 

Carman K.M. Yuk, Hong Kong University of Science and Technology; Oscar C. Au, Hong Kong University of 

Science and Technology; Richard Y.M. Li, Hong Kong University of Science and Technology; Sui-Yuk Lam, 

Hong Kong University of Science and Technology 

B1L-D Neural Network Circuits & Systems (Lecture) 



Chair(s): Simone Fiori, Universita Politecnica delle Marche 


9:30 

B1L-D.1 A Simple Neural Cross-Correlation Engine ............................................................................................. 1285 

J. Tapson, University of Cape Town; R. Etienne-Cummings, Johns Hopkins University 

9:48 

B1L-D.2 An Energy-Scalable Margin Propagation-Based Analog VLSI Support Vector Machine ................... 1289 

Paul Kucher, Michigan State University; Shantanu Chakrabartty, Michigan State University 

10:06 

B1L-D.3 Neural Learning by Retractions on Manifolds ....................................................................................... 1293 

Simone Fiori, Università Politecnica delle Marche 

10:24 

B1L-D.4 A Scalable and Programmable Architecture for the Continuous Restricted 

Boltzmann Machine in VLSI ..................................................................................................................... 1297 

C.C. Lu, National Tsing-Hua University; C.Y. Hong, National Tsing-Hua University; H. Chen, National Tsing- 

Hua University 

10:42 

B1L-D.5 A Current-Mode Analog Circuit for Reinforcement Learning Problems .............................................. 1301 

Terrence S.T. Mak, Chinese University of Hong Kong; K.P. Lam, Chinese University of Hong Kong; H.S. Ng, 

Chinese University of Hong Kong; G. Rachmuth, MIT; C.-S. Poon, MIT 

B1L-E Biomedical Signal & Image Processing (Lecture) 




Rizwan Tec, University of Florida, Gainesville 

9:30 

B1L-E.1 Reduced Complexity Space-Time-Frequency Model for Multi-Channel EEG and its Applications .. 1305 

Yodchanan Wongsawat, University of Texas at Arlington; Soontorn Oraintara, University of Texas at Arlington; 

K.R. Rao, University of Texas at Arlington 

9:48 

B1L-E.2 On the Time-Frequency Analysis of Trunk Muscles during Sudden Release of Load ........................ 1309 

K.M. Tsui, University of Hong Kong; Zhiguo Zhang, University of Hong Kong; S.C. Chan, University of Hong 

Kong; Yong Hu, University of Hong Kong; K.D.K. Luk, University of Hong Kong

10:06 

B1L-E.3 3D Shape Acquisition System Dedicated to a Visual Intracortical Stimulator .................................. 1313 

Alexandra Delia Doljanu, École Polytechnique de Montréal; Mohamad Sawan, École Polytechnique de Montréal 

10:24 

B1L-E.4 D-Infinite Criteria for MEG Characterization .......................................................................................... 1317 

P. Arena, Università degli Studi di Catania; M. Bucolo, Università degli Studi di Catania; L. Fortuna, 

Università degli Studi di Catania; M. Frasca, Università degli Studi di Catania; M. La Rosa, Università degli 

Studi di Catania; F. Sapuppo, Università degli Studi di Catania; D. Shannahoff-Khalsa, University of California, 

San Diego; E. Umana, Università degli Studi di Catania 

10:42 

B1L-E.5 Design and Implementation of a Low Complexity Near-Lossless Image Compression Method 

for Wireless Endoscopy Capsule System ................................................................................................ 1321 

Xiaowen Li, Tsinghua University; Xiang Xie, Tsinghua University; Xinkai Chen, Tsinghua University; 

Guolin Li, Tsinghua University; Li Zhang, Tsinghua University; Zhihua Wang, Tsinghua University; 

Hong Chen, Tsinghua University 

B1L-F Digital Signal Processing for Communications (Lecture) 



Chair(s): Sergios Theodoridis, University of Athens 

Wei Xing Zheng, University of Western Sydney 

9:30 

B1L-F.1 Energy-Efficient Double-Binary Tail-Biting Turbo Decoder based on Border Metric Encoding ........ 1325 

Ji-Hoon Kim, Korea Advanced Institute of Science and Technology; In-Cheol Park, Korea Advanced Institute of 


9:48 

B1L-F.2 On Equalization of Channels with ZP Precoders ................................................................................... 1329 

P.P. Vaidyanathan, California Institute of Technology 

10:06 

B1L-F.3 An Adaptive Step-Size Order Statistic Time Domain Equaliser for Discrete Multitone Systems ..... 1333 

Suchada Sitjongsataporn, Mahanakorn University of Technology; Peerapol Yuvapoositanon, Mahanakorn 


10:24 

B1L-F.4 Training-Based Estimation of Correlated MIMO Fading Channels in the Presence of 

Colored Interference ................................................................................................................................. 1337 

Dimitrios Katselis, University of Athens; Eleftherios Kofidis, University of Piraeus; Sergios Theodoridis, 

University of Athens 

10:42 

B1L-F.5 An Efficient Finite Precision Realization of the Adaptive Decision Feedback Equalizer ................. 1341 

Rafiahamed Shaik, Indian Institute of Technology; Mrityunjoy Chakraborty, Indian Institute of Technology

B1L-G Wireless Sensor Network Design & Applications (Lecture) 



Chair(s): Ming-Ting Sun, University of Washington, Seattle 

Dmitri Perkins, University of Louisiana at Lafayette 

9:30 

B1L-G.1 Tradeoffs in the Design of CMOS Receivers for Low Power Wireless Sensor Networks .................. 1345 

James Ayers, Oregon State University; Kartikeya Mayaram, Oregon State University; Terri S. Fiez, Oregon 

State University 

9:48 

B1L-G.2 A Batteryless Vibration-Based Energy Harvesting System for Ultra Low Power 

Ubiquitous Applications ............................................................................................................................ 1349 

Lu Chao, Hong Kong University of Science and Technology; Chi-Ying Tsui, Hong Kong University of Science 

and Technology; Wing-Hung Ki, Hong Kong University of Science and Technology 

10:06 

B1L-G.3 An Inductor-Less Micro Solar Power Management System Design for Energy 

Harvesting Applications ............................................................................................................................ 1353 

Hui Shao, Hong Kong University of Science and Technology; Chi-Ying Tsui, Hong Kong University of Science 

and Technology; Wing-Hung Ki, Hong Kong University of Science and Technology 

10:24 

B1L-G.4 Design and Implementation of Routing Scheme for Wireless Network-On-Chip ............................... 1357 

Yi Wang, University of Louisiana at Lafayette; Dan Zhao, University of Louisiana at Lafayette 

10:42 

B1L-G.5 Data Throughput Optimization in the IEEE 802.15.4 Medical Sensor Networks .............................. 1361 

Stig Støa, Rikshospitalet Medical Center; Ilangko Balasingham, Rikshospitalet Medical Center, Norwegian 

University of Science and Technology; Tor A. Ramstad, Norwegian University of Science and Technology 

B1L-H Image & Video Circuits (Lecture) 



Chair(s): Vasile Mosneaga, Fukuoka University 

Thanos Stouraitis, University of Patras 

9:30 

B1L-H.1 Efficient Data Transfer Techniques and VLSI Architecture for DWT-Block Coder 

Integration of JPEG2000 Encoder ........................................................................................................... 1365 

Amit Kumar Gupta, Canon Information Systems Research Australia; Saeid Nooshabadi, University of New 

South Wales; David Taubman, University of New South Wales 

9:48 

B1L-H.2 Hardware Architecture of a Parallel Pattern Matching Engine ........................................................... 1369 

Meeta Yadav, North Carolina State University; Ashwini Venkatachaliah, North Carolina State University; 

Paul D. Franzon, North Carolina State University 

10:06 

B1L-H.3 A Hardware Efficient Very Large Bit Word Binary to Double Base Number System 

Converter for Encryption Applications .................................................................................................... 1373 

Roberto Muscedere, University of Windsor 

10:24 

B1L-H.4 An Efficient Pipelined VLSI Architecture for Lifting-Based 2D-Discrete Wavelet Transform ........... 1377 

Rahul Jain, CoWare India Pvt. Ltd.; Preeti Ranjan Panda, IIT Delhi

10:42 

B1L-H.5 An Improved Frame-Level Pipelined Architecture for High Resolution Video Motion Estimation ... 1381 

Wei-feng He, Shanghai Jiao Tong University; Zhi-gang Mao, Shanghai Jiao Tong University 

B1L-J Low Power Circuits I (Lecture) 




Masud Chowdhury, University of Illinois at Chicago 

9:30 

B1L-J.1 Variable Threshold Voltage Design Scheme for CMOS Tapered Buffers ............................................ 1385 

Ahmed Shebaita, Northwestern University; Yehea Ismail, Northwestern University 

9:48 

B1L-J.2 Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions .................................... 1389 

Zhiyu Liu, University of Wisconsin-Madison; Volkan Kursun, University of Wisconsin-Madison 

10:06 

B1L-J.3 Power Grid Analysis of Dynamic Power Cutoff Technology .................................................................. 1393 

Baozhen Yu, Rutgers University; Michael L. Bushnell, Rutgers University 

10:24 

B1L-J.4 Multi-Vth Level Conversion Circuits for Multi-VDD Systems ................................................................ 1397 

Sherif A. Tawfik, University of Wisconsin-Madison; Volkan Kursun, University of Wisconsin-Madison 

10:42 

B1L-J.5 A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme ....... 1401 

Saihua Lin, Tsinghua University; Huazhong Yang, Tsinghua University; Rong Luo, Tsinghua University 

B1L-K Architectures for Communications (Lecture) 



Chair(s): Rui de Figueiredo, University of California, Irvine 

Zhongfeng Wang, Oregon State University 

9:30 

B1L-K.1 A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints ... 1405 

Rachit Agarwal, University College Cork, Tyndall National Institute; Emanuel M. Popovici, University College 

Cork; Brendan O’Flynn, Tyndall National Institute; Michael E. O’Sullivan, San Diego State University 

9:48 

B1L-K.2 Direct Root Computation Architecture for Algebraic Soft-Decision Decoding of 

Reed-Solomon Codes ................................................................................................................................ 1409 

Jun Ma, University of California, San Diego; Alexander Vardy, University of California, San Diego; 

Zhongfeng Wang, Oregon State University; Qinqin Chen, Oregon State University 

10:06 

B1L-K.3 Low-Complexity Interpolation Architecture for Soft-Decision Reed-Solomon Decoding .................. 1413 

Xinmiao Zhang, Case Western Reserve University; Jiangli Zhu, Case Western Reserve University 

10:24 

B1L-K.4 FFT Processor for OFDM Channel Estimation ........................................................................................ 1417 

S. Haene, ETH Zurich; A. Burg, ETH Zurich; P. Luethi, ETH Zurich; N. Felber, ETH Zurich; W. Fichtner, ETH Zurich

10:42 

B1L-K.5 VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition .......................... 1421 

P. Luethi, IIS/ETH-Zurich; A. Burg, IIS/ETH-Zurich; S. Haene, IIS/ETH-Zurich; D. Perels, IIS/ETH-Zurich; 

N. Felber, IIS/ETH-Zurich; W. Fichtner, IIS/ETH-Zurich 

B1L-L Applications of Nonlinear Dynamics to Communication & Signal Processing (Lecture) 



Chair(s): Gianluca Setti, University of Ferrara 

Ljiljana Trajkovic, Simon Fraser University 

9:30 

B1L-L.1 Algorithmic ADC Offset Compensation by Non-White Data Chopping ................................................ 1425 

Stefano Vitali, University of Bologna - ARCES; Giampaolo Cimatti, University of Bologna - ARCES; 

Riccardo Rovatti, University of Bologna - ARCES; Gianluca Setti, University of Ferrara - ENDIF 

9:48 

B1L-L.2 Stability Analysis of RED Gateway with Multiple TCP Reno Connections .......................................... 1429 

Xi Chen, Hong Kong Polytechnic University; Siu-Chung Wong, Hong Kong Polytechnic University; Chi K. Tse, 

Hong Kong Polytechnic University; Ljiljana Trajkovic, Simon Fraser University 

10:06 

B1L-L.3 Noncoherent Correlation-Based Communication Systems Choosing Different Chaotic Maps ....... 1433 

Shintaro Arai, Tokushima University; Yoshifumi Nishio, Tokushima University 

10:24 

B1L-L.4 Second-Level NIST Randomness Tests for Improving Test Reliability ................................................ 1437 

Fabio Pareschi, University of Ferrara - ENDIF, University of Bologna - ARCES; Riccardo Rovatti, University of 

Bologna - DEIS/ARCES; Gianluca Setti, University of Ferrara - ENDIF, University of Bologna - ARCES 

10:42 

B1L-L.5 Joint Design of a DS-UWB Modulator and Chaos-Based Spreading Sequences 

for Sensor Networks .................................................................................................................................. 1441 

Luca Antonio De Michele, University of Bologna - ARCES; Giampaolo Cimatti, University of Bologna - 

ARCES; Riccardo Rovatti, University of Bologna - ARCES/DEIS; Gianluca Setti, University of Bologna - 

ARCES, University of Ferrara - ENDIF 

B1L-M Wireless Circuits & Systems I (Lecture) 



Chair(s): Igor Filanovsky, University of Alberta 

Albert Wang, Illinois Institute of Technology 

9:30 

B1L-M.1 CMOS Integrated LC RF Bandpass Filter with Transformer-Coupled Q-Enhancement and 

Optimized Linearity .................................................................................................................................... 1445 

Wesley A. Gee, Georgia Institute of Technology; Phillip E. Allen, Georgia Institute of Technology 

9:48 

B1L-M.2 Techniques for Dual-Band LNA Design using Cascode Switching and Inductor Magnetic Coupling .. 1449 

Miguel A. Martins, Instituto Superior Tecnico/INESC-ID; Jorge R. Fernandes, Instituto Superior 

Tecnico/INESC-ID; Manuel M. Silva, Instituto Superior Tecnico/INESC-ID 

10:06 

B1L-M.3 A New CMOS 3.1-11.7 GHz Low Power LNA for Ultra-Wideband Wireless Applications .................. 1453 

Mahbub Reja, Scanimetrics, Inc.; C. Sellathamby, Scanimetrics, Inc.; Igor Filanovsky, University of Alberta

10:24 

B1L-M.4 A CMOS Variable Gain Front-End for a WCDMA Receiver .................................................................... 1457 

Shaikh K. Alam, Ohio State University; Joanne DeGroat, Ohio State University 

10:42 

B1L-M.5 Experimental Evaluation of Phase-Noise and Quadrature Error in a CMOS 

2.4 GHz Relaxation Oscillator .................................................................................................................. 1461 

Luis B. Oliveira, IST/INESC-ID; Jorge R. Fernandes, IST/INESC-ID; Manuel M. Silva, IST/INESC-ID; 

I.M. Filanovsky, University of Alberta; C.J.M. Verhoeven, Technical University of Delft 

B2L-A Nyquist DACs I (Lecture) 



Chair(s): Un-Ku Moon, Oregon State University 

Shanthi Pavan, IIT Madras 

11:20 

B2L-A.1 Parallel Current-Steering D/A Converters for Flexibility and Smartness ........................................... 1465 

G.I. Radulov, Eindhoven University of Technology; P.J. Quinn, Xilinx, Mixed-Signal Design Group; P. Harpe, 

Eindhoven University of Technology; H. Hegt, Eindhoven University of Technology; A. van Roermund, 

Eindhoven University of Technology 

11:38 

B2L-A.2 A 12-Bit Current-Steering DAC with Calibration by Combination Selection ...................................... 1469 

Kati Virtanen, University of Turku; Janne Maunu, University of Turku, Turku Centre for Computer Science; 

Jonne Poikonen, University of Turku, Turku Centre for Computer Science; Ari Paasio, University of Turku 

11:56 

B2L-A.3 Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters ... 1473 

Babak Nejati, University of California, San Diego; Larry Larson, University of California, San Diego 

12:14 

B2L-A.4 A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC’s ....................... 1477 

B. Catteau, Ghent University; P. Rombouts, Ghent University; L. Weyten, Ghent University 

12:32 

B2L-A.5 An 8-Bit 300MS/S Switched-Current Pipeline ADC in 0.18µm CMOS ............................................... 1481 

Behnam Sedighi, Sharif University of Technology; Mehrdad Sharif Bakhtiar, Sharif University of Technology 

B2L-B SPECIAL SESSION: Advances in Signal & Power Integrity Analysis (Lecture) 



Chair(s): Ram Achar, Carleton University 

11:20 

B2L-B.1 Multi-Level Order Reduction with Nonlinear Port Constraints ............................................................. 1485 

Min Ma, McGill University; Roni Khazaka, McGill University 

11:38 

B2L-B.2 Application of Relaxation-Based Technique to ADI-FDTD Method and Its Estimation ..................... 1489 

Yuya Nakazono, Shizuoka University; Hideki Asai, Shizuoka University 

11:56 

B2L-B.3 Analysis for Signal and Power Integrity using the Multilayered Finite Difference Method ............. 1493 

A. Ege Engin, Georgia Institute of Technology; Krishna Bharath, Georgia Institute of Technology; 

Madhavan Swaminathan, Georgia Institute of Technology

12:14 

B2L-B.4 Macromodeling for Nonlinear Distributed Interconnect Networks ..................................................... 1497 

Taha Amiralli, University of Western Ontario; Anestis Dounavis, University of Western Ontario 

12:32 

B2L-B.5 Low-Order Rational Approximation of Interconnects using Neural-Network based 

Pole-Clustering Techniques ...................................................................................................................... 1501 

Wendemagegnehu T. Beyene, Rambus Inc. 

B2L-C Network Aware Source & Channel Multimedia Coding (Lecture) 



Chair(s): Lap Pui Chau, National University of Singapore 

Enrico Magli, Politecnico di Torino 

11:20 

B2L-C.1 An Efficient Joint Source-Channel Coding for Wavelet based Scalable Video ................................... 1505 

Naeem Ramzan, Queen Mary University of London; Shuai Wan, Queen Mary University of London; 

Ebroul Izquierdo, Queen Mary University of London 

11:38 

B2L-C.2 Error-Resilience Transcoding of H.264/AVC Compressed Videos ....................................................... 1509 

Wen-Nung Lie, National Chung Cheng University; Han-Ching Yeh, National Chung Cheng University; 

Zhi-Wei Gao, National Chung Cheng University; Ping-Chang Jui, Chung Shan Institute of Science & Technology 

11:56 

B2L-C.3 UEP for Progressive Image Transmission with GA-Based Optimization ............................................. 1513 

Lei Yao, University of Mississippi; Lei Cao, University of Mississippi 

12:14 

B2L-C.4 Iterative Joint Source-Channel Decoding of H.264 Compressed Video .............................................. 1517 

David Levine, Concordia University; William E. Lynch, Concordia University; Tho Le-Ngoc, McGill University 

12:32 

B2L-C.5 XML-Driven Exploitation of Combined Scalability in Scalable H.264/AVC Bitstreams .................... 1521 

Davy De Schrijver, Ghent University; Wesley De Neve, Ghent University; Koen De Wolf, Ghent University; 

Peter Lambert, Ghent University; Davy Van Deursen, Ghent University; Rik Van de Walle, Ghent University 

B2L-D Bio-Inspired Neural Networks (Lecture) 



Chair(s): Ralph Etienne-Cummings, Johns Hopkins University 

H. K. Kwan, University of Windsor 

11:20 

B2L-D.1 Configuring of Spiking Central Pattern Generator Networks for Bipedal 

Walking using Genetic Algorthms ........................................................................................................... 1525 

Alex Russell, University of Cape Town; Garrick Orchard, University of Cape Town; Ralph Etienne-Cummings, 

Johns Hopkins University 

11:38 

B2L-D.2 Spike-Based Feature Extraction for Noise Robust Speech Recognition using 

Phase Synchrony Coding .......................................................................................................................... 1529 

Ismail Uysal, University of Florida, Gainesville; Harsha Sathyendra, University of Florida, Gainesville; 

John G. Harris, University of Florida, Gainesville

11:56 

B2L-D.3 Self-Organizing Map Considering False Neighboring Neuron .............................................................. 1533 

Haruna Matsushita, Tokushima University; Yoshifumi Nishio, Tokushima University 

12:14 

B2L-D.4 LVDS Serial AER Link Performance ......................................................................................................... 1537 

L. Miró-Amarante, Universidad de Sevilla; A. Jiménez-Fernández, Universidad de Sevilla; A. Linares-Barranco, 

University of Seville; F. Gómez-Rodríguez, Universidad de Sevilla; R. Paz, Universidad de Sevilla; G. Jiménez, 

Universidad de Sevilla; A. Civit, Universidad de Sevilla; R. Serrano-Gotarredona, Instituto de Microelectrónica 

de Sevilla 

12:32 

B2L-D.5 Synchronization and Bifurcations in Networks of Coupled Hindmarsh-Rose Neurons ..................... 1541 

Paolo Checco, Politecnico di Torino; Mario Biey, Politecnico di Torino; Marco Righero, Politecnico di Torino; 

Ljupco Kocarev, University of California, San Diego 

B2L-E Analog Circuits Modeling & Synthesis (Lecture) 



Chair(s): Yehia Massoud, Rice University 

Angel Rodriguez-Vasquez, IMSE-CNM 

11:20 

B2L-E.1 Electromagnetic Compatibility Modeling in Low-Noise Medical Sensor Interfaces ......................... 1545 

Olivier Valorge, École Polytechnique de Montréal; Benoit Gosselin, École Polytechnique de Montréal; 

Louis-François Tanguay, École Polytechnique de Montréal; Mohamad Sawan, École Polytechnique de Montréal 

11:38 

B2L-E.2 Impact of Control Signal Non-Idealties on Two-Phase Charge Pumps ............................................... 1549 

A. Fantini, University of Pavia; A. Cabrini, University of Pavia; G. Torelli, University of Pavia 

11:56 

B2L-E.3 Issues in the Design and Simulation of a MEMS VCO based Phase-Locked Loop ............................ 1553 

Maneesha Yellepeddi, Intel Corporation; Kartikeya Mayaram, Oregon State University 

12:14 

B2L-E.4 Above Threshold pFET Injection Modeling Intended for ProgrammingFloating-Gate Systems ....... 1557 

Paul Hasler, Georgia Institute of Technology; Arindam Basu, Georgia Institute of Technology; Scott Koziol, 

Georgia Institute of Technology 

12:32 

B2L-E.5 A Physical Interpretation of the Distance Term in Pelgrom’s Mismatch Model 

results in very Efficient CAD ..................................................................................................................... 1561 

B. Linares-Barranco, Instituto de Microelectrónica de Sevilla; T. Serrano-Gotarredona, Instituto de 

Microelectrónica de Sevilla 

B2L-F DSP Implementation & Embedded Systems I (Lecture) 



Chair(s): Behrouz Nowrouzian, University of Alberta 

Sergios Theodoridis, University of Athens 

11:20 

B2L-F.1 An Energy-Efficient Reconfigurable Viterbi Decoder on a Programmable Multiprocessor .............. 1565 

Guichang Zhong, University of California, Los Angeles; Alan N. Willson, Jr., University of California, Los Angeles

11:38 

B2L-F.2 A Memory-Based Hardware Accelerator for Real-Time MPEG-4 Audio Coding and Reverberation ... 1569 

Guo-An Jian, National Chung Cheng University; Chih-Da Chien, National Chung Cheng University; 

Jiun-In Guo, National Chung Cheng University 

11:56 

B2L-F.3 Address Code Optimization Exploiting Code Scheduling in DSP Applications .................................. 1573 

Zhenmin Li, Samsung Electronics; Taewhan Kim, Seoul National University 

12:14 

B2L-F.4 A Precompensation Algorithm for PWM-Based Digital Audio Amplifiers for Portable Applications .. 1577 

Xiaoxiang Gong, University of Florida; John G. Harris, University of Florida 

12:32 

B2L-F.5 Denoising for Generalized Sidelobe Canceller ....................................................................................... 1581 

C.Y. Ma, Hong Kong Polytechnic University; Tai-Chiu Hsung, Hong Kong Polytechnic University; 

Daniel Pak-Kong Lun, Hong Kong Polytechnic University; K.C. Ho, University of Missouri-Columbia; 

H.K. Kwan, University of Windsor 

B2L-G RFID-Based System Design & Applications (Lecture) 



Chair(s): Sergio Callegari, University of Bologna 

Hong-Yi Wu, University of Louisiana at Lafayette 

11:20 

B2L-G.1 Design and Implementation of a Low-Power Baseband-System for RFID Tag ................................... 1585 

Adam S.W. Man, Hong Kong University of Science and Technology; Edward S. Zhang, Hong Kong University 

of Science and Technology; H.T. Chan, Hong Kong University of Science and Technology; Vincent K.N. Lau, 

Hong Kong University of Science and Technology; C.Y. Tsui, Hong Kong University of Science and 

Technology; Howard C. Luong, Hong Kong University of Science and Technology 

11:38 

B2L-G.2 Enabling Pervasive Sensing with RFID: An Ultra Low-Power Digital Core for UHF Transponders ... 1589 

Andrea Ricci, University of Parma; Ilaria De Munari, University of Parma 

11:56 

B2L-G.3 A Novel Passive Tag with Asymmetric Wireless Link for RFID and WSN Applications ..................... 1593 

Majid Baghaei-Nejad, Royal Institute of Technology; Zhuo Zou, Royal Institute of Technology; 

Hannu Tenhunen, Royal Institute of Technology; Li-Rong Zheng, Royal Institute of Technology 

12:14 

B2L-G.4 Object Tracking based on RFID Coverage Visual Compensation in Wireless Sensor Network ....... 1597 

Jinseok Lee, Stony Brook University - SUNY; Kyoung-Su Park, Stony Brook University - SUNY; Sangjin Hong, 

Stony Brook University - SUNY; We-Duke Cho, Ajou University - SUNY 

12:32 

B2L-G.5 Low-Complexity Encryption using Redundant Bits and Adaptive Frequency Rates in RFID ............ 1601 

Meng-Lin Hsia, National Chung Cheng University; Oscal T.-C. Chen, National Chung Cheng University

B2L-H Video & Image Processing Circuits (Lecture) 




Thanos Stouraitis, University of Patras 

11:20 

B2L-H.1 An Efficient Pipelined Architecture for H.264/AVC Intra Frame Processing .................................... 1605 

Genhua Jin, LG Electronics Co., Ltd.; Jin-Su Jung, Seoul National University; Hyuk-Jae Lee, Seoul National University 

11:38 

B2L-H.2 Architecture and VLSI Implementation of a Programmable HD Real-Time Motion Estimator ........ 1609 

K. Gaedke, Thomson Corporate Research; M. Borsum, Thomson Corporate Research; M. Georgi, Thomson 

Corporate Research; A. Kluger, Thomson Corporate Research; J.-P. Le Glanic, Thomson Research & 

Development; P. Bernard, Thomson Research & Development 

11:56 

B2L-H.3 A High-Performance 2-D Inverse Transform Architecture for the H.264/AVC Decoder ................... 1613 

Woong Hwangbo, KAIST; Jaemoon Kim, KAIST; Chong-Min Kyung, KAIST 

12:14 

B2L-H.4 MoCHA: A Bi-Predictive Motion Compensation Hardware for H.264/AVC 

Decoder Targeting HDTV ........................................................................................................................... 1617 

Arnaldo Azevedo, Microelectronics Group (GME); Bruno Zatt, Microelectronics Group (GME); 

Luciano Agostini, Microelectronics Group (GME); Sergio Bampi, Microelectronics Group (GME) 

12:32 

B2L-H.5 A New Frame Recompression Algorithm Integrated with H.264 Video Compression ...................... 1621 

Yongje Lee, Samsung Electronics Co., Ltd.; Chae-Eun Rhee, Seoul National University; Hyuk-Jae Lee, Seoul 

National University 

B2L-J Low Power Circuits II (Lecture) 



Chair(s): Paul Ampadu, University of Rochester 


11:20 

B2L-J.1 A Low Power Domino with Differential-Controlled-Keeper ................................................................... 1625 

Peiyi Zhao, Chapman University; Jason McNeely, University of Louisiana at Lafayette; Golconda Pradeep, Intel 

Corp.; Magdy Bayoumi, University of Louisiana at Lafayette; Kuang Weidong, University of Texas, Pan American 

11:38 

B2L-J.2 Towards Automated Power Gating of Registers using CoDeL ............................................................. 1629 

Nainesh Agarwal, University of Victoria; Nikitas Dimopoulos, University of Victoria 

11:56 

B2L-J.3 Self-Supplied Integrable Active High-Efficiency AC-DC Converter for Piezoelectric Energy 

Scavenging Systems ................................................................................................................................. 1633 

E. Dallago, University of Pavia; G. Frattini, STMicroelectronics; D. Miatton, University of Pavia; G. Ricotti, 

STMicroelectronics; G. Venchi, University of Pavia 

12:14 

B2L-J.4 Low Power On-Chip Current Monitoring Medium-Grained Adaptive Voltage Control ....................... 1637 

Wei-Chih Hsieh, National Chiao-Tung University; Wei Hwang, National Chiao Tung University

12:32 

B2L-J.5 A New Statistical Approach for Glitch Estimation in Combinational Circuits .................................... 1641 

Ahmed Sayed, University of California, Davis; Hussain Al-Asaad, University of California, Davis 

B2L-K LDPC Architectures (Lecture) 



Chair(s): Zhongfeng Wang, Oregon State University 

Xinmiao Zhang, Case Western Reserve University 

11:20 

B2L-K.1 Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the 

IEEE 802.11n Wireless Standard ............................................................................................................ 1645 

Kiran Gunnam, Texas A&M University; Gwan Choi, Texas A&M University; Weihuang Wang, Texas A&M 

University; Mark Yeary, University of Oklahoma 

11:38 

B2L-K.2 A High Throughput H-QC LDPC Decoder ................................................................................................. 1649 

Yi-Hsing Chien, National Taiwan University; Mong-Kai Ku, National Taiwan University 

11:56 

B2L-K.3 FPGA Implementation of LDPC Decoders based on Joint Row-Column Decoding Algorithm .......... 1653 

Zhiyong He, Laval University; Sébastien Roy, Laval University; Paul Fortier, Laval University 

12:14 

B2L-K.4 Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes ........................................ 1657 

Emil Matúš, Techische Universität Dresden; Marcos B.S. Tavares, Techische Universität Dresden; 

Marcel Bimberg, Techische Universität Dresden; Gerhard P. Fettweis, Techische Universität Dresden 

12:32 

B2L-K.5 Design and Realization of Analog Phi-Function for LDPC Decoder ..................................................... 1661 

Abu Baker, University of Louisiana at Lafayette; Soumik Ghosh, University of Louisiana at Lafayette; 

Ashok Kumar, University of Louisiana at Lafayette; Magdy Bayoumi, University of Louisiana at Lafayette; 

Rafic Ayoubi, University of Balamand 

B2L-L Complex Network Analysis & Applications (Lecture) 



Chair(s): Guanrong Chen, City University of Hong Kong 

Wallace Tang, City University of Hong Kong 

11:20 

B2L-L.1 Classes of Stochastically Switched (Blinking) Systems ....................................................................... 1665 

Martin Hasler, Ecole Polytechnique Federale de Lausanne; Igor Belykh, Georgia State University; 

Vladimir Belykh, Volga State Academy 

11:38 

B2L-L.2 Synchronization in Complex Hybrid Networks ....................................................................................... 1669 

Paolo Checco, Politecnico di Torino; Mario Biey, Politecnico di Torino; Ljupco Kocarev, University of 

California, San Diego 

11:56 

B2L-L.3 Dynamics of a Logarithmic Transimpedance Amplifier ........................................................................ 1673 

Arindam Basu, Georgia Institute of Technology; Kofi Odame, Georgia Institute of Technology; Paul Hasler, 

Georgia Institute of Technology

12:14 

B2L-L.4 Equivalence of Two Discretization Schemes in a Simple Sliding Mode Control System .................. 1677 

Zbigniew Galias, AGH University of Science and Technology; Xinghuo Yu, Royal Melbourne Institute of Technology 

12:32 

B2L-L.5 Convergence Analysis of the Unscented Kalman Filter for Filtering Noisy Chaotic Signals ........... 1681 

Jiuchao Feng, South China University of Technology, South West University; Hongjuan Fan, South West 

University; Chi K. Tse, Hong Kong Polytechnic University 

B2L-M Wireless Circuits & Systems II (Lecture) 



Chair(s): Igor Filanovsky, University of Alberta 

Vadim Ivanov, Texas Instruments 

11:20 

B2L-M.1 A Design of DC Offset Canceller using Parallel Compensation ........................................................... 1685 

Seung-Min Oh, Samsung Electro-Mechanics Co.; Kyoung-Seok Park, Samsung Electro-Mechanics Co.; 

Hyun-Hwan Yoo, Samsung Electro-Mechanics Co.; Yoo-Sam Na, Samsung Electro-Mechanics Co.; 

Taek-Soo Kim, Samsung Electro-Mechanics Co. 

11:38 

B2L-M.2 A Second Order ΔΣ Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer .... 1689 

Jian-Hong Fang, Carleton University; Norm Filiol, Carleton University; Tom Riley, Kaben Research Inc.; 

Miles Copeland, Carleton University 

11:56 

B2L-M.3 A Power Optimized Base-Band Circuitry for the Low-IF Receivers ...................................................... 1693 

Ramin Zanbaghi, Sharif University of Technology, MicroElectronic Research and Development Center of Iran; 

S Mojtaba Atarodi, Sharif University of Technology, MicroElectronic Research and Development Center of 

Iran; Armin Tajalli, Sharif University of Technology 

12:14 

B2L-M.4 A 90nm Quadrature Generator with Frequency Extension up to 4GHz ............................................... 1697 

Bob Stengel, Motorola Labs; Said Rami, University of Florida 

12:32 

B2L-M.5 A New Quadrature LC-Oscillator .............................................................................................................. 1701 

Malihe Zarre Dooghabadi, Ferdowsi University of Mashhad; Sasan Naseh, Ferdowsi University of Mashhad 

B3L-A Nyquist ADCs I (Lecture) 



Chair(s): Anas Hamoui, McGill University 

Mohammed Ismail, Ohio State University 

14:30 

B3L-A.1 Bandwidth Mismatch Correction for a Two-Channel Time-Interleaved A/D Converter .................... 1705 

Patrick Satarzadeh, University of California, Davis; Bernard C. Levy, University of California, Davis; 

Paul J. Hurst, University of California, Davis 

14:48 

B3L-A.2 A 10-Bit 500-MS/s 124-mW Subranging Folding ADC in 0.13µm CMOS .......................................... 1709 

Cheng Chen, Lund University; Jiren Yuan, Lund University

15:06 

B3L-A.3 A 12-Bit Ratio-Independent Algorithmic ADC for a Capacitive Sensor Interface .............................. 1713 

Jere A.M. Järvinen, Helsinki University of Technology; Mikko Saukoski, Helsinki University of Technology; 

Kari Halonen, Helsinki University of Technology 

15:24 

B3L-A.4 An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage ........................ 1717 

Devrim Aksin, Texas Instruments Inc.; Mohammad A. Al-Shyoukh, Texas Instruments Inc.; Franco Maloberti, 

University of Pavia 

15:42 

B3L-A.5 A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch ...................................... 1721 

Lei Wang, ASIC and System State Key Laboratory of Fudan University; Junyan Ren, ASIC and System State Key 

Laboratory of Fudan University; Wenjing Yin, ASIC and System State Key Laboratory of Fudan University; 

Tingqian Chen, ASIC and System State Key Laboratory of Fudan University; Jun Xu, ASIC and System State 

Key Laboratory of Fudan University 

B3L-B SPECIAL SESSION: Circuits for Satellite Navigation Receivers (Lecture) 



Chair(s): Andrew Dempster, University of New South Wales 

Aleksandar Tasic, Delft University of Technology 

14:30 

B3L-B.1 Satellite Navigation: New Signals, New Challenges ............................................................................. 1725 

Andrew G. Dempster, University of New South Wales 

14:48 

B3L-B.2 Analysis and Compensation of RF Impairments for Next Generation Multimode GNSS Receivers ... 1729 

Ediz Cetin, University of Westminster; Izzet Kale, University of Westminster, and Eastern Mediterranean 

University; Richard C.S. Morling, University of Westminster 

15:06 

B3L-B.3 Efficient Software Defined Radio Implementations of GNSS Receivers ............................................ 1733 

Gianmarco Girau, Politecnico di Torino; Andrea Tomatis, Politecnico di Torino; Fabio Dovis, Politecnico di 

Torino; Paolo Mulassano, Istituto Superiore Mario Boella (ISMB) 

15:24 

B3L-B.4 Galileo L1 Civil Receiver Tracking Loops’ Architecture ........................................................................ 1737 

Olivier Julien, Ecole Nationale de l’Aviation Civile; Gérard Lachapelle, University of Calgary; 

M. Elizabeth Cannon, University of Calgary 

15:42 

B3L-B.5 Design of an Assisted GPS Receiver and its Performance Analysis ................................................... 1742 

Deok Won Lim, Chungnam National University; Sang Jeong Lee, Chungnam National University; 

Deuk Jae Cho, Maritime and Ocean Engineering Research Institute 

B3L-C Scalable Video Coding (Lecture) 



Chair(s): Tihao Chiang, National Chiao-Tung University 

C.-C. Jay Kuo, University of Southern California 

14:30 

B3L-C.1 Rate Control for Spatial/CGS Scalable Extension of H.264/AVC ....................................................... 1746 

Y. Liu, Nanyang Technological University; Z.G. Li, Institute for Infocomm Research; Y.C. Soh, Nanyang 

Technological University

14:48 

B3L-C.2 Multi-Stage MCTF Coding Efficiency Analysis with Directed-Tree Model .......................................... 1751 

Fengling Li, Santa Clara University; Nam Ling, Santa Clara University; Stephen A. Chiappari, Santa Clara University 

15:06 

B3L-C.3 3D Object-Based Scalable Wavelet Video Coding with Boundary Effect Suppression ..................... 1755 

Yu Liu, Chinese University of Hong Kong; Feng Wu, Microsoft Research Asia; King Ngi Ngan, Chinese 

University of Hong Kong 

15:24 

B3L-C.4 Balanced Inter-Layer Prediction for Combined Coarse Granular Scalability and Spatial Scalability .. 1759 

Wei Yao, Institute for Infocomm Research; Zhengguo Li, Institute for Inforcomm Research; Susanto Rahardja, 

Institute for Inforcomm Research 

15:42 

B3L-C.5 Macroblock-Based Adaptive In-Scale Prediction for Scalable Video Coding ..................................... 1763 

Ruiqin Xiong, Chinese Academy of Sciences; Jizheng Xu, Microsoft Research Asia; Feng Wu, Microsoft 

Research Asia; Shipeng Li, Microsoft Research Asia 

B3L-D Neural Systems & Applications (Lecture) 



Chair(s): Giacomo Indiveri, ETH Zurich 


14:30 

B3L-D.1 A Study of Delay-Dependent Stabilization for Discrete-Time Systems with Time Delays ................. 1767 

Shaosheng Zhou, Hangzhou Dianzi University; Wei Xing Zheng, University of Western Sydney 

14:48 

B3L-D.2 Noise-Robust Automatic Speech Recognition using a Discriminative Echo State Network ............ 1771 

Mark D. Skowronski, University of Florida; John G. Harris, University of Florida 

15:06 

B3L-D.3 Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control .................. 1775 

Dimitrios N. Loizos, Johns Hopkins University; Paul P. Sotiriadis, Johns Hopkins University; 

Gert Cauwenberghs, University of California, San Diego 

15:24 

B3L-D.4 Generalizations of Oja’s Learning Rule to Non-Symmetric Matrices .................................................. 1779 

Mohammed A. Hasan, University of Minnesota Duluth 

15:42 

B3L-D.5 Effective Search with Hopping Chaos for Hopfield Neural Networks Solving QAP ........................... 1783 

Yoshifumi Tada, Tokushima University; Yoko Uwate, Tokushima University; Yoshifumi Nishio, Tokushima University 

B3L-E Digital Circuit Modeling & Synthesis (Lecture) 



Chair(s): Mohab Anis, University of Waterloo 

Rajendran Panda, Freescale 

14:30 

B3L-E.1 A Structured ASIC Design Approach using Pass Transistor Logic ....................................................... 1787 

Kanupriya Gulati, Texas A&M University; Nikhil Jayakumar, Texas A&M University; 

Sunil P. Khatri, Texas A&M University

14:48 

B3L-E.2 Architecture Level Power-Performance Tradeoffs for Pipelined Designs ........................................... 1791 

Haider Ali, University of Southampton; Bashir M. Al-Hashimi, University of Southampton 

15:06 

B3L-E.3 A Fast Register Relocation Method for Circuit Size Reduction in 

Generalized-Synchronous Framework .................................................................................................... 1795 

Yukihide Kohira, Tokyo Institute of Technology; Atsushi Takahashi, Tokyo Institute of Technology 

15:24 

B3L-E.4 Asynchronous Staggered Set/Reset Techniques for Low-Noise Applications .................................. 1799 

Renato Rimolo-Donadio, Costa Rica Institute of Technology, Hamburg University of Technology; 

Antonio J. Acosta, University of Seville; Wolfgang Krautschneider, Hamburg University of Technology 

15:42 

B3L-E.5 Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-Tolerant 

Nanoscale Circuit Design ......................................................................................................................... 1803 

Huifei Rao, University of Alberta; Jie Chen, University of Alberta; Changhong Yu, University of Alberta; 

Woon Tiong Ang, University of Alberta; I-Chyn Wey, National Taiwan University; An-Yeu Wu, National 

Taiwan University; Hong Zhao, University of Alberta 

B3L-F Emerging Topics in DSP I (Lecture) 



Chair(s): U.B. Desai, ITT 

Paulo S. Diniz, Universidade Federal do Rio de Janeiro 

14:30 

B3L-F.1 DPA using Phase-Based Waveform Matching against Random-Delay Countermeasure ................. 1807 

Sei Nagashima, Tohoku University; Naofumi Homma, Tohoku University; Yuichi Imai, Tohoku University; 

Takafumi Aoki, Tohoku University; Akashi Satoh, IBM Research, Tokyo Research Laboratory 

14:48 

B3L-F.2 An Accurate Algorithm for Fast Frequency Warping ............................................................................. 1811 

Salvatore Caporale, University of Bologna; Luca De Marchi, University of Bologna; 

Nicolò Speciale, University of Bologna 

15:06 

B3L-F.3 Minimum Variance Spectral Estimation-Based Time Frequency Analysis for 

Nonstationary Time-Series ....................................................................................................................... 1815 

S.C. Chan, University of Hong Kong; Z.G. Zhang, University of Hong Kong; K.M. Tsui, University of Hong Kong 

15:24 

B3L-F.4 Improved SVD-Based Technique for Enhancing the Time-Frequency Representation of Signals ... 1819 

Hamid Hassanpour, University of Mazandaran 

15:42 

B3L-F.5 HRTF Interpolation through Direct Angular Parameterization ............................................................ 1823 

Fábio P. Freeland, Universidade Federal do Rio de Janeiro; Luiz W.P. Biscainho, Universidade Federal do Rio 

de Janeiro; Paulo S.R. Diniz, Universidade Federal do Rio de Janeiro

B3L-G SPECIAL SESSION: Novel Cryptographic Architectures for Low-Cost RFID (Lecture) 



Chair(s): Maire McLoone, Queen’s University Belfast, United Kingdom 

Matt J.B. Robshaw, France Telecom Research and Development 

14:30 

B3L-G.1 New Architectures for Low-Cost Public Key Cryptography on RFID Tags ........................................... 1827 

M. McLoone, Queen’s University; M.J.B. Robshaw, France Telecom Research and Development 

14:48 

B3L-G.2 Public-Key Cryptography on the Top of a Needle ................................................................................... 1831 

Lejla Batina, Katholieke Universiteit Leuven, ESAT/SCD-COSIC; Nele Mentens, Katholieke Universiteit 

Leuven, ESAT/SCD-COSIC; Kazuo Sakiyama, Katholieke Universiteit Leuven, ESAT/SCD-COSIC; Bart Preneel, 

Katholieke Universiteit Leuven, ESAT/SCD-COSIC; Ingrid Verbauwhede, Katholieke Universiteit Leuven, 

ESAT/SCD-COSIC 

15:06 

B3L-G.3 ECC Processor with Low Die Size for RFID Applications ...................................................................... 1835 

Franz Fürbass, Graz University of Technology; Johannes Wolkerstorfer, Graz University of Technology 

15:24 

B3L-G.4 Strong Crypto for RFID Tags – A Comparison of Low-Power Hardware Implementations ............... 1839 

Martin Feldhofer, Graz University of Technology; Johannes Wolkerstorfer, Graz University of Technology 

15:42 

B3L-G.5 New Light-Weight Crypto Algorithms for RFID ....................................................................................... 1843 

Axel Poschmann, Ruhr-University Bochum; Gregor Leander, Ruhr-University Bochum; 

Kai Schramm, Ruhr-University Bochum; Christof Paar, Ruhr-University Bochum 

B3L-H Cryptography & Coding Circuits (Lecture) 



Chair(s): Cem Göknar, Dogus University 

Fathi Salem, Michigan State University 

14:30 

B3L-H.1 Spa against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier ....... 1847 

Atsushi Miyamoto, Tohoku University; Naofumi Homma, Tohoku University; Takafumi Aoki, Tohoku 

University; Akashi Satoh, IBM Research, Tokyo Research Laboratory 

14:48 

B3L-H.2 A New Compact Architecture for AES with Optimized ShiftRows Operation ..................................... 1851 

Hua Li, University of Lethbridge; Jianzhou Li, University of Lethbridge 

15:06 

B3L-H.3 Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic Low-Density Parity-Check Codes .... 1855 

Daesun Oh, University of Minnesota; Keshab K. Parhi, University of Minnesota 

15:24 

B3L-H.4 A High-Performance ASIC Implementation of the 64-bit Block Cipher CAST-128 ............................ 1859 

Takeshi Sugawara, Tohoku University; Naofumi Homma, Tohoku University; Takafumi Aoki, Tohoku 

University; Akashi Satoh, AIST 

15:42 

B3L-H.5 High-Speed Parallel Hardware Architecture for Galois Counter Mode ............................................... 1863 

Akashi Satoh, AIST

B3L-J Low Power & Low Voltage Circuits (Lecture) 




Mircea Stan, University of Virginia 

14:30 

B3L-J.1 Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM ..................... 1867 

A. Kumar, University of California, Berkeley; H. Qin, University of California, Berkeley; P. Ishwar, Boston 

University; J. Rabaey, University of California, Berkeley; K. Ramchandran, University of California, Berkeley 

14:48 

B3L-J.2 Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode 

Logic Circuits Operating with Reduced Supply Voltage ....................................................................... 1871 

Stéphane Badel, Ecole Polytechnique Fédérale de Lausanne; Yusuf Leblebici, Ecole 

Polytechnique Fédérale de Lausanne 

15:06 

B3L-J.3 Integrated Heterogenous Modelling for Power Estimation of Single Processor based 

Reconfigurable SoC Platform .................................................................................................................. 1875 

Prakash Srinivasan, University of Edinburgh; Ali Ahmadinia, University of Edinburgh; Ahmet T. Erdogan, 

University of Edinburgh, Institute of System Level Integration; Tughrul Arslan, University of Edinburgh 

15:24 

B3L-J.4 Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM ................................ 1879 

Riaz Naseer, University of Southern California, Marina del Rey; Younes Boulghassoul, University of Southern 

California, Marina del Rey; Jeff Draper, University of Southern California, Marina del Rey; 

Sandeepan DasGupta, Vanderbilt University; Art Witulski, Vanderbilt University 

15:42 

B3L-J.5 Battery-Aware Variable Voltage Scheduling on Real-Time Multiprocessor Platforms ..................... 1883 

Yufeng Xie, Tsinghua University; Leibo Liu, Tsinghua University; Rui Dai, Tsinghua University; Shaojun Wei, 

Tsinghua University 

B3L-K Communications Circuits & Systems (Lecture) 




Lap Pui Chau, National University of Singapore 

14:30 

B3L-K.1 A Microwave OTA using a Feedforward-Regulated Cascode Topology ............................................... 1887 

You Zheng, Queen’s University; Carlos E. Saavedra, Queen’s University 

14:48 

B3L-K.2 GVD and PMD Compensation using a Linear Adjustable Filter Prototype in a 

40Gb/s OSSB System ............................................................................................................................... 1891 

Miguel A.M. Madureira, Siemens Networks, S.A., Instituto Superior Técnico; Daniel Fonseca, Siemens Networks 

S.A, Instituto Superior Técnico; Adolfo V.T. Cartaxo, Instituto Superior Técnico; Paulo M.P. Monteiro, Siemens 

Networks S.A , Universidade de Aveiro; Rui L. Aguiar, Universidade de Aveiro 

15:06 

B3L-K.3 A 4.1 GHz Dual Modulus Prescaler using the E-TSPC Technique and Double 

Data Throughput Structures ..................................................................................................................... 1895 

Fernando P.H. de Miranda, Universidade de São Paulo; João Navarro, Universidade de São Paulo; 

Wilhelmus Van Noije, Universidade de São Paulo

15:24 

B3L-K.4 On the Persistency of Excitation for Blind Channel Estimation in Cyclic Prefix Systems ................ 1899 

Borching Su, California Institute of Technology; P.P. Vaidyanathan, California Institute of Technology 

15:42 

B3L-K.5 Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems .......... 1903 

David Perels, ETH Zurich; Christoph Studer, ETH Zurich; W. Fichtner, ETH Zurich 

B3L-L References (Lecture) 



Chair(s): Pavan Hanumolu, Oregon State University 

Jitkasame Ngarmnil, Mahanakorn University of Technology 

14:30 

B3L-L.1 Low Voltage CMOS Current and Voltage References without Resistors ............................................ 1907 

Christian Falconi, Università di Roma “Tor Vergata”; Arnaldo D’Amico, Università di Roma “Tor Vergata”; 

Giuseppe Scotti, Universita’ di Roma “La Sapienza”; Alessandro Trifieltti, Universita’ di Roma “La Sapienza” 

14:48 

B3L-L.2 A 4-Bits Trimmed CMOS Bandgap Reference with an Improved Matching Modeling Design ......... 1911 

Juan Pablo Martinez Brito, Federal University of Rio Grande do Sul; Hamilton Klimach, Federal University of 

Rio Grande do Sul; Sergio Bampi, Federal University of Rio Grande do Sul 

15:06 

B3L-L.3 A Capacitor-Free CMOS Low-Dropout Regulator ................................................................................... 1915 

Mikko Loikkanen, University of Oulu; Juha Kostamovaara, University of Oulu 

15:24 

B3L-L.4 A gm-C Ramp Generator for Voltage Feedforward Control of DC-DC Switching Regulators ........... 1919 

Jader A. De Lima, Freescale Semiconductor; Wallace A. Pimenta, Freescale Semiconductor 

15:42 

B3L-L.5 An Improved Temperature Compensation Technique for Current Biasing ......................................... 1923 

A. Arbat, Universitat de Barcelona; A. Dieguez, Universitat de Barcelona; J. Samitier, Universitat de Barcelona 

B3L-M CAD & Tools for Analog Design (Lecture) 



Chair(s): Ethan Farquhar, University of Tennessee 

Shahriar Mirabbasi, University of British Columbia 

14:30 

B3L-M.1 A Numerical Design Approach for Single Amplifier, Active-RC Butterworth Filter of Order 5 ......... 1927 

H. Gaunholt, Technical University of Denmark 

14:48 

B3L-M.2 Volterra Analysis using Chebyshev Series .............................................................................................. 1931 

Ioannis Sarkas, University of Patras; Dimitrios Mavridis, University of Patras; Michail Papamichail, University 

of Patras; George Papadopoulos, University of Patras 

15:06 

B3L-M.3 Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs ............ 1935 

William H. Kao, Cadence Design Systems; Xiaopeng Dong, Cadence Design Systems

15:24 

B3L-M.4 Design Centering High Frequency Integrated Continuous-Time Filters ............................................. 1939 

Tonse Laxminidhi, Indian Institute of Technology, Madras; Shanthi Pavan, Indian Institute of Technology, Madras 

15:42 

B3L-M.5 On the Linearization of MOSFET Capacitors .......................................................................................... 1943 

Mohammad Danaie, Ferdowsi University of Mashhad; Hamed Aminzadeh, Ferdowsi University of Mashhad; 

Sasan Naseh, Ferdowsi University of Mashhad 

B4L-A Nyquist ADCs II (Lecture) 




Pavan Hanumolu, Oregon State University 

16:20 

B4L-A.1 A Highly-Linear Successive-Approximation Front-End Digitizer with Built-In Sample-and-Hold 

Function for Pipeline/Two-Step ADC ...................................................................................................... 1947 

Weng-Ieng Mok, University of Macau; Pui-In Mak, University of Macau; Seng-Pan U, University of Macau; 

R.P. Martins, University of Macau 

16:38 

B4L-A.2 Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for 

Time-Interleaved ADCs .............................................................................................................................. 1951 

Pieter Harpe, Eindhoven University of Technology; Athon Zanikopoulos, Eindhoven University of Technology; 

Hans Hegt, Eindhoven University of Technology; Arthur van Roermund, Eindhoven University of Technology 

16:56 

B4L-A.3 A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter ................................................... 1955 

Chi-Chang Lu, National Formosa University; Jyun-Yi Wu, National Yunlin University of Science and 

Technology; Tsung-Sum Lee, National Yunlin University of Science and Technology 

17:14 

B4L-A.4 Theory and Implementation of an Analog-to-Information Converter using Random Demodulation .. 1959 

Jason N. Laksa, Rice University; Sami Kirolos, Rice University; Marco F. Duarte, Rice University; 

Tamer S. Ragheb, Rice University; Richard G. Baraniuk, Rice University; Yehia Massoud, Rice University 

17:32 

B4L-A.5 An 8-Bit Switched-Resistor Pipeline ADC ............................................................................................... 1963 

Behnam Sedighi, Sharif University of Technology; Mehrdad Sharif Bakhtiar, Sharif University of Technology 

B4L-B SPECIAL SESSION: Silicon-Enabled Millimeter-Wave Circuits & Systems (Lecture) 



Chair(s): Kenneth O, University of Florida, Gainesville 

Alberto Valdes-Garcia, IBM T.J. Watson Research Center 

16:20 

B4L-B.1 SiGe 77GHz Automotive Radar Technology ........................................................................................... 1967 

W.M. Huang, Freescale Semiconductor Inc.; J.P. John, Freescale Semiconductor Inc.; S. Braithwaite, Freescale 

Semiconductor Inc.; J. Kirchgessner, Freescale Semiconductor Inc.; I.S. Lim, Freescale Semiconductor Inc.; 

D. Morgan, Freescale Semiconductor Inc.; Y.B. Park, Freescale Semiconductor Inc.; S. Shams, Freescale 

Semiconductor Inc.; I. To, Freescale Semiconductor Inc.; P. Welch, Freescale Semiconductor Inc.; R. Reuter, 

Freescale Halbleiter Deutschland GmbH; H. Li, Freescale Halbleiter Deutschland GmbH; A. Ghazinour, 

Freescale Halbleiter Deutschland GmbH; P. Wennekers, Freescale Halbleiter Deutschland GmbH; Y. Yin, 

Freescale Halbleiter Deutschland GmbH

16:38 

B4L-B.2 CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and 

IC Design Examples ................................................................................................................................... 1971 

S.P. Voinigescu, University of Toronto; S.T. Nicolson, University of Toronto; M. Khanpour, University of 

Toronto; K.K.W. Tang, University of Toronto; K.H.K Yau, University of Toronto; N. Seyedfathi, University of 

Toronto; A. Timonov, University of Toronto; A. Nachman, University of Toronto; G. Eleftheriades, University 

of Toronto; P. Schvan, NORTEL; M.T. Yang, TSMC 

16:56 

B4L-B.3 SiGe IC-Based mm-Wave Imager ............................................................................................................. 1975 

Helen Kim, MIT Lincoln Laboratory; Sean Duffy, MIT Lincoln Laboratory; Jeff Herd, MIT Lincoln Laboratory; 

Charles Sodini, MIT 

17:14 

B4L-B.4 60 GHz SiGe-BiCMOS Radio for OFDM Transmission ........................................................................... 1979 

Eckhard Grass, IHP GmbH; Frank Herzel, IHP GmbH; Maxim Piz, IHP GmbH; Klaus Schmalz, IHP GmbH; 

Yaoming Sun, IHP GmbH; Srdjan Glisic, IHP GmbH; Milos Krstic, IHP GmbH; Klaus Tittelbach, IHP GmbH; 

Marcus Ehrig, IHP GmbH; Wolfgang Winkler, IHP GmbH; Christoph Scheytt, IHP GmbH; Rolf Kraemer, IHP GmbH 

17:32 

B4L-B.5 CMOS Transceivers at 60 GHz and Beyond ............................................................................................ 1983 

Behzad Razavi, University of California, Los Angeles 

B4L-C Video Transcoding & Quality (Lecture) 



Chair(s): Liang Gee Chen, National Taiwan University 

Huifang Sun, Mitsubishi Electric Research Laboratories 

16:20 

B4L-C.1 An Irregular Search Window Reuse Scheme for Motion Estimation in 

MPEG-2 to H.264 Transcoding ................................................................................................................. 1987 

Xianghui Wei, Waseda University; Shen Li, Waseda University; Yang Song, Waseda University; Satoshi Goto, 

Waseda University 

16:38 

B4L-C.2 Motion Mapping for MPEG-2 to H.264/AVC Transcoding .................................................................... 1991 

Jun Xin, Mitsubishi Electric Research Laboratories; Jianjun Li, Mitsubishi Electric Research Laboratories; 

Anthony Vetro, Mitsubishi Electric Research Laboratories; Shun-Ichi Sekiguchi, Mitsubishi Electric Research 

Laboratories; Huifang Sun, Mitsubishi Electric Research Laboratories 

16:56 

B4L-C.3 Coding Mode Analysis of MPEG-2 to H.264/AVC Transcoding for Digital TV Applications ............. 1995 

Yi-Nung Liu, National Taiwan University; Chi-Sun Tang, National Taiwan University; Shao-Yi Chien, National 

Taiwan University 

17:14 

B4L-C.4 Complexity Reduction of H.263 to H.264 Transcoder with Fast Mode Decision .............................. 1999 

Tsung-Han Tsai, National Central University; Hsueh-Yi Lin, National Central University; Yu-Xuan Lee, 

National Central University; Pin-Hua Chen, National Central University 

17:32 

B4L-C.5 Quality Enhancement in H.264 Transform Domain Downsizing .......................................................... 2003 

Haiyan Shu, Chinese University of Hong Kong; King Ngi Ngan, Chinese University of Hong Kong

B4L-D Life Science Systems & Applications (Lecture) 



Chair(s): Jie Chen, University of Alberta, Canada 

Julia Chung, National Cheng Kung University 

16:20 

B4L-D.1 Low-Noise CMOS Fluorescence Sensor .................................................................................................. 2007 

David Sander, University of Maryland, College Park; Marc Dandin, University of Maryland, College Park; 

Honghao Ji, University of Maryland, College Park; Nicole Nelson, University of Maryland, College Park; 

Pamela Abshire, University of Maryland, College Park 

16:38 

B4L-D.2 Design, Analysis and Implementation of Integrated Micro-Thermal Control Systems ..................... 2011 

Jennifer Blain Christen, Johns Hopkins University; Andreas G. Andreou, Johns Hopkins University 

16:56 

B4L-D.3 Biosensor Integrated with Transducer to Detect the Glucose ............................................................. 2015 

Jian-Yun Lai, National United University; Yan-Ting Chen, National United University; Te-Heng Wang, National 

United University; Hong-Si Chang, National United University; Jui-Lin Lai, National United University 

17:14 

B4L-D.4 Classification of Driver’s Cognitive Responses using Nonparametric Single-Trial EEG Analysis .... 2019 

Chin-Teng Lin, National Chiao-Tung University; Li-Wei Ko, National Chiao-Tung University; Ken-Li Lin, 

Chung-Hua University; Bor-Chen Kuo, National Taichung University; Sheng-Fu Liang, National Cheng-Kung 

University; I-Fang Chung, National Yang-Ming University; Lan-Da Van, National Chiao-Tung University 

17:32 

B4L-D.5 A Multi-Microchip Retinal Stimulator for in vitro / in vivo Experiments ............................................ 2024 

Jun Ohta, Nara Institute of Science and Technology; Takashi Tokuda, Nara Institute of Science and Technology; 

Keiichiro Kagawa, Nara Institute of Science and Technology; Akihiro Uehara, Nidek Co. Ltd.; Yasuo Terasawa, 

Nidek Co. Ltd.; Kazuaki Nakauchi, Osaka University Graduate School of Medicine; Takashi Fujikado, Osaka 

University Graduate School of Medicine; Yasuo Tano, Osaka University Graduate School of Medicine 

B4L-E Placement & Routing (Lecture) 



Chair(s): Sunil Khatri, Texas A&M University 

David Pan, University of Texas at Austin 

16:20 

B4L-E.1 Noise-Aware Floorplanning for Fast Power Supply Network Design ................................................... 2028 

Chang-Tzu Lin, SoC Technology Center, ITRI; Tai-Wei Kung, Feng-Chia University; De-Sheng Chen, 

Feng-Chia University; Yi-Wen Wang, Feng-Chia University; Ching-Hwa Cheng, Feng-Chia University 

16:38 

B4L-E.2 Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design ...... 2032 

Karthik Krishnamoorthy, Freescale Semiconductor Inc.; Sarat C. Maruvada, Microsoft, Inc.; Florin Balasa, 

University of Illinois at Chicago 

16:56 

B4L-E.3 A 3D-via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length ...................... 2036 

Renato Hentschke, Universidade Federal do Rio Grande do Sul; Ricardo Reis, Universidade Federal do Rio 

Grande do Sul

17:14 

B4L-E.4 Clock-Tree Aware Placement based on Dynamic Clock-Tree Building ............................................... 2040 

Yanfeng Wang, Tsinghua University; Qiang Zhou, Tsinghua University; Xianlong Hong, Tsinghua University; 

Yici Cai, Tsinghua University 

17:32 

B4L-E.5 A Fast 3D-BSG Algorithm for 3D Packing Problem ............................................................................... 2044 

Lingyi Zhang, Tsinghua University; Sheqin Dong, Tsinghua University; Xianlong Hong, Tsinghua University; 

Yuchun Ma, Tsinghua University 

B4L-F FIR Digital Filters (Lecture) 



Chair(s): Wu-Sheng Lu, University of Victoria 

Chien-Cheng Tseng, National Kaohsiung First University of Science & Technology 

16:20 

B4L-F.1 Design of FIR Filters with Discrete Coefficients via Polynomial Programming: 

Towards the Global Solution .................................................................................................................... 2048 

Wu-Sheng Lu, University of Victoria; Takao Hinamoto, Hiroshima University 

16:38 

B4L-F.2 Synthesis of Wideband Linear-Phase FIR Filters with Piecewise-Polynomial-Sinusoidal 

Impulse Response ..................................................................................................................................... 2052 

Raija Lehto, Tampere University of Technology; Tapio Saramäki, Tampere University of Technology; 

Olli Vainio, Tampere University of Technology 

16:56 

B4L-F.3 The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers ....... 2056 

Chia-Yu Yao, National Taiwan University of Science and Technology; Alan N. Willson, Jr., University of 

California, Los Angeles 

17:14 

B4L-F.4 Analytical Design of an Equiripple DC-Notch FIR Filter ........................................................................ 2060 

Pavel Zahradnik, Czech Technical University in Prague; Miroslav Vlček, Czech Technical University in Prague; 

Boris Šimák, Czech Technical University in Prague 

17:32 

B4L-F.5 A Sequential Constrained Least-Square Method for Minimax Design of Linear-Phase FIR 

Filters with Time-Domain Constraints ..................................................................................................... 2064 

Xiaoping Lai, Shandong University at Weihai 

B4L-G SPECIAL SESSION: Neuroengineering Circuits & Microsystems (Lecture) 



Chair(s): Maysam Ghovanloo, North Carolina State University 

Pedram Mohseni, Case Western Reserve University 

16:20 

B4L-G.1 Low-Power Circuits for Brain-Machine Interfaces ................................................................................. 2068 

Rahul Sarpeshkar, Massachusetts Institute of Technology; Woradorn Wattanapanitch, Massachusetts Institute of 

Technology; Benjamin I. Rapoport, Massachusetts Institute of Technology; Scott K. Arfin, Massachusetts 

Institute of Technology; Michael W. Baker, Massachusetts Institute of Technology; Soumyajit Mandal, 

Massachusetts Institute of Technology; Michale S. Fee, Massachusetts Institute of Technology; Sam Musallam, 

California Institute of Technology; Richard A. Andersen, California Institute of Technology

16:38 

B4L-G.2 Miniature Implantable System Dedicated to Bi-Channel Selective Neurostimulation ..................... 2072 

F. Mounaim, École Polytechnique de Montréal; M. Sawan, École Polytechnique de Montréal 

16:56 

B4L-G.3 A Fully Integrated Fail-Safe Stimulator Output Stage Dedicated to FES Stimulation ...................... 2076 

Xiao Liu, University College London; Andreas Demosthenous, University College London; Nick Donaldson, 

University College London 

17:14 

B4L-G.4 Designing Efficient Inductive Power Links for Implantable Devices .................................................. 2080 

Reid R. Harrison, University of Utah 

17:32 

B4L-G.5 Florida Wireless Implantable Recording Electrodes (FWIRE) for Brain Machine Interfaces ........... 2084 

Rizwan Bashirullah, University of Florida; John G. Harris, University of Florida; Justin C. Sanchez, University 

of Florida; Toshikazu Nishida, University of Florida; Jose C. Principe, University of Florida 

B4L-H Communication Circuits (Lecture) 




Khurram Waheed, Texas Instruments 

16:20 

B4L-H.1 CSI-Aided Demapping of Dual-Carrier Modulation for Multiband-OFDM ............................................ 2088 

Sungchung Park, Samsung Advanced Institute of Technology; Yun-Young Kim, Samsung Advanced Institute of 

Technology; Jae-Ho Noh, Samsung Advanced Institute of Technology; Jun-Jin Kong, Samsung Advanced 

Institute of Technology 

16:38 

B4L-H.2 Blind Mode/GI Detection and Coarse Symbol Synchronization for DVB-T/H .................................... 2092 

Wei-Chang Liu, National Chiao Tung University; Ting Chen Wei, National Chiao Tung University; 

Shyh-Jye Jou, National Chiao Tung University 

16:56 

B4L-H.3 Parallel Architecture of List Sphere Decoders ....................................................................................... 2096 

Yuping Zhang, University of Minnesota; Keshab K. Parhi, University of Minnesota 

17:14 

B4L-H.4 FPGA Implementation of an Interpolation Processor for Soft-Decision Decoding of 

Reed-Solomon Codes ................................................................................................................................ 2100 

Qinqin Chen, Oregon State University; Zhongfeng Wang, Oregon State University; Jun Ma, University of 

California, San Diego 

17:32 

B4L-H.5 VLSI Decoder Architecture for High Throughput, Variable Block-Size and Multi-Rate LDPC Codes .. 2104 

Yang Sun, Rice University; Marjan Karkooki, Rice University; Joseph R. Cavallaro, Rice University

B4L-J Low Power Logic & Architectures I (Lecture) 




Masud Chowdhury, University of Illinois at Chicago 

16:20 

B4L-J.1 Reducing Energy of DRAM/Flash Memory System by OS-Controlled Data Refresh ......................... 2108 

Vasily G. Moshnyaga, Fukuoka University; Hoa Vo, University of California, Los Angeles; Glenn Reinman, 

University of California, Los Angeles; Miodrag Potkonjak, University of California, Los Angeles 

16:38 

B4L-J.2 A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply 

Voltage for Dynamic Voltage and Frequency Scaling ........................................................................... 2112 

Jeabin Lee, KAIST; Byeong-Gyu Nam, KAIST; Seong-Jun Song, KAIST; Namjun Cho, KAIST; Hoi-Jun Yoo, KAIST 

16:56 

B4L-J.3 Profile-Based Low Power Scheduling for Conditional Task Graph: 

A Communication Aware Approach ......................................................................................................... 2116 

Parth Malani, Binghamton University; Prakash Mukre, Binghamton University; Qinru Qiu, Binghamton 

University 

17:14 

B4L-J.4 Adaptive Clock Gating Technique for Low Power IP Core in SoC Design ........................................... 2120 

Xiaotao Chang, Chinese Academy of Sciences; Mingming Zhang, Chinese Academy of Sciences; Ge Zhang, Chinese 

Academy of Sciences; Zhimin Zhang, Chinese Academy of Sciences; Jun Wang, Chinese Academy of Sciences 

17:32 

B4L-J.5 Quasi-Static Energy Recovery Logic with Single Power-Clock Supply ................................................ 2124 

Shun Li, Fudan University; Feng Zhou, Fudan University; Chunhong Chen, University of Windsor; Hua Chen, 

Fudan University; Yipin Wu, Fudan University 

B4L-K Communications Circuits I (Lecture) 



Chair(s): Deuk Heo, Washington State University 

Jingyu Hu, Broadcom Corp. 

16:20 

B4L-K.1 A Two-Port GFSK Direct Modulator for Wideband Applications at 5.8 GHz ....................................... 2128 

Shayan Farahvash, Sirenza Microdevices; Chee Quek, Sirenza Microdevices; William Roberts, Sirenza 

Microdevices; David Walker, Sirenza Microdevices; Mohamed Mostafa, Sirenza Microdevices; Hauw Liem, 

Sirenza Microdevices; Robert Koupal, Sirenza Microdevices 

16:38 

B4L-K.2 Integrated Linear AC-Coupling Circuit for DC-Balanced and Non-Balanced Traffics ........................ 2132 

Yikui Dong, LSI Logic Corp.; Cathy Liu, LSI Logic Corp.; Freeman Zhong, LSI Logic Corp. 

16:56 

B4L-K.3 A 3.7mW, 1.6V CMOS Analog Adaptive Equalizer for a 125Mbps Wire-Line Transceiver ................ 2136 

Ayman Fayed, Texas Instruments Inc.; Mohammed Ismail, Ohio State University 

17:14 

B4L-K.4 Quadrature VCOs based on Coupled PLLs .............................................................................................. 2140 

Andrea Bevilacqua, Università di Padova; Christoph Sandner, Infineon Technologies Austria AG; 

Andrea Gerosa, Università di Padova; Andrea Neviani, Università di Padova

17:32 

B4L-K.5 Modified Reduced Constellation PLL for Higher Order QAM ............................................................... 2144 

Chanwoo Park, Samsung Electronics; Jinbeom Lee, Sogang University; Younglok Kim, Sogang University 

B4L-L Signal Sources (Lecture) 




Yichaung Sun, University of Hertfordshire 

16:20 

B4L-L.1 86 dB DR Cross-Coupled Time-Interleaved ΣΔ ADC for Audio Signal Band with 

322 ΣA Current Consumption .................................................................................................................. 2148 

Franco Maloberti, University of Pavia; Yonyoung Choi, Skyworks Solutions Inc. 

16:38 

B4L-L.2 Low-Voltage Low-Power CMOS Oscillator with Low Temperature and Process Sensitivity ............. 2152 

Giuseppe De Vita, Università di Pisa; Francesco Marraccini, Università di Pisa; Giuseppe Iannaccone, 

Università di Pisa 

16:56 

B4L-L.3 A Fully Integrated Spread Spectrum Clock Generator using Two-Point Delta-Sigma Modulation .. 2156 

Yi-Bin Hsieh, National Chiao-Tung University; Yao-Huang Kao, Chung-Hua University 

17:14 

B4L-L.4 A New Cycle-Time-to-Digital Converter with Two Level Conversion Scheme ..................................... 2160 

Hong-Yi Huang, National Taipei University; Sheng-Da Wu, Fu-Jen Catholic University; Yi-Jui Tsai, Fu-Jen 

Catholic University 

17:32 

B4L-L.5 A Sub-1V Low Power Temperature Compensated Current Reference ................................................ 2164 

Alfredo Olmos, Brazil Semiconductor Technology Center; Andre Vilas Boas, Brazil Semiconductor Technology 

Center; Jefferson Soldera, Freescale Semiconductor 

B4L-M Mixed Signal Circuits & Test I (Lecture) 



Chair(s): David Graham, West Virginia University 

Byunghoo Jung, Purdue University 

16:20 

B4L-M.1 VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter ................ 2168 

Erhan Özalevli, Georgia Institute of Technology; Walter Huang, Georgia Institute of Technology; Paul Hasler, 

Georgia Institute of Technology; David V. Anderson, Georgia Institute of Technology 

16:38 

B4L-M.2 Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity .......................................... 2172 

D. DiClemente, Ryerson University; F. Yuan, Ryerson University 

16:56 

B4L-M.3 On-Chip Substrate Noise Suppression using Clock Randomization Methodology ............................ 2176 

Yuxin Wang, University of Rochester; Zeljko Ignjatovic, University of Rochester 

17:14 

B4L-M.4 Noise Figure Measurement using Mixed-Signal BIST ........................................................................... 2180 

Jie Qin, Auburn University; Charles Stroud, Auburn University; Foster Dai, Auburn University

17:32 

B4L-M.5 Congruence Synchronous Mirror Delay .................................................................................................. 2184 

Tsung-Chu Huang, National Changhua University of Education; Gau-Bin Chang, National Changhua University 

of Education; Ling Li, National Changhua University of Education 

B5P-N Amplifiers IV (Poster) 



Chair(s): Joseph S. Chang, Nanyang Technological University 

B5P-N.1 Dual Active-Capacitive-Feedback Compensation for Area-Efficient Three-Stage Amplifiers .......... 2188 

Song Guo, University of Texas at Dallas; Hoi Lee, University of Texas at Dallas 

B5P-N.2 A 4-Channel 12.5Gb/s Common-Gate Transimpedance Amplifier Array for 

DVI/HDMI Applications ............................................................................................................................. 2192 

K. Park, Yonsei University; W.S. Oh, Yonsei University; B.-Y. Choi, Ehwa Womans University; J.-W. Han, 

Ehwa Womans University; S.M. Park, Ehwa Womans University 

B5P-N.3 High-Accuracy, High-Precision DEM-CCII Amplifiers ............................................................................. 2196 

V. Stornelli, University of L’Aquila; G. Ferri, University of L’Aquila; A. De Marcellis, University of L’Aquila; 

C. Falconi, University Roma Tor Vergata; D. Mazzieri, University Roma Tor Vergata; A. D’Amico, University 

Roma Tor Vergata 

B5P-N.4 Low-Voltage CMOS Single Ended and Fully Differential Amplifier with Programmable Gain .......... 2200 

Jose Luis Ruiz-Chavira, New Mexico State University Las Cruces; Jaime Ramirez-Angulo, New Mexico State 

University Las Cruces; Antonio J. Lopez-Martin, New Mexico State University Las Cruces; Ramón G. Carvajal, 

University of Seville; Antonio Torralba, University of Seville 

B5P-N.5 Mismatch-Tolerant, Continuous Time, Gain Enhanced Amplifiers ...................................................... 2204 

C. Falconi, Università di Roma “Tor Vergata”; M. Cianella, Università di Roma “Tor Vergata”; A. D’Amico, 

Università di Roma “Tor Vergata”; G. Scotti, Università di Roma “La Sapienza”; A. Trifiletti, Università di 

Roma “La Sapienza” 

B5P-P Amplifiers V (Poster) 



Chair(s): Milutin Stanacevic, Stony Brook University 

B5P-P.1 The Impact of Different Gain Control Methods on Performance of CMOS Variable-Gain LNA ......... 2208 

Hsiao Wei Su, Future Communications IC Inc.; Zhi Hua Wang, Institute of Microelectronics Tsinghua University 

B5P-P.2 Rosenstark-Like Representation of Feedback Amplifier Resistance ................................................. 2212 

Christian Falconi, Università di Tor Vergata - DIE; Arnaldo D’Amico, Università di Tor Vergata - DIE; 

Gianluca Giustolisi, Università di Catania - DIEES; Gaetano Palumbo, Università di Catania - DIEES 

B5P-P.3 Miller Compensation: Optimization with Current Buffer/Amplifier .................................................... 2216 

Walter Aloisi, Università di Catania; Giuseppe Di Cataldo, Università di Catania; Gaetano Palumbo, Università 

di Catania; Salvatore Pennisi, Università di Catania 

B5P-P.4 Low-Voltage Wilson Current Mirrors in CMOS ....................................................................................... 2220 

Bradley A. Minch, Franklin W. Olin College of Engineering 

B5P-P.5 A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved 

Common-Mode Feedback ......................................................................................................................... 2224 

Michael Trakimas, Tufts University; Sameer Sonkusale, Tufts University

B5P-Q Continuous-Time Filters III (Poster) 



Chair(s): Randall Geiger, Iowa State University 

B5P-Q.1 On Problems of Compensated Continuous-Time Chebyshev Filters in the Time Domain ................. 2228 

Jacek Piskorowski, Szczecin University of Technology 

B5P-Q.2 Analysis of Continuous-Time Digital Signal Processors ....................................................................... 2232 

Bob Schell, Columbia University; Yannis Tsividis, Columbia University 

B5P-Q.3 A Continuous-Time Field Programmable Analog Array using Parasitic Capacitance Gm-C Filters .... 2236 

Fabian Henrici, IMTEK, Albert-Ludwigs-University; Joachim Becker, IMTEK, Albert-Ludwigs-University; 

Alexander Buhmann, IMTEK, Albert-Ludwigs-University; Maurits Ortmanns, IMTEK, 

Albert-Ludwigs-University; Yiannos Manoli, IMTEK, Albert-Ludwigs-University 

B5P-Q.4 Source-Degenerated CMOS Transconductor with Auxiliary Linearization ......................................... 2240 

Pietro Monsurrò, Università di Roma “La Sapienza”; Salvatore Pennisi, Università di Catania; Giuseppe Scotti, 

Università di Roma “La Sapienza”; Alessandro Trifiletti, Università di Roma “La Sapienza” 

B5P-Q.5 Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter ............................................ 2244 

Ippei Akita, Toyohashi University of Technology; Kazuyuki Wada, Toyohashi University of Technology; 

Yoshiaki Tadokoro, Toyohashi University of Technology 

B5P-R Circuit Theory II (Poster) 



Chair(s): Jaime Ramirez-Angulo, New Mexico State University 

B5P-R.1 Analysis of Second-Order Modes of Linear Continuous-Time Systems under 

Positive-Real Transformations ................................................................................................................. 2248 

Shunsuke Koshita, Tohoku University; Yousuke Mizukami, Tokyo Institute of Technology; Taketo Konno, 

Tohoku University; Masahide Abe, Tohoku University; Masayuki Kawamata, Tohoku University 

B5P-R.2 Performance Comparison of Switched-Capacitor and Switched-Current Pipeline ADCs ................. 2252 

Gholamreza Nikandish, Sharif University of Technology; Behnam Sedighi, Sharif University of Technology; 

Mehrdad Sharif Bakhtiar, Sharif University of Technology 

B5P-R.3 CMOS Inductor Performance Estimation using Z- and S-Parameters ................................................. 2256 

Maria Drakaki, Educational Institute of Thessaloniki; Alkis A. Hatzopoulos, Aristotle University of 

Thessaloniki; Stylianos Siskos, Aristotle University of Thessaloniki 

B5P-R.4 An Algorithm for Automatic Tuning of PLLs ........................................................................................... 2260 

Emad Hegazi, Ain Shams University 

B5P-R.5 Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators ................. 2264 

Alexander Buhmann, University of Freiburg - IMTEK; Matthias Keller, University of Freiburg - IMTEK; 

Maurits Ortmanns, University of Freiburg - IMTEK; Yiannos Manoli, University of Freiburg - IMTEK

B5P-S Nanoelectronics III (Poster) 



Chair(s): Wai-Chi Fang, NASA’s Jet Propulsion Laboratory 

B5P-S.1 Increasing the Sense Margin of 1T-1C Ferroelectric Random-Access Memories ............................. 2268 

Aly E. Salama, Cairo University; Sherif M. Sharroush, Faculty of Engineering; Mahmoud Y. Fekry, Faculty of 

Industrial Education-Suez 

B5P-S.2 Fault Tolerance Circuit for AM-OLED ...................................................................................................... 2272 

Dayong Li, Chinese Academy of Sciences; Ming Liu, Chinese Academy of Sciences; Wei Wang, Indiana 

University - Purdue University Indianapolis 

B5P-S.3 Chopper Modulation Improves OTA Information Transmission ........................................................... 2275 

Nicole M. Nelson, University of Maryland, College Park; Pamela A. Abshire, University of Maryland, College Park 

B5P-S.4 Temperature-Robust Performance Yield through Supply Voltage Selection ...................................... 2279 

David Wolpert, University of Rochester; Paul Ampadu, University of Rochester 

B5P-S.5 Subwavelength Plasmonic Bragg Reflector Structures for On-Chip Optoelectronic Applications ..... 2283 

Amir Hossieni, Rice University; Yehia Massoud, Rice University 

B5P-T Digital Signal Processing I (Poster) 



Chair(s): Yoshikazu Miyanaga, Hokkaido University 

B5P-T.1 Dynamic Reconfigurable Architecture for a Low-Power Despreader in VSF-OFCDM Systems ........ 2287 

Takayuki Sugawara, Hokkaido University; Shingo Yoshizawa, Hokkaido University; Yoshikazu Miyanaga, 

Hokkaido University 

B5P-T.2 An Efficient Method for Estimation of Autoregressive Signals Subject to Colored Noise ............... 2291 


B5P-T.3 Application of Sequential Monte Carlo to M-QAM Schemes in the Presence of 

Nonlinear Solid-State Power Amplifiers .................................................................................................. 2295 

Mahdi Shabany, University of Toronto; P. Glenn Gulak, University of Toronto 

B5P-T.4 PLL-Free Quadrature-Amplitude Modulation in Coherent Optical Communication .......................... 2299 

Ut-Va Koc, Bell Labs, Lucent Technologies 

B5P-T.5 Peak-Contrained WLS Strategy for FIR Digital Filter Design ............................................................... 2303 

Hon Keung Kwan, University of Windsor; Aimin Jiang, University of Windsor 

B5P-U Digital Signal Processing II (Poster) 



Chair(s): Jun Zhang, eBay/Santa Clara University 

B5P-U.1 Eigenvector and Fractionalization of Discrete Hadamard Transform ................................................. 2307 

C.C. Tseng, National Kaohsiung First University of Science and Technology 

B5P-U.2 Noise Reduction System based on LPEF and System Identification with Variable Step Size ......... 2311 

Naoto Sasaoka, Tottori University; Masatoshi Watanabe, Tottori University; Yoshio Itoh, Tottori University; 

Kensaku Fujii, University of Hyogo

B5P-U.3 Lagrangian Gradient for Principal Singular Component Analysis ....................................................... 2315 

Mohammed A. Hasan, University of Minnesota Duluth 

B5P-U.4 Discrete Stockwell Transform and Reduced Redundancy Versions from Frame Theory Viewpoint ... 2319 

Alessandro Bastari, Università Politecnica delle Marche; Stefano Squartini, Università Politecnica delle 

Marche; Francesco Piazza, Università Politecnica delle Marche 

B5P-U.5 Nonlinear Compensation for High Power Amplifiers using Genetic Programming ........................... 2323 

Robin Moritz, University of Calgary; Henry Leung, University of Calgary; Xinping Huang, Communications 

Research Center Canada 

B5P-V Digital Filters (Poster) 



Chair(s): Yong Lian, National University of Singapore 

B5P-V.1 A New Binary Common Subexpression Elimination Method for Implementing 

Low Complexity FIR Filters ....................................................................................................................... 2327 

Smitha Kavallur Pisharath Gopi, Nanyang Technological University; Vinod Achutavarrier Prasad, Nanyang 

Technological University 

B5P-V.2 A Diversity Controlled Genetic Algorithm for Optimization of FRM Digital Filters over DBNS 

Multiplier Coefficient Space .................................................................................................................... 2331 

Sai Mohan Kilambi, University of Alberta; Behrouz Nowrouzian, University of Alberta 

B5P-V.3 Complexity Comparison of Linear-Phase Mth-Band and General FIR Filters .................................... 2335 

Oscar Gustafsson, Linköping University; Håkan Johansson, Linköping University 

B5P-V.4 IIR Digital Filter Design with Novel Stability Criterion based on Argument Principle ...................... 2339 

Aimin Jiang, University of Windsor; Hon Keung Kwan, University of Windsor 

B5P-V.5 FIR Filter Approximation by IIR Filters based on Discrete-Time Vector Fitting ................................. 2343 

Ngai Wong, University of Hong Kong; Chi-Un Lei, University of Hong Kong 

B5P-W BioCAS I (Poster) 



Chair(s): Khaled Salama, Rensselaer Polytechnic Institute 

B5P-W.1 New Spatially Adaptive Wavelet-Based Method for the Despeckling of 

Medical Ultrasound Images ..................................................................................................................... 2347 

M.I.H. Bhuiyan, Concordia University; M. Omair Ahmad, Concordia University; M.N.S. Swamy, Concordia University 

B5P-W.2 A Nanowatt Successive Approximation ADC with Offset Correction for 

Implantable Sensor Applications ............................................................................................................. 2351 

Karim Abdelhalim, Carleton University; Leonard MacEachern, Carleton University; 

Samy Mahmoud, Carleton University 

B5P-W.3 A Low Power Digital Baseband for Wireless Endoscope Capsule ....................................................... 2355 

Xin-Kai Chen, Tsinghua University; Guolin Li, Tsinghua University; Xiang Xie, Tsinghua University; 

Xiao Wen Li, Tsinghua University; Zhihua Wang, Tsinghua University; Hong Chen, Tsinghua University 

B5P-W.4 A Wide Tuning Range CMOS Oscillator for an Optoelectronic Retinal Prosthesis System .............. 2359 

Yan Huang, Imperial College London; Emmanuel M. Drakakis, Imperial College London; Chris Toumazou, 

Imperial College London

B5P-W.5 Ultra Low-Power Sensor Node for Wireless Health Monitoring System ............................................. 2363 

T. Hui Teo, Institute of Microelectronics; Gin Kooi Lim, Institute of Microelectronics; Darwin Sutomo David, 

Institute of Microelectronics; Kuo Hwi Tan, Institute of Microelectronics; Pradeep Kumar Gopalakrishnan, 

Institute of Microelectronics; Rajnder Singh, Institute of Microelectronics 

B5P-X BioCAS II (Poster) 



Chair(s): Rizwan Tec, University of Florida, Gainesville 

B5P-X.1 A Safe Transmission Strategy for Power and Data Recovery in Biomedical Implanted Devices .... 2367 

Xiao Liu, University College London; Andreas Demosthenous, University College London; Nick Donaldson, 

University College London 

B5P-X.2 Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics .................... 2371 

Awais M. Kamboh, Michigan State University; Matthew Raetz, Michigan State University; Andrew Mason, 

Michigan State University; Karim Oweiss, Michigan State University 

B5P-X.3 A Bio-Inspired Adaptive Retinal Processing Neuron with Multiplexed Spiking Outputs .................. 2375 

Dylan Banks, Imperial College of Science, Technology and Medicine; Patrick Degenaar, Imperial College of 

Science, Technology and Medicine; Chris Toumazou, Imperial College of Science, Technology and Medicine 

B5P-X.4 A New Handheld Biochip-based Microsystem ........................................................................................ 2379 

P.A.C. Lopes, INESC-ID/IST; J. Germano, INESC-ID/IST; T.M. Almeida, INESC-ID/IST; L. Sousa, INESC- 

ID/IST; M.S. Piedade, INESC-ID/IST; F. Cardoso, INESC-ID/IST; H.A. Ferreira, INESC-ID/IST; P.P. Freitas, 

INESC-ID/IST 

B5P-X.5 An Implantable Long-Term Bladder Urine Pressure Measurement System with a 1-atm 

Canceling Instrumentation Amplifier ...................................................................................................... 2383 

Chua-Chin Wang, National Sun Yat-Sen University; Chi-Chun Huang, National Sun Yat-Sen University; 

Jian-Sing Liou, National Sun Yat-Sen University; Yan-Jhin Ciou, National Sun Yat-Sen University; I-Yu Huang, 

National Sun Yat-Sen University; Chih-Peng Li, National Sun Yat-Sen University; Yun-Chin Lee, Kaohsiung 

Medical University Chung-Ho Memorial Hospital; Wen-Jen Wu, Kaohsiung Medical University Chung-Ho 

Memorial Hospital 

B5P-Y Sensory Systems II (Poster) 



Chair(s): Andre van Schaik, The University of Sydney 

B5P-Y.1 A Basilar Membrane Resonator for an Active 2-D Cochlea .................................................................. 2387 

Tara Julia Hamilton, University of Sydney; Craig Jin, University of Sydney; André van Schaik, University of Sydney 

B5P-Y.2 Circuit Techniques for Reducing Low Frequency Noise in Optical MEMS 

Position and Inertial Sensors ................................................................................................................... 2391 

Roy H. Olsson III, Sandia National Laboratories; Bianca E.N. Keeler, Sandia National Laboratories; 

David A. Czaplewski, Sandia National Laboratories; Dustin W. Carr, Symphony Acoustics, Inc. 

B5P-Y.3 A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation ......................... 2395 

Edwin J. Tan, University of Rochester; Zeljko Ignjatovic, University of Rochester; 

Mark F. Bocko, University of Rochester 

B5P-Y.4 A CMOS Image Sensor using Variable Reference Time Domain Encoding ........................................ 2399 

M.K. Law, Hong Kong University of Science and Technology; A. Bermak, Hong Kong 

University of Science and Technology

B5P-Y.5 New Recursive Adaptive Beamforming Algorithms for Uniform Concentric Spherical Arrays 

with Frequency Invariant Characteristics .............................................................................................. 2403 

H.H. Chen, University of Hong Kong; S.C. Chan, University of Hong Kong; K.L. Ho, University of Hong Kong 

B6P-N Other Topics in Power Electronics (Poster) 



Chair(s): Alessandro Cabrini, University of Pavia 

B6P-N.1 Complex Phenomena in SEPIC Converter based on Sliding Mode Control ........................................ 2407 

Shi-Bing Wang, Anhui University, Fuyang Teachers College; Yufei Zhou, Anhui University; Herbert H.C. Iu, 

University of Western Australia; Jun-Ning Chen, Anhui University 

B6P-N.2 A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories ....................................... 2411 

Anna Richelli, University of Brescia; Luca Mensi, University of Brescia; Luigi Colalongo, University of 

Brescia; Pier Luigi Rolandi, STMicroelectronics; Zsolt Kovács, University of Brescia 

B6P-N.3 CMOS Integrated Highly Efficient Full Wave Rectifier ......................................................................... 2415 

C. Peters, University of Freiburg - IMTEK; O. Kessling, University of Freiburg - IMTEK; F. Henrici, University 

of Freiburg - IMTEK; M. Ortmanns, University of Freiburg - IMTEK; Y. Manoli, University of Freiburg - IMTEK 

B6P-N.4 Boundaries between Fast- and Slow-Scale Bifurcations in Parallel-Connected Buck Converters ..... 2419 

Yuehui Huang, Hong Kong Polytechnic University; Herbert H.C. Iu, University of Western Australia; 

Chi K. Tse, Hong Kong Polytechnic University 

B6P-N.5 General-Purpose Ripple-Based Fast-Scale Instability Prediction in Switching Power Regulators .... 2423 

E. Rodriguez, Technical University of Catalunya; G. Villar, Technical University of Catalunya; F. Guinjoan, 

Technical University of Catalunya; A. Poveda, Technical University of Catalunya; A. El-Aroudi, Universitat 

Rovira i Virgili; E. Alarcón, Technical University of Catalunya 

B6P-P Power Systems II (Poster) 



Chair(s): Chika Nwankpa, Drexel University 

B6P-P.1 Analysis of an Adaptive Filter-Bank for Harmonic Measurement and Estimation ............................ 2427 

Hanwu Sun, Institute for Infocomm Research; Louis Shue, Institute for Infocomm Research 

B6P-P.2 Short Circuit Current of Induction Generators ....................................................................................... 2431 

T. Sulawa, Polytechnic University; Z. Zabar, Polytechnic University; D. Czarkowski, Polytechnic University; 

L. Birenbaum, Polytechnic University; S. Lee, Con Edison; Y. TenAmi, Con Edison 

B6P-P.3 A Low-Power Sensorless Inverter Controller of Brushless DC Motors ................................................ 2435 

Chua-Chin Wang, National Sun Yat-Sen University; Gang-Neng Sung, National Sun Yat-Sen University; 

Kuan-Wen Fang, National Sun Yat-Sen University; Sheng-Lun Tseng, National Sun Yat-Sen University 

B6P-P.4 Incremental Power Impedance Optimization using Vector Fitting Modeling .................................... 2439 

Wanping Zhang, University of California, San Diego; Chung-Kuan Cheng, University of California, San Diego 

B6P-P.5 Risk Management – Beyond Risk Analysis ............................................................................................ 2443 

Leontina Pinto, ENGENHO; Rodrigo Maia, ELETROPAULO; Leandro Tsunechiro, ELETROPAULO; 

Jacques Szczupak, ENGENHO/PUC-RJ; Bruno Dias, ENGENHO/PUC-RJ

B6P-Q Power & Nonlinear Circuits & Systems (Poster) 



Chair(s): C. K. Michael Tse, Hong Kong Polytechnic University 

B6P-Q.1 A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop .............................................................. 2447 

Li Zhang, Tsinghua University; Baoyong Chi, Tsinghua University; Jinke Yao, Tsinghua University; Ende Wu, 

Tsinghua University; Zhihua Wang, Tsinghua University; Hongyi Chen, Tsinghua University 

B6P-Q.2 A 5 Meps $100 USB2.0 Address-Event Monitor-Sequencer Interface ............................................... 2451 

R. Berner, Institute of Neuroinformatics, UNI-ETH Zurich; T. Delbruck, Institute of Neuroinformatics, UNI-ETH 

Zurich; A. Civit-Balcells, University of Seville; A. Linares-Barranco, University of Seville 

B6P-Q.3 A Silicon-on-Sapphire Low-Voltage Temperature Sensor for Energy Scavengers ............................. 2455 

Tolga Kaya, Istanbul Technical University; Hur Koser, Yale University; Eugenio Culurciello, Yale University 

B6P-Q.4 On a Novel Hybrid LQ-MCS Control Strategy and its Application to a DC Motor ............................... 2459 

M. di Bernardo, University of Naples Federico II; U. Montanaro, University of Naples Federico II; S. Santini, 

University of Naples Federico II 

B6P-Q.5 A Converter with Fixed Switching Frequency Adaptive Multi-Mode Control Scheme ...................... 2463 

Jaber A. Abu Qahouq, Intel Corporation; Lilly Huang, Intel Corporation 

B6P-R Nonlinear Circuits & Systems (Poster) 



Chair(s): Mario Di Bernardo, Università degli Studi di Napoli Federico II 

B6P-R.1 A General Noncoherent Chaos-Shift-Keying Communication System and its 

Performance Analysis ............................................................................................................................... 2466 

Hongbin Chen, South China University of Technology; Jiuchao Feng, South China University of Technology, 

Southwest University; Chi K. Tse, Hong Kong Polytechnic University 

B6P-R.2 A Method to Reduce the Effect of the Switching Noise in Analog-Mixed Circuits ............................ 2470 

Chunyan Wang, Concordia University 

B6P-R.3 Occasional Delayed Feedback Control for Switched Autonomous Systems ...................................... 2474 

Tetsushi Ueta, Tokushima University; Takuji Kousaka, Oita University; Shigeki Tsuji, Aihara Complexity 

Project, ERATO, JST 

B6P-R.4 Performance of Multi-User DCSK Communication System Over Multipath Fading Channels ......... 2478 

Zhibo Zhou, Harbin Institute of Technology; Tong Zhou, Harbin Institute of Technology; Jinxiang Wang, 

Harbin Institute of Technology 

B6P-S Nonlinear Oscillators & PLLs (Poster) 



Chair(s): Toshimichi Saito, Hosei University 

B6P-S.1 A Chaos-Modulated Dual Oscillator-Based Truly Random Number Generator ................................... 2482 

Salih Ergün, TÜBİTAK-National Research Institute of Electronics and Cryptology; Serdar Özoguz, İstanbul 

Technical University 

B6P-S.2 Phase Synchronization in Injection-’Un’locking Oscillator Arrays ....................................................... 2486 

Kuniyasu Shimizu, Meiji University; Hisa-Aki Tanaka, University of Electro-Communications; 

Osamu Masugata, University of Electro-Communications; Tetsuro Endo, Meiji University

B6P-S.3 Design of a Low Jitter Multi-Phase Realigned PLL in Submicronic CMOS Technology .................... 2490 

Régis Roubadia, ATMEL Rousset; Sami Ajram, Fairchild Semiconductor; 

Guy Cathébras, LIRMM - Universite Montpellier 2 

B6P-S.4 Adaptive Pinning Synchronization of a General Complex Dynamical Network ................................. 2494 

Jin Zhou, Wuhan University; Junan Lu, Wuhan University; Jinhu Lu, Chinese Academy of Sciences 

B6P-T Sensor Networks & Traffic (Poster) 



Chair(s): Danella Zhao, University of Louisiana at Lafayette 

B6P-T.1 Vertically-Integrated Three-Dimensional SOI Photodetectors ............................................................. 2498 

Eugenio Culurciello, Yale University; Pujitha Weerakoon, Yale University 

B6P-T.2 Distributed Optimization Over Wireless Sensor Networks using Swarm Intelligence ...................... 2502 

Bo Wang, University of Missouri; Zhihai He, University of Missouri 

B6P-T.3 Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition .................. 2506 

Chung-Ching Shen, University of Maryland; Roni Kupershtok, University of Maryland; Bo Yang, University of 

Maryland; Felice Maria Vanin, University of Maryland; Xi Shao, University of Maryland; Datta Sheth, 

University of Maryland; Neil Goldsman, University of Maryland; Quirino Balzano, University of Maryland; 

Shuvra S. Bhattacharyya, University of Maryland 

B6P-T.4 A New 10 Gbps Traffic Management Algorithm for High-Speed Networks ........................................ 2510 

Fariborz Fereydouni-Forouzandeh, Concordia University; Otmane Ait Mohamed, Concordia University 

B6P-U SDR/CR Circuits & Systems (Poster) 



Chair(s): Tokunbo Ogunfunmi, Santa Clara University 

B6P-U.1 An Architecture for Integrating Low Complexity and Reconfigurability for Channel Filters in 

Software Defined Radio Receivers .......................................................................................................... 2514 

Mahesh Raveendranatha Panicker, Nanyang Technological University; Vinod Achutavarrier Prasad, Nanyang 


B6P-U.2 Frequency Response Masking based Reconfigurable Channel Filters for 

Software Radio Receivers ........................................................................................................................ 2518 

Mahesh Raveendranatha Panicker, Nanyang Technological University; Vinod Achutavarrier Prasad, Nanyang 


B6P-U.3 On the Suitability of Discrete-Time Receivers for Software-Defined Radio ....................................... 2522 

Zhiyu Ru, University of Twente; Eric A.M. Klumperink, University of Twente; Bram Nauta, University of Twente 

B6P-U.4 Improved Factorization for Sample Rate Conversion in Software Defined Radios ........................... 2526 

Faheem Sheikh, Lahore University of Management Sciences; Shahid Masud, Lahore University of Management Sciences 

B6P-U.5 A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios ................ 2530 

Nathan M. Neihart, University of Washington; Sumit Roy, University of Washington; David J. Allstot, 

University of Washington

B6P-V Communications Circuit Design I (Poster) 



Chair(s): Ashok Kumar, University of Louisiana at Lafayette 

B6P-V.1 A CMOS Direct-Digital BPSK Modulator using an Active Balun and Common-Gate Switches ........ 2534 

Brad R. Jackson, Queen’s University; You Zheng, Queen’s University; Carlos E. Saavedra, Queen’s University 

B6P-V.2 A 2.5 Gb/s CMOS Burst-Mode Limiting Amplifier for GPON System ................................................... 2538 

Chueh-Hao Yu, Industrial Technology Research Institute; Day-Uei Li, Industrial Technology Research Institute 

B6P-V.3 50GHz Double-Balanced Up-Conversion Mixer using CMOS 90nm Process ...................................... 2542 

Ivan Chee Hong Lai, University of Tokyo; Yuki Kambayashi, University of Tokyo; Minoru Fujishima, 

University of Tokyo 

B6P-V.4 A 3.8-Gb/S CMOS Laser Driver with Automatic Power Control using Thermistors ........................... 2546 

Day-Uei Li, Industrial Technology Research Institute; Wen-Hui Chen, Industrial Technology Research Institute; 

Long-Xi Chang, Industrial Technology Research Institute; Chueh-Hao Yu, Industrial Technology Research Institute 

B6P-V.5 A New CMOS BPSK Modulator with Optimal Transaction Bandwidth Control .................................. 2550 

A. Tang, Ryerson University; F. Yuan, Ryerson University; E. Law, Ryerson University 

B6P-W Communications Circuit Design II (Poster) 



Chair(s): Ashok Kumar, University of Louisiana at Lafayette 

B6P-W.1 All-CMOS High-Speed CML Gates with Active Shunt-Peaking ............................................................. 2554 

Nader Kalantari, Starport Systems; Michael M. Green, University of California, Irvine 

B6P-W.2 The Wide Input Range Automatic-Threshold Control Circuit for High Definition 

Digital Audio Interface .............................................................................................................................. 2558 

Ji-Yong Jeong, Korea University; Gil-Su Kim, Korea University; Seung-Hoon Oh, Korea University; Kyu- 

Young Kim, Korea University; Soo-Won Kim, Korea University 

B6P-W.3 Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS using 

Digitally Switchable Capacitance ............................................................................................................ 2562 

Yike Cui, Tsinghua University; Baoyong Chi, Tsinghua University; Minjie Liu, Tsinghua University; 

Yulei Zhang, Tsinghua University; Yongming Li, Tsinghua University; Patrick Chiang, Oregon State 

University; Zhihua Wang, Tsinghua University 

B6P-W.4 A Fully Integrated 2.4GHz CMOS Frequency Synthesizer using a Ring-Based VCO with 

Inductive Peaking ...................................................................................................................................... 2566 

Ahmed Saad Abdou, LSI Logic; Khaled M. Sharaf, Ain Shams University 

B6P-W.5 Fault Tolerant Signal Processing for Masking Transient Errors in VLSI Signal Processors ............. 2570 

W.K. Jenkins, Pennsylvania State University; C. Radhakrishnan, Pennsylvania State University; S. Pal, 

Pennsylvania State University

B6P-X Wireless Communications Systems (Poster) 



Chair(s): Gerald Sobelman, University of Minnesota 

B6P-X.1 Implementation of Folded Sliding Block Viterbi Decoders for MB-OFDM UWB 

Communication System ............................................................................................................................ 2574 

Zhuo Xu, Fudan University; Junyan Ren, Fudan University; Xue-Jing Wang, Fudan University; 

Fan Ye, Fudan University 

B6P-X.2 An Energy-Proportion Synchronization Method for IR-UWB Communications .................................. 2578 

Jing Wang, Fudan University; Lang Mai, Fudan University; Yanjie Peng, Fudan University; Jun Han, Fudan 

University; Xiaoyang Zeng, Fudan University 

B6P-X.3 Multiuser Detection based on Particle Swarm Optimation Algorithm ................................................ 2582 

Zhen-Qing Guo, Beijing Jiaotong University; Yang Xiao, Beijing Jiaotong University; Moon Ho Lee, Chonbuk 


B6P-X.4 Application of a Heterogeneous Reconfigurable Architecture to OFDM Wireless Systems ............ 2586 

Afshin Niktash, University of California, Irvine; Hooman T. Parizi, University of California, Irvine; 

Nader Bagherzadeh, University of California, Irvine 

B6P-X.5 Modified SDF Architecture for Mixed DIF/DIT FFT ............................................................................... 2590 

Seungbeom Lee, Information and Communications University; Sin-Chong Park, Information and 

Communications University 

B6P-Y MIMO System Design (Poster) 



Chair(s): Hanho Lee, Inha University 

B6P-Y.1 Design of Low-Power, 1GS/S throughput FFT Processor for MIMO-OFDM UWB 

Communication System ............................................................................................................................ 2594 

Liang Liu, Fudan University; Junyan Ren, Fudan University; Xuejing Wang, Fudan University; 

Fan Ye, Fudan University 

B6P-Y.2 Effect of Word-Length Precision on the Performance of MIMO Systems ........................................... 2598 

C.K. Singh, University of Texas at Dallas; N. Al-Dhahir, University of Texas at Dallas; P.T. Balsara, University 

of Texas at Dallas 

B6P-Y.3 A Novel Low-Complexity Rayleigh Fader for Real-Time Channel Modeling ........................................ 2602 

Chun-Hao Liao, National Taiwan University; To-Ping Wang, National Taiwan University; Tzi-Dar Chiueh, 


B6P-Y.4 A Real-Time Digital Baseband MIMO Channel Emulation System ...................................................... 2606 

To-Ping Wang, National Taiwan University; Chun-Hao Liao, National Taiwan University; Tzi-Dar Chiueh, 


B6P-Y.5 Efficient Complex Matrix Inversion for MIMO Software Defined Radio ............................................. 2610 

Johan Eilert, Linköping University; Di Wu, Linköping University; Dake Liu, Linköping University

Wednesday, May 30, 2007 

C1L-A Wireless Circuits & Systems III (Lecture) 

Time: Wednesday, May 30, 2007, 9:30 - 11:00 


Chair(s): Andreas G. Andreou, Johns Hopkins University 

Wouter A. Serdijn, TU Delft 

9:30 

C1L-A.1 CMOS Millimeter-Wave Signal Sources and Detectors ........................................................................ 2614 

K.K. O, University of Florida; C. Cao, University of Florida; E.-Y. Seok, University of Florida; S. Sankaran, 

University of Florida 

9:48 

C1L-A.2 A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers ..................... 2618 

Ro-Min Weng, National Dong Hwa University; Po-Cheng Lin, National Dong Hwa University 

10:06 

C1L-A.3 Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance 

Matching Networks ................................................................................................................................... 2622 

Hamid Nejati, Rice University; Tamer Ragheb, Rice University; Arthur Nieuwoudt, Rice University; 

Yehia Massoud, Rice University 

10:24 

C1L-A.4 A Subharmonic Injection-Locked Self-Oscillating Mixer ...................................................................... 2626 

F. Plessas, University of Patras; A. Papalambrou, University of Patras; G. Kalivas, University of Patras 

10:42 

C1L-A.5 Mixing in a 220MHz CMOS-MEMS .......................................................................................................... 2630 

J.L. López, Universitat Autònoma de Barcelona; J. Teva, Universitat Autònoma de Barcelona; A. Uranga, Universitat 

Autònoma de Barcelona; F. Torres, Universitat Autònoma de Barcelona; J. Verd, Universitat Autònoma de Barcelona; 

G. Abadal, Universitat Autònoma de Barcelona; J. Esteve, Centre Nacional de Microelectrònica; F. Perez-Murano, 

Centre Nacional de Microelectrònica; N. Barniol, Universitat Autònoma de Barcelona 

C1L-B SPECIAL SESSION: Complex Biological & Engineering Networks (Lecture) 




Jinhu Lu, Chinese Academy of Sciences 

9:30 

C1L-B.1 A Brief Overview of the Complex Biological and Engineering Networks ............................................ 2634 

Jinhu Lü, Chinese Academy of Sciences; Derong Liu, University of Illinois at Chicago 

9:48 

C1L-B.2 On Two Approaches to Analyzing Consensus in Complex Networks ................................................... 2638 

Chai Wah Wu, IBM T. J. Watson Research Center 

10:06 

C1L-B.3 Enhancing Synchronizabilities of Power-Law Networks ....................................................................... 2642 

Jin Fan, Shanghai Jiao Tong University; Xiao Fan Wang, Shanghai Jiao Tong University; Xiang Li, Shanghai 

Jiao Tong University

10:24 

C1L-B.4 Identification and Monitoring of Biological Neural Network ............................................................... 2646 

Wallace K.S. Tang, City University of Hong Kong; Mao Yu, City University of Hong Kong; Ljupco Kocarev, 

University of California, San Diego 

10:42 

C1L-B.5 Synchronization of the Time-Varying Discrete Biological Networks ................................................... 2650 

Liang Chen, Wuhan University; Jinhu Lü, Chinese Academy of Sciences; Junan Lu, Wuhan University 

C1L-C Visual Signal Processing & Representations (Lecture) 



Chair(s): Ebroul Izquirdo, Queen Mary, University of London 

Yap-Peng Tan, Nanyang Technological University 

9:30 

C1L-C.1 Image Quality Assessment using Foveated Wavelet Error Sensitivity and Isotropic Contrast ........ 2654 

Susu Yao, Institute for Infocomm Research; Weisi Lin, Institute for Infocomm Research; EePing Ong, Institute 

for Infocomm Research; Zhongkang Lu, Institute for Infocomm Research; Mei Hwan Loke, Institute for 

Infocomm Research; Zhengguo Li, Institute for Infocomm Research 

9:48 

C1L-C.2 Pixel-Level Image Fusion Scheme based on Linear Algebra ................................................................ 2658 

Ruth Aguilar-Ponce, University of Louisiana at Lafayette; J. Luis Tecpanecatl-Xihuitl, University of Louisiana at 

Lafayette; Ashok Kumar, University of Louisiana at Lafayette; Magdy Bayoumi, University of Louisiana at Lafayette 

10:06 

C1L-C.3 Motion Adaptive Deinterlacing via Edge Pattern Recognition ............................................................ 2662 

Gwo Giun Lee, National Cheng Kung University; Hsin-Te Li, National Cheng Kung University; 

Ming-Jiun Wang, National Cheng Kung University; He-Yuan Lin, National Cheng Kung University 

10:24 

C1L-C.4 Background Stabilization and Debris Flagging in Launch Pad Videos ............................................... 2666 

Kaushik Gopalan, University of Central Florida; Takis Kasparis, University of Central Florida 

10:42 

C1L-C.5 Low-Complexity and Reliable Moving Objects Detection and Tracking for Aerial Video 

Surveillance with Small UAVs .................................................................................................................. 2670 

Yu-chia Chung, University of Missouri; Zhihai He, University of Missouri 

C1L-D Spatio Temporal Computing & Design Issues (Lecture) 



Chair(s): Paolo Arena, University of Catania 


9:30 

C1L-D.1 CNN Implementation of Spin Filters for Electronic Speckle Pattern Interferometry Applications ..... 2674 

David L. Vilariño, University of Santiago de Compostela; Victor M. Brea, University of Santiago de Compostela; 

Vicente Moreno, University of Santiago de Compostela; Diego Cabello, University of Santiago de Compostela 

9:48 

C1L-D.2 Evolution of Pixel Level Snakes Towards an Efficient Hardware Implementation ............................ 2678 

David Lopez Vilariño, University of Santiago de Compostela; Piotr Dudek, University of Manchester

10:06 

C1L-D.3 Area and Time Efficient Cellular Non-Linear Networks ......................................................................... 2682 

Natalia A. Fernández-García, University of Santiago de Compostela; Victor M. Brea, University of Santiago de 

Compostela; Diego Cabello, University of Santiago de Compostela 

10:24 

C1L-D.4 An Organic Computing Architecture for Visual Microprocessors based on Marching Pixels .......... 2686 

Dietmar Fey, Friedrich-Schiller-University Jena; Marcus Komann, Friedrich-Schiller-University Jena; 

Frank Schurz, Friedrich-Schiller-University Jena; Andreas Loos, Friedrich-Schiller-University Jena 

10:42 

C1L-D.5 A Focal-Plane Image Processor for Low Power Adaptive Capture and 

Analysis of the Visual Stimulus ................................................................................................................ 2690 

C.M. Domínguez-Matas, Universidad de Sevilla; R. Carmona-Galán, Universidad de Sevilla; 

F.J. Sánchez-Fernández, Universidad de Sevilla; A. Rodríguez-Vázquez, Universidad de Sevilla 

C1L-E Mixed Signal Modeling & Optimization (Lecture) 



Chair(s): Volkan Kursun, University of Wisconsin at Madison 


9:30 

C1L-E.1 On the Effectiveness of Reducing Large Linear Networks with Many Ports ...................................... 2694 

João M.S. Silva, Technical University Lisbon; L. Miguel Silveira, Technical University Lisbon 

9:48 

C1L-E.2 Noise Simulation and Modeling for MEMS Varactor based RF VCOs ................................................. 2698 

Janakiram G. Sankaranarayanan, Qualcomm Inc.; Kartikeya Mayaram, Oregon State University 

10:06 

C1L-E.3 GAPSYS: A GA-Based Tool for Automated Passive Analog Circuit Synthesis ..................................... 2702 

Angan Das, University of Cincinnati; Ranga Vemuri, University of Cincinnati 

10:24 

C1L-E.4 Fast Transient Simulation of Lossy Transmission Lines ....................................................................... 2706 

He Peng, University of California, San Diego; Chung-Kuan Cheng, University of California, San Diego 

10:42 

C1L-E.5 RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-Order 

Model of Interconnect ............................................................................................................................... 2710 

Fan Yang, Fudan University; Xuan Zeng, Fudan University; Yangfeng Su, Fudan University; Dian Zhou, 

Fudan University, University of Texas at Dallas 

C1L-F IIR Digital Filters (Lecture) 



Chair(s): Takao Hinamoto, Hiroshima University 

H. K. Kwan, University of Windsor 

9:30 

C1L-F.1 Design of IIR Variable Fractional Delay Digital Filters ......................................................................... 2714 

Hon Keung Kwan, University of Windsor; Aimin Jiang, University of Windsor

9:48 

C1L-F.2 On Frequency-Weighted L2-Sensitivity Analysis and Minimization of 2-D State-Space Digital 

Filters Subject to L2-Scaling Constraints ............................................................................................... 2718 

Takao Hinamoto, Hiroshima University; Toru Oumi, Hiroshima University; Osemekhian I. Omoifo, Hiroshima 

University; Wu-Sheng Lu, University of Victoria 

10:06 

C1L-F.3 A Fast Convergence Algorithm for L2-Sensitivity Minimization of 2-D Separable-Denominator 

State-Space Digital Filters ....................................................................................................................... 2722 

Shunsuke Yamaki, Tohoku University; Masahide Abe, Tohoku University; Masayuki Kawamata, Tohoku University 

10:24 

C1L-F.4 Digital Integrator Design using Recursive Romberg Integration Rule and 

Fractional Sample Delay ........................................................................................................................... 2726 

C.-C. Tseng, National Kaohsiung First University of Science and Technology 

10:42 

C1L-F.5 A Low Power Digital Signal Processor with Adaptive Band Activation for 

Digital Hearing Aid Chip ........................................................................................................................... 2730 

Seung Jin Lee, Korea Advanced Institute of Science and Technology (KAIST); Sunyoung Kim, Korea 

Advanced Institute of Science and Technology (KAIST); Hoi-Jun Yoo, Korea Advanced Institute of 

Science and Technology (KAIST) 

C1L-G SPECIAL SESSION: Partial Dynamic Reconfiguration for HW/SW Codesign (Lecture) 



Chair(s): Marco D. Santambrogio, Politecnico di Milano 

Donatella Sciuto, Politecnico di Milano 

9:30 

C1L-G.1 Dynamic Reconfigurability in Embedded System Design ..................................................................... 2734 

Vincenzo Rana, Politecnico di Milano; Marco Santambrogio, Politecnico di Milano; Donatella Sciuto, 

Politecnico di Milano 

9:48 

C1L-G.2 System-Level Design for Partially Reconfigurable Hardware .............................................................. 2738 

Yang Qu, Technical Research Centre of Finland (VTT); Kari Tiensyrjä, Technical Research Centre of Finland (VTT); 

Juha-Pekka Soininen, Technical Research Centre of Finland (VTT); Jari Nurmi, Tampere University of Technology 

10:06 

C1L-G.3 Dynamically Swappable Hardware Design in Partially Reconfigurable Systems .............................. 2742 

Chun-Hsian Huang, National Chung Cheng University; Kai-Jung Shih, National Chung Cheng University; 

Chao-Sheng Lin, National Chung Cheng University; Shih-Shiue Chang, National Chung Cheng University; 

Pao-Ann Hsiung, National Chung Cheng University 

10:24 

C1L-G.4 Modeling and Synthesis of Hardware-Software Morphing ................................................................... 2746 

Dirk Koch, University of Erlangen-Nuremberg; Christian Haubelt, University of Erlangen-Nuremberg; 

Thilo Streichert, University of Erlangen-Nuremberg; Jurgen Teich, University of Erlangen-Nuremberg 

10:42 

C1L-G.5 Automated HDL Generation: Comparative Evaluation .......................................................................... 2750 

Yana Yankova, Delft University of Technologies; Koen Bertels, Delft University of Technologies; 

Stamatis Vassiliadis, Delft University of Technologies; Roel Meeuws, Delft University of Technologies; 

Arcilio Virginia, Delft University of Technologies

C1L-H VLSI for Communications II (Lecture) 





9:30 

C1L-H.1 A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed 

Networking Applications .......................................................................................................................... 2754 

Ching-Te Chiu, National Tsing Hua University; Yu-Hao Hsu, National Tsing Hua University; Min-Sheng Kao, 

National Tsing Hua University; Hou-Cheng Tzeng, National Tsing Hua University; Ming-Chang Du, National 

Tsing Hua University; Ping-Ling Yang, National Tsing Hua University; Ming-Hao Lu, National Tsing Hua 

University; Fanta Chen, National Tsing Hua University; Hung-Yu Lin, National Tsing Hua University; 

Jen-Ming Wu, National Tsing Hua University; Shuo-Hung Hsu, National Tsing Hua University; Yar-Sun Hsu, 

National Tsing Hua University 

9:48 

C1L-H.2 Performance of Quantized Min-Sum Decoding Algorithms for Irregular LDPC Codes ...................... 2758 

Daesun Oh, University of Minnesota; Keshab K. Parhi, University of Minnesota 

10:06 

C1L-H.3 Adaptive Duplicated Filters and Interference Canceller for DS-CDMA Systems: 

Part II – FPGA Implementation ................................................................................................................ 2762 

François Nougarou, Université du Québec à Trois-Rivières; Daniel Massicotte, Université du Québec à 

Trois-Rivières; Messaoud Ahmed-Ouameur, Université du Québec à Trois-Rivières 

10:24 

C1L-H.4 A 1GHz Direct Digital Frequency Synthesizer based on the Quasi-Linear Interpolation Method .... 2766 

Ashkan Ashrafi, University of Alabama in Huntsville; Aleksandar Milenković, University of Alabama in 

Huntsville; Reza Adhami, University of Alabama in Huntsville 

10:42 

C1L-H.5 Evaluation of High Throughput Turbo-Decoder Architectures .............................................................. 2770 

Matthias May, University of Kaiserslautern; Christian Neeb, University of Kaiserslautern; Norbert Wehn, 

University of Kaiserslautern 

C1L-J VLSI Memories (Lecture) 



Chair(s): Chua-Chin Wang, National Sun Yat-sen University 

Viktor Öwall, Lund University 

9:30 

C1L-J.1 High Read Stability and Low Leakage Cache Memory Cell ................................................................. 2774 

Zhiyu Liu, University of Wisconsin-Madison; Volkan Kursun, University of Wisconsin-Madison 

9:48 

C1L-J.2 Sub-1V, Robust and Compact 6T SRAM Cell in Double Gate MOS Technology ................................. 2778 

Olivier Thomas, MINATEC; Marina Reyboz, MINATEC; Marc Belleville, MINATEC 

10:06 

C1L-J.3 Nonvolatile Flash Memories in Silicon-on-Sapphire CMOS .................................................................. 2782 

Chun-Chen Yeh, Yale University; Eugenio Culurciello, Yale University 

10:24 

C1L-J.4 Hardened by Design Techniques for Implementing Multiple-Bit Upset Tolerant Static Memories .... 2786 

Daniel R. Blum, Washington State University; José G. Delgado-Frias, Washington State University

10:42 

C1L-J.5 An Adaptive Sleep Transistor Biasing Scheme for Low Leakage SRAM ............................................ 2790 

Afshin Nourivand, Concordia University; Chunyan Wang, Concordia University; 

M. Omair Ahmad, Concordia University 

C1L-K Communications Circuits II (Lecture) 



Chair(s): Jim Haslett, University of Calgary 

Jongsoo Lee, RF Micro Devices 

9:30 

C1L-K.1 A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for 

UWB Transceivers in CMOS ...................................................................................................................... 2794 

Haolu Xie, Illinois Institute of Technology; Xin Wang, Illinois Institute of Technology; Albert Wang, Illinois 

Institute of Technology; Bo Qin, Tsinghua University; Hongyi Chen, Tsinghua University; Yumei Zhou, Chinese 

Academy of Sciences; Bin Zhao, Freescale Semiconductor 

9:48 

C1L-K.2 An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter ............... 2798 

Kiyotaka Ichiyama, Advantest Laboratories, Ltd.; Masahiro Ishida, Advantest Laboratories, Ltd.; 

Takahiro J. Yamaguchi, Advantest Laboratories, Ltd.; Mani Soma, University of Washington 

10:06 

C1L-K.3 A Multi-Band CMOS Low Noise Amplifier for Multi-Standard Wireless Receivers ............................ 2802 

Chyuen-Wei Ang, Institute of Microelectronics, National University of Singapore; Yuanjin Zheng, Institute of 

Microelectronics; Chun-Huat Heng, National University of Singapore 

10:24 

C1L-K.4 A Fully Integrated Inductorless Low Noise Amplifier with 1dB-Step Programmable Gain for 

FM Radio Receiver Front-End .................................................................................................................. 2806 

Jingyu Hu, University of Texas at Austin; Mike R. May, SigmaTel, Inc.; Matt D. Felder, SigmaTel, Inc.; 

Len DiSanza, SigmaTel, Inc.; Lawrence H. Ragan, University of Texas at Austin 

10:42 

C1L-K.5 Exploration of Energy Requirements at the Output of an LNA from a Thermodynamic Perspective ... 2810 

Mark Tuckwell, Imperial College London; Christos Papavassiliou, Imperial College London 

C1L-L Circuit Theory I (Lecture) 



Chair(s): Jorge Fernandes, Instituto de Engenharia de Sistemas 

Hanspeter Schmid, FHNW 

9:30 

C1L-L.1 State-Space Analysis of Power Complementary Analog Filters .......................................................... 2814 

Shunsuke Koshita, Tohoku University; Masahide Abe, Tohoku University; Masayuki Kawamata, Tohoku University 

9:48 

C1L-L.2 Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed 

Inductance and Switch On-Resistance ................................................................................................... 2818 

Mustafa Acar, University of Twente; Anne Johan Annema, University of Twente; Bram Nauta, University of Twente

10:06 

C1L-L.3 Optimal Synthesis of MITE Translinear Loops ........................................................................................ 2822 

Shyam Subramanian, Georgia Institute of Technology; David V. Anderson, Georgia Institute of Technology; 

Paul Hasler, Georgia Institute of Technology; Bradley A. Minch, Franklin W. Olin College of Engineering 

10:24 

C1L-L.4 Process-Independent Resistor Temperature-Coefficients using Series/Parallel and 

Parallel/Series Composite Resistors ...................................................................................................... 2826 

B. Robert Gregoire, Oregon State University; Un-Ku Moon, Oregon State University 

10:42 

C1L-L.5 Linear Current Division Principles ........................................................................................................... 2830 

Haibo Fei, Iowa State University; Randy Geiger, Iowa State University 

C1L-M Imagers (Lecture) 




Andre van Schaik, The University of Sydney 

9:30 

C1L-M.1 Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach ..... 2834 

Alexander Fish, Ben-Gurion University, University of Calgary; Tomer Rothschild, Ben-Gurion University; 

Avichay Hodes, Ben-Gurion University; Yonatan Shoshan, Ben-Gurion University, University of Calgary; 

Orly Yadid-Pecht, Ben-Gurion University, University of Calgary 

9:48 

C1L-M.2 A CMOS Front-End for a Lossy Image Compression Sensor ................................................................. 2838 

Zhiqiang Lin, University of Nebraska - Lincoln; Michael W. Hoffman, University of Nebraska - Lincoln; 

Walter D. Leon, University of Nebraska - Lincoln; Nathan Schemm, University of Nebraska - Lincoln; 

Sina Balkir, University of Nebraska - Lincoln 

10:06 

C1L-M.3 Low Fixed Pattern Noise Current-Mode Imager using Velocity Saturated Readout Transistors ..... 2842 

Zheng Yang, University of Pennsylvania; Viktor Gruev, University of Pennsylvania; Jan Van der Spiegel, 

University of Pennsylvania 

10:24 

C1L-M.4 Two Transistor Current Mode Active Pixel Sensor ................................................................................ 2846 

Viktor Gruev, University of Pennsylvania; Zheng Yang, University of Pennsylvania; Ralph Etienne-Cummings, 

Johns Hopkins University; Jan Van der Spiegel, University of Pennsylvania 

10:42 

C1L-M.5 A Self-Biased and FPN-Compensated Digital APS for Hybrid CMOS Imagers .................................... 2850 

F. Serra-Graells, Institut de Microelectrònica de Barcelona, Centro Nacional de Microelectrónica; 

J.M. Margarit, Institut de Microelectrònica de Barcelona, Centro Nacional de Microelectrónica; L. Terés, 

Institut de Microelectrònica de Barcelona, Centro Nacional de Microelectrónica 

C2L-A Wireless Circuits & Systems IV (Lecture) 



Chair(s): Byunghoo Jung, Purdue University 

Hanspeter Schmid, FHNW 

11:20 

C2L-A.1 Low-Jitter Multi-Phase Clock Generation: A Comparison between DLLs and Shift Registers ......... 2854 

Xiang Gao, University of Twente; Eric A.M. Klumperink, University of Twente; Bram Nauta, University of Twente

11:38 

C2L-A.2 On the Design of Error Cancellation Network for MASH ΣΔ-Frequency Discriminators ................... 2858 

Essam Atalla, Ain Shams University; Emad Hegazi, Ain Shams University; M. Marzouk Ibrahim, Ain Shams University 

11:56 

C2L-A.3 Design of Very Low Noise 4.2GHz Clapp VCOs ....................................................................................... 2862 

Raghuram Jonnalagedda, Qualcomm Inc.; Kartikeya Mayaram, Oregon State University 

12:14 

C2L-A.4 A 24-GHz CMOS Current-Mode Power Amplifier with High PAE and Output Power .......................... 2866 

Chung-Yu Wu, National Chiao Tung University; Shun Wei Hsu, National Chiao Tung University; Wen- 

Chieh Wang, National Chiao Tung University 

12:32 

C2L-A.5 Precise RSSI with High Process Variation Tolerance ........................................................................... 2870 

Chao Yang, Michigan State University; Andrew Mason, Michigan State University 

C2L-B SPECIAL SESSION: Enabling Technology in Drug Delivery & Clinical Care (Lecture) 



Chair(s): Jie Chen, University of Alberta, Canada 

Robert Rieger, National Sun Yat-Sen University 

11:20 

C2L-B.1 Enabling Technologies in Drug Delivery and Clinical Care ................................................................... 2874 

Andreas G. Andreou, Johns Hopkins University; Jie Chen, University of Alberta; Pau-Choo Chung, National 

Cheng Kung University; Stephen TC Wong, Harvard Medical School and Brigham & Women’s Hospital 

11:38 

C2L-B.2 Study of CuO Nanoparticle-Induced Cell Death by High Content Cellular Fluorescence 

Imaging and Analysis ................................................................................................................................ 2878 

Xiaobo Zhou, Harvard Medical School and Brigham & Women’s Hospital; Jian Chen, Harvard Medical School and 

Brigham & Women’s Hospital; Jinmin Zhu, Harvard Medical School and Brigham & Women’s Hospital; Fuhai Li, 

Harvard Medical School and Brigham & Women’s Hospital; Xudong Huang, Harvard Medical School and Brigham & 

Women’s Hospital; Stephen TC Wong, Harvard Medical School and Brigham & Women’s Hospital 

11:56 

C2L-B.3 Gold-Based Nanoparticles for Breast Cancer Diagnosis and Treatment ............................................ 2882 

James Xing, University of Alberta; Jie Zeng, University of Science and Technology of China; Jing Yang, 

University of Alberta; Tao Kong, University of Science and Technology of China; Tao Xu, University of Alberta; 

Wilson Roa, University of Alberta; Xiaoping Wang, University of Science and Technology of China; Jie Chen, 

University of Alberta 

12:14 

C2L-B.4 Localized Closed-Loop Temperature Control and Regulation in Hybrid Silicon/Silicone Life 

Science Microsystems .............................................................................................................................. 2886 

Jennifer Blain Christen, Johns Hopkins University; Brian Iglehart, Johns Hopkins School of Medicine; 

Andreas G. Andreou, Johns Hopkins University 

12:32 

C2L-B.5 Reliability Analysis of Physiological Phenomena by Cardiac Action Potential Model ..................... 2890 

Ching-Hsing Luo, National Cheng Kung University; Po-Yuan Chen, National Cheng Kung University; 

Chun-Hao Teng, National Cheng Kung University; Sheng-Nan Wu, National Cheng Kung University; 

Ruey-Jen Sung, National Cheng Kung University

C2L-C Hardware Efficient Motion Estimation/Compensation for H.264 (Lecture) 



Chair(s): Shao-Yi Chien, National Taiwan University 

Chia-Wen Lin, National Chung Cheng University 

11:20 

C2L-C.1 Architecture for Multiple Reference Frame Variable Block Size Motion Estimation ....................... 2894 

Stephen Warrington, Queen’s University; Subramania Sudharsanan, Queen’s University; Wai-Yip Chan, 

Queen’s University 

11:38 

C2L-C.2 Memory Access Reduced Software Implementation of H.264/AVC Sub-Pixel Motion 

Estimation using Differential Data Encoding ......................................................................................... 2898 

Hyojin Choi, Seoul National University; Wonchul Lee, Seoul National University; Wonyong Sung, Seoul 


11:56 

C2L-C.3 Video Segmentation with Model-Based Sprite Generation for Panning Surveillance Cameras ...... 2902 

Der-Chun Cherng, National Taiwan University; Shao-Yi Chien, National Taiwan University 

12:14 

C2L-C.4 Memory Cache based Motion Compensation Architecture for HDTV H.264/AVC Decoder ............. 2906 

Yu Li, Tsinghua University; Yanmei Qu, Tsinghua University; Yun He, Tsinghua University 

12:32 

C2L-C.5 A Hardware-Efficient Dual-Standard VLSI Architecture for MC Interpolation in AVS and H.264 .... 2910 

Dajiang Zhou, Shanghai Jiaotong University; Peilin Liu, Shanghai Jiaotong University 

C2L-D Modeling & Learning Algorithms (Lecture) 



Chair(s): Maciej Ogorzalek, University of Science and Technology 

Ronald Tetzlaff, Johann Wolfgang Goethe University 

11:20 

C2L-D.1 Models of Lava Flow Through the CNN-Based E^3 Architecture ......................................................... 2914 

P. Arena, Università degli Studi di Catania; G. Buscemi, Università degli Studi di Catania; B. Carambia, 

Università degli Studi di Catania; C. Del Negro, Istituto Nazionale di Geofisica e Vulcanologia; L. Fortuna, 

Università degli Studi di Catania; M. Frasca, Università degli Studi di Catania; A. Vicari, Istituto Nazionale di 

Geofisica e Vulcanologia 

11:38 

C2L-D.2 Applying CNN to Cheminformatics .......................................................................................................... 2918 

Christian Merkwirth, Jagiellonian University; Maciej Ogorzałek, Jagiellonian University 

11:56 

C2L-D.3 Modeling of Self-Adaptive Systems with SCADE ................................................................................... 2922 

Matthias Güdemann, Universität Augsburg; Andreas Angerer, Universität Augsburg; Frank Ortmeier, 

Universität Augsburg; Wolfgang Reif, Universität Augsburg 

12:14 

C2L-D.4 Probabilistic Modelling of Phase-Tuned Disparity Energy Neuron Populations ................................ 2926 

Eric K.C. Tsang, Hong Kong University of Science and Technology; Bertram E. Shi, Hong Kong University of 

Science and Technology

12:32 

C2L-D.5 On the Implementation of Cellular Wave Computing Methods by Hardware Learning .................... 2930 

Gunter Geis, J.W. Goethe University; Frank Gollas, J.W. Goethe University; Ronald Tetzlaff, J.W. Goethe University 

C2L-E Mixed Signal Simulation & Optimization (Lecture) 



Chair(s): Manuel Delgado Restituto, IMSE-CNM 

Mohammed Ismail, Ohio State University 

11:20 

C2L-E.1 A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits .................. 2934 

Henry H.Y. Chan, McGill University; Zeljko Zilic, McGill University 

11:38 

C2L-E.2 Scalable Gate-Level Models for Power and Timing Analysis ................................................................ 2938 

Mustafa Badaroglu, AMI Semiconductor; Geert Van der Plas, IMEC; Piet Wambacq, IMEC, V.U. Brussels; 

Stéphane Donnay, IMEC; Georges Gielen, K.U. Leuven; Hugo De Man, IMEC, K.U. Leuven 

11:56 

C2L-E.3 Power-Aware Multi-Frequency Heterogeneous SoC Test Framework Design with 

Floor-Ceiling Packing ................................................................................................................................ 2942 

Dan Zhao, University of Louisiana at Lafayette; Ronghua Huang, University of Louisiana at Lafayette; Tomokazu Yoneda, 

Nara Institute of Science and Technology; Hideo Fujiwara, Nara Institute of Science and Technology 

12:14 

C2L-E.4 A Methodology for Efficient Space-Time Adapter Design Space Exploration: 

A Case Study of an Ultra Wide Band Interleaver ................................................................................... 2946 

Cyrille Chavet, STMicroelectronics; Philippe Coussy, UBS University; Pascal Urard, STMicroelectronics; 

Eric Martin, UBS University 

12:32 

C2L-E.5 A SIMULINK Block Set for the High-Level Simulation of Multistandard Radio Receivers ............... 2950 

Alonso Morgado, Instituto de Microelectrónica de Sevilla; Rocío del Río, Instituto de Microelectrónica de 

Sevilla; José M. de la Rosa, Instituto de Microelectrónica de Sevilla 

C2L-F Frequency Response Masking Filters (Lecture) 



Chair(s): Paulo S. Diniz, Universidade Federal do Rio de Janeiro 

Zhiping Lin, Nanyang Technological University 

11:20 

C2L-F.1 FRM Filter Design with Group Delay Constraint using Second-Order Cone Programming .............. 2954 

Zhiping Lin, Nanyang Technological University; Yongzhi Liu, Nanyang Technological University 

11:38 

C2L-F.2 Complexity Reduction of FRM Filters via Multiplication-Free Prefilter-Equalizer Structures ......... 2958 

Yong Lian, National University of Singapore; Chun Zhu Yang, Nanyang Technological University; Yong 

Ching Lim, Nanyang Technological University 

11:56 

C2L-F.3 FRM-Based FIR Filters with Minimum Coefficient Sensitivities ......................................................... 2962 

Y.C. Lim, Nanyang Technological University; Y.J. Yu, Nanyang Technological University; K.L. Teo, Curtin 

University of Technology; T. Saramäki, Tampere University of Technology

12:14 

C2L-F.4 Design of Diamond and Circular Filters by Semi-Definite Programming ............................................ 2966 

T.Q. Hung, University of New South Wales; H.D. Tuan, University of New South Wales; T.Q. Nguyen, 

University of California, San Diego 

12:32 

C2L-F.5 An Online Procedure for Linear-Phase 2-D FIR Filters of Smallest Size with 

Magnitude Error Constraint ...................................................................................................................... 2970 

Xiaoping Lai, Shandong University at Weihai; Hon Keung Kwan, University of Windsor 

C2L-G SPECIAL SESSION: Convolutive Blind Signal Processing for Speech Signals (Lecture) 



Chair(s): Shoji Makino, NTT Communication Science Laboratories 

Tomohiro Nakatani, NTT Communication Science Laboratories 

11:20 

C2L-G.1 Improved Wideband Blind Adaptive System Identification using Decorrelation Filters 

for the Localization of Multiple Speakers .............................................................................................. 2974 

Anthony Lombard, University of Erlangen-Nuremberg; Herbert Buchner, University of Erlangen-Nuremberg; 

Walter Kellermann, University of Erlangen-Nuremberg 

11:38 

C2L-G.2 Performance Evaluation of Convolutive Blind Source Separation of Mixtures of 

Unequal-Level Speech Signals ................................................................................................................. 2978 

Malay Gupta, Southern Methodist University; Scott C. Douglas, Southern Methodist University 

11:56 

C2L-G.3 On Modelling the Frequency Components of Speech with Norm-Invariant Joint Densities ............. 2982 

Intae Lee, University of California, San Diego; Te-Won Lee, University of California, San Diego 

12:14 

C2L-G.4 Robust Blind Dereverberation of Speech Signals based on Characteristics of 

Short-Time Speech Segments .................................................................................................................. 2986 

Tomohiro Nakatani, NTT Corporation; Takafumi Hikichi, NTT Corporation; Keisuke Kinoshita, NTT 

Corporation; Takuya Yoshioka, NTT Corporation; Marc Delcroix, NTT Corporation; Masato Miyoshi, NTT 

Corporation; Biing-Hwang Juang, Georgia Institute of Technology 

12:32 

C2L-G.5 Joint Source-Channel Modeling and Estimation for Speech Dereverberation ................................... 2990 

Biing-Hwang Juang, Georgia Institute of Technology; Tomohiro Nakatani, NTT Corporation 

C2L-H Datapath Circuits (Lecture) 



Chair(s): Thanos Stouraitis, University of Patras 

Lars Wanhammar, Linköpings Universitet 

11:20 

C2L-H.1 Multiple-Width Bus Partitioning Approach to Datapath Synthesis ..................................................... 2994 

Arash Ahmadi, University of Southampton; Mark Zwolinski, University of Southampton 

11:38 

C2L-H.2 High-Speed/Low-Power Mixed Full Adder Chains: Analysis and Comparison versus Technology .. 2998 

Massimo Alioto, University of Siena; Gaetano Palumbo, University of Catania

11:56 

C2L-H.3 On the Hardware Reduction of z-Datapath of Vectoring CORDIC ........................................................ 3002 

R. Stapenhurst, University of Bristol; K. Maharatna, University of Southampton; J. Mathew, University of 

Bristol; J.L. Nunez-Yanez, University of Bristol; D.K. Pradhan, University of Bristol 

12:14 

C2L-H.4 Tertiary-Tree 12-GHz 32-bit Adder in 65nm Technology ....................................................................... 3006 

Amir Agah, University of Tehran; S. Mehdi Fakhraie, University of Tehran; Azita Emami-Neyestanak, 

Columbia University 

12:32 

C2L-H.5 Circuit Implementation of Floating Point Range Reduction for Trigonometric Functions .............. 3010 

Xuehai Qian, Chinese Academy of Sciences; Hao Zhang, Chinese Academy of Sciences; Jingang Yang, Chinese 

Academy of Sciences; He Huang, Chinese Academy of Sciences; Junchao Zhang, Chinese Academy of Sciences; 

Dongrui Fan, Chinese Academy of Sciences 

C2L-J VLSI Memories II (Lecture) 





11:20 

C2L-J.1 A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme .. 3014 

Byung-Do Yang, Chungbuk National University; Jae-Eun Lee, Chungbuk National University; Jang-Su Kim, 

Chungbuk National University; Junghyun Cho, Chungbuk National University; Seung-Yun Lee, Electronics and 

Telecommunication Research Institute; Byoung-Gon Yu, Electronics and Telecommunication Research Institute 

11:38 

C2L-J.2 Comparison of Dual-Vt Configurations of SRAM Cell Considering Process-Induced Vt Variations .... 3018 

Jungseob Lee, University of Wisconsin-Madison; Azadeh Davoodi, University of Wisconsin-Madison 

11:56 

C2L-J.3 A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation .. 3022 

Bastien Giraud, Institut Supérieur d’Électronique de Paris; Amara Amara, Institut Supérieur d’Électronique de 

Paris; Andrei Vladimirescu, Institut Supérieur d’Électronique de Paris and University of California at Berkeley 

12:14 

C2L-J.4 High Speed, Minimal Area, and Low Power SEC Code for DRAMs with Large I/O Data Widths ..... 3026 

Sang-uhn Cha, Yonsei University; Hongil Yoon, Yonsei University 

12:32 

C2L-J.5 A Self-Biased Charge-Transfer Sense Amplifier ..................................................................................... 3030 

Sandeep Patil, University of Rochester; Michael Wieckowski, University of Rochester; 


C2L-K Communications Circuits III (Lecture) 



Chair(s): Jongsoo Lee, RF Micro Devices 


11:20 

C2L-K.1 A 12-mW Fully Integrated Low-IF Dual-Band GPS Receiver on 0.13-μm CMOS ................................ 3034 

Tamer A. Abdelrahim, Ain Shams University; Tarek Elesseily, Ain Shams University; 

Ahmed Saad Abdou, Ain Shams University; Khalid M.W. Saraf, Ain Shams University

11:38 

C2L-K.2 A CMOS Integrated Power Detector for UWB ........................................................................................ 3039 

Kenneth A. Townsend, University of Calgary; James W. Haslett, University of Calgary; 

John Nielsen, University of Calgary 

11:56 

C2L-K.3 4.7pJ/Pulse 7th Derivative Gaussian Pulse Generator for Impulse Radio UWB ............................... 3043 

Tuan-Anh Phan, Information and Communications University; Vladimir Krizhanovskii, Information and 

Communications University; Seok-Kyun Han, Information and Communications University; Sang-Gug Lee, 

Information and Communications University; Hyun-seo Oh, Electronics and Telecommunication Research 

Institute; Nae-Soo Kim, Electronics and Telecommunication Research Institute 

12:14 

C2L-K.4 A 40 GHz Quadrature LC VCO and Frequency Divider in 90-nm CMOS Technology .......................... 3047 

Muhammad Usama, Carleton University; Tad A. Kwasniewski, Carleton University 

12:32 

C2L-K.5 A Fractional-N PLL for Digital Clock Generation with an FIR-Embedded Frequency Divider ........... 3051 

Baoyong Chi, Tsinghua University; Xueyi Yu, Tsinghua University; Woogeun Rhee, Tsinghua University; 

Zhihua Wang, Tsinghua University 

C2L-L Interface & Sensing Circuits (Lecture) 



Chair(s): Ramesh Harjani, University of Minnesota 

Hoi Lee, University of Texas at Dallas 

11:20 

C2L-L.1 A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier 

Operating over Seven Decades of Current ............................................................................................. 3055 

Arindam Basu, Georgia Institute of Technology; Ryan Robucci, Georgia Institute of Technology; Paul Hasler, 

Georgia Institute of Technology 

11:38 

C2L-L.2 Ultra Low Power CMOS PLL Clock Synthesizer for Wireless Sensor Nodes ....................................... 3059 

Adnan Gundel, New Jersey Institute of Technology and TLSI, Inc.; William N. Carr, New Jersey Institute of Technology 

11:56 

C2L-L.3 An Unconstrained Architecture for High-Order ΣΔ Force-Feedback Inertial Sensors ....................... 3063 

J. Raman, Ghent University; P. Rombouts, Ghent University; L. Weyten, Ghent University 

12:14 

C2L-L.4 A Micropower Voltage, Current, and Temperature Reference for a Low-Power 

Capacitive Sensor Interface ..................................................................................................................... 3067 

Matti Paavola, Helsinki University of Technology; Mikko Saukoski, Helsinki University of Technology; Mika Laiho, 

Helsinki University of Technology and University of Turku; Kari Halonen, Helsinki University of Technology 

12:32 

C2L-L.5 High Precision 16-bit Readout Gas Sensor Interface in 0.13μm CMOS ............................................. 3071 

Balaji Jayaraman, Indian Institute of Science; Navakanta Bhat, Indian Institute of Science

C2L-M Vision Systems (Lecture) 



Chair(s): John Harris, University of Florida 


11:20 

C2L-M.1 An AER Contrast Retina with On-Chip Calibration ................................................................................ 3075 

J. Costas-Santos, Instituto de Microelectrónica de Sevilla; Teresa Serrano-Gotarredona, Instituto de 

Microelectrónica de Sevilla; Rafael Serrano-Gotarredona, Instituto de Microelectrónica de Sevilla; 

Bernabe Linares-Barranco, Instituto de Microelectrónica de Sevilla 

11:38 

C2L-M.2 Motion Detection Circuits for a Time-to-Travel Algorithm .................................................................... 3079 

Rico Moeckel, University of Zürich and ETH Zürich; Shih-Chii Liu, University of Zürich and ETH Zürich 

11:56 

C2L-M.3 A Spike-Based Saccadic Recognition System ....................................................................................... 3083 

Matthias Oster, University of Zürich and ETH Zürich; Patrick Lichtsteiner, University of Zürich and ETH Zürich; 

Tobias Delbrück, University of Zürich and ETH Zürich; Shih-Chii Liu, University of Zürich and ETH Zürich 

12:14 

C2L-M.4 A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for 

Z-Motion Detection Applications ............................................................................................................. 3087 

Chung-Yu Wu, National Chiao Tung University; Chien-Ta Huang, National Chiao Tung University 

12:32 

C2L-M.5 Dichromatic Spectral Measurement Circuit in Vanilla CMOS .............................................................. 3091 

D.B. Fasnacht, Institute of Neuroinformatics, UNI-ETH Zürich; T. Delbruck, Institute of 

Neuroinformatics, UNI-ETH Zürich 

C3L-A Wireless Circuits & Systems V (Lecture) 



Chair(s): Ethan Farquhar, University of Tennessee 

Jose Silva-Martinez, Texas A&M University 

14:30 

C3L-A.1 A Nonlinear Model for Phase Noise and Jitter in LC Oscillators .......................................................... 3095 

Jeffrey Johnson, University of California, Irvine; Vipul Jain, University of California, Irvine; Payam Heydari, 

University of California, Irvine 

14:48 

C3L-A.2 A Low Power BFSK Super-Regenerative Transceiver ............................................................................ 3099 

James Ayers, Oregon State University; Kartikeya Mayaram, Oregon State University; Terri S. Fiez, Oregon 

State University 

15:06 

C3L-A.3 A 0.18µm CMOS 2.1GHz Sub-Sampling Receiver Front End with Fully Integrated 

Second- and Fourth-Order Q-Enhanced Filters ....................................................................................... 3103 

Holly Pekau, University of Calgary; James W. Haslett, University of Calgary 

15:24 

C3L-A.4 Diophantine Frequency Synthesis the Mathematical Principles ......................................................... 3107 

Paul P. Sotiriadis, Johns Hopkins University

15:42 

C3L-A.5 A Low Jitter CMOS PLL Clock Synthesizer with 20-400 MHz Locking Range .................................... 3111 

Adnan Gundel, New Jersey Institute of Technology and TLSI, Inc.; William N. Carr, New Jersey Institute of Technology 

C3L-B SPECIAL SESSION: Integrated Neural Implants (Lecture) 



Chair(s): Roman Genov, University of Toronto 

Reid Harrison, University of Utah 

14:30 

C3L-B.1 In Vitro Epileptic Seizure Prediction Microsystem ................................................................................ 3115 

J. Aziz, University of Toronto; R. Karakiewicz, University of Toronto; R. Genov, University of Toronto; 

A.W.L Chiu, University of Toronto; B.L. Bardakjian, University of Toronto; M. Derchansky, University of 

Toronto; P.L. Carlen, University of Toronto 

14:48 

C3L-B.2 Implantable MEMS Accelerometer Microphone for Cochlear Prosthesis .......................................... 3119 

Darrin J. Young, Case Western Reserve University; Mark A. Zurcher, Case Western Reserve University; 

Wen H. Ko, Case Western Reserve University; Maroun Semaan, University Hospital of Cleveland; 

Cliff A. Megerian, University Hospital of Cleveland 

15:06 

C3L-B.3 Spike Discrimination using Amplitude Measurements with a Low-Power 

CMOS Neural Amplifier ............................................................................................................................. 3123 

Timothy Horiuchi, University of Maryland; Dorielle Tucker, University of South Florida; Kevin Boyle, 

Massachusetts Institute of Technology; Pamela Abshire, University of Maryland 

15:24 

C3L-B.4 Using Pulse Width Modulation for Wireless Transmission of Neural Signals in a 

Multichannel Neural Recording System ................................................................................................. 3127 

Ming Yin, North Carolina State University; Maysam Ghovanloo, North Carolina State University 

15:42 

C3L-B.5 A Wireless IC for Wide-Range Neurochemical Monitoring using Amperometry and 

Fast-Scan Cyclic Voltammetry ................................................................................................................. 3131 

Masoud Roham, Case Western Reserve University; Pedram Mohseni, Case Western Reserve University 

C3L-C Hardware & Efficient Video Codec for H.264 & AVS (Lecture) 



Chair(s): Bin-Da Liu, National Cheng Kung University 

Xiaoquan Yi, Google 

14:30 

C3L-C.1 Combined Decoding and Flexible Transform Designs for Effective H.264/AVC Decoders .............. 3135 

Yi-Chih Chao, National Cheng Kung University; Shih-Tse Wei, National Cheng Kung University; Jar- 

Ferr Yang, National Cheng Kung University; Bin-Da Liu, National Cheng Kung University 

14:48 

C3L-C.2 A High-Speed/Low-Power Multiplier using an Advanced Spurious Power Suppression Technique ... 3139 

Kuan-Hung Chen, National Chung Cheng University; Yuan-Sun Chu, National Chung Cheng University; Jiun- 

In Guo, National Chung Cheng University; Yu-Min Chen, National Chung Cheng University

15:06 

C3L-C.3 Statistical Analysis based H.264 High Profile Deblocking Speedup .................................................. 3143 

Jian Lou, University of Washington; Ashish Jagmohan, IBM T.J. Watson Research Center; Dake He, IBM T.J. 

Watson Research Center; Ligang Lu, IBM T.J. Watson Research Center; Ming-Ting Sun, University of Washington 

15:24 

C3L-C.4 Context-Based Arithmetic Coding Reexamined for DCT Video Compression .................................... 3147 

Li Zhang, Chinese Academy of Sciences; Xiaolin Wu, McMaster University; Ning Zhang, McMaster University; 

Wen Gao, Chinese Academy of Sciences and Harbin Institute of Technology; Qiang Wang, Harbin Institute of 

Technology; Debin Zhao, Chinese Academy of Sciences and Harbin Institute of Technology 

15:42 

C3L-C.5 An Area-Efficient VLSI Implementation of CA-2D-VLC Decoder for AVS ............................................. 3151 

Ke Zhang, Zhejiang University; Xiao-Yang Wu, Zhejiang University; Lu Yu, Zhejiang University 

C3L-D Theory & Bio-Inspired Algorithms of Cellular Neural Networks (Lecture) 



Chair(s): Pier Paolo Civalleri, Politecnico di Torino 

Marco Gilli, Politecnico di Torino 

14:30 

C3L-D.1 A Study on Convergence of Competitive CNNs ...................................................................................... 3155 

M. Di Marco, University of Siena; M. Forti, University of Siena; M. Grazzini, University of Siena; P. Nistri, 

University of Siena; L. Pancioni, University of Siena 

14:48 

C3L-D.2 Sufficient Conditions for 1-D CNNs with Opposite-Sign Templates to Perform Connected 

Component Detection ............................................................................................................................... 3159 

Norikazu Takahashi, Kyushu University; Ken Ishitobi, Kyushu University; Tetsuo Nishi, Waseda University 

15:06 

C3L-D.3 Limit Cycles and Bifurcations in Nonlinear Oscillatory Networks ....................................................... 3163 

Fernando Corinto, Politecnico di Torino; Valentina Lanza, Politecnico di Torino; Marco Gilli, Politecnico di Torino 

15:24 

C3L-D.4 Small Amplitude, Phase Locked Response in Oscillatory Networks with Delays .............................. 3167 

Michele Bonnin, Politecnico di Torino; Fernando Corinto, Politecnico di Torino; Marco Gilli, Politecnico di 

Torino; Pier Paolo Civalleri, Politecnico di Torino 

15:42 

C3L-D.5 Active Visual Tracking of Heading Direction by Combining Motion Energy Neurons ....................... 3171 

Stanley Y.M. Lam, Hong Kong University of Science and Technology; Bertram E. Shi, Hong Kong University of 


C3L-E OFDM/CDMA Systems (Lecture) 



Chair(s): Xinping Huang, Communication Research Center 

Foo Say Wei, Nanyang Technological University 

14:30 

C3L-E.1 Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation ...... 3175 

Shingo Yoshizawa, Hokkaido University; Yoshikazu Miyanaga, Hokkaido University

14:48 

C3L-E.2 A Low-Cost Phase-Noise Cancellation Method for OFDM Systems ..................................................... 3179 

Dengwei Fu, Tone Technologies 

15:06 

C3L-E.3 Fractionally Spaced Orthogonal Frequency Division Multiplexing Systems ...................................... 3183 

Chen Meng, University of California, Davis; Jamal Tuqan, University of California, Davis 

15:24 

C3L-E.4 Adaptive Duplicated Filters and Interference Canceller for DS-CDMA Systems: 

Part I – Algorithm ...................................................................................................................................... 3187 

François Nougarou, Université du Québec à Trois-Rivières; Messaoud Ahmed-Ouameur, Université du Québec 

à Trois-Rivières; Daniel Massicotte, Université du Québec à Trois-Rivières 

15:42 

C3L-E.5 Breakdown Point Analysis of a New M-Estimator for Robust Multiuser Detection in 

Non-Gaussian Channels ............................................................................................................................ 3191 

T. Anil Kumar, Kakatiya Institute of Technology and Science; K. Deergha Rao, Osmania University 

C3L-F Hardware Oriented Digital Signal Processing (Lecture) 



Chair(s): Mohsin M. Jamali, University of Toledo 

Yong Lian, National University of Singapore 

14:30 

C3L-F.1 A Multiplier Structure based on a Novel Real-Time CSD Recoding ..................................................... 3195 

Yunhua Wang, University of Oklahoma; Linda S. DeBrunner, Florida State University; Dayong Zhou, 

University of Oklahoma; Victor E. DeBrunner, Florida State University 

14:48 

C3L-F.2 High Speed and Area-Efficient Multiply Accumulate (MAC) Unit for Digital Signal 

Prossing Applications ............................................................................................................................... 3199 

A. Abdelgawad, University of Louisiana at Lafayette; Magdy Bayoumi, University of Louisiana at Lafayette 

15:06 

C3L-F.3 Scaled Lifting Scheme and Generalized Reversible Integer Transform ............................................. 3203 

Soo-Chang Pei, National Taiwan University; Jian-Jiun Ding, National Taiwan University 

15:24 

C3L-F.4 Novel Sparse OBC based Distributed Arithmetic Architecture for Matrix Transforms ..................... 3207 

S. Chandrasekaran, Brunel University; A. Amira, Brunel University 

15:42 

C3L-F.5 Low-Power Adaptive Filter based on RNS Components ....................................................................... 3211 

G.L. Bernocchi, University of Rome Tor Vergata; G.C. Cardarilli, University of Rome Tor Vergata; 

A. Del Re, University of Rome Tor Vergata; A. Nannarelli, Technical University of Denmark; 

M. Re, University of Rome Tor Vergata

C3L-G SPECIAL SESSION: The Future of Nanometer SoC Design – 

Grand Challenges & Opportunities (Lecture) 



Chair(s): Mohab Anis, University of Waterloo 


14:30 

C3L-G.1 Variability in VLSI Circuits: Sources and Design Considerations ........................................................ 3215 

Mohamed H. Abu-Rahma, University of Waterloo; Mohab Anis, University of Waterloo 

14:48 

C3L-G.2 Variability-Aware Synthesis for Wideband Low Noise Amplifiers ........................................................ 3219 

Yehia Massoud, Rice University; Arthur Nieuwoudt, Rice University; Tamer Ragheb, Rice University 

15:06 

C3L-G.3 Attaining Thermal Integrity in Nanometer Chips ................................................................................... 3223 

Ja Chun Ku, Northwestern University; Yehea Ismail, Northwestern University 

15:24 

C3L-G.4 Substrate Noise Reduction based on Noise Aware Cell Design .......................................................... 3227 

Emre Salman, University of Rochester; Eby G. Friedman, University of Rochester; Radu M. Secareanu, 

Freescale Semiconductor; Olin L. Hartin, Freescale Semiconductor 

15:42 

C3L-G.5 Leakage-Aware Design of Nanometer SoC ............................................................................................ 3231 

Volkan Kursun, University of Wisconsin-Madison; Sherif A. Tawfik, University of Wisconsin-Madison; 

Zhiyu Liu, University of Wisconsin-Madison 

C3L-H Blind Signal Processing & Applications (Lecture) 




Milutin Stanacevic, Stony Brook University 

14:30 

C3L-H.1 ECG Cancellation for Surface Electromyography Measurement using 

Independent Component Analysis ........................................................................................................... 3235 

Yong Hu, University of Hong Kong; Joseph Mak, University of Hong Kong; Hongtao Liu, University of Hong 

Kong; Keith DK Luk, University of Hong Kong 

14:48 

C3L-H.2 Linear Prediction based Semi-Blind Channel Estimation for MIMO-OFDM System .......................... 3239 

Feng Wan, Concordia University; Wei-Ping Zhu, Concordia University; M.N.S. Swamy, Concordia University 

15:06 

C3L-H.3 Noisy Component Extraction (NoiCE) ...................................................................................................... 3243 

Wai Yie Leong, Imperial College London; Danilo P. Mandic, Imperial College London 

15:24 

C3L-H.4 Measuring Dependence of Bin-Wise Separated Signals for Permutation Alignment in 

Frequency-Domain BSS ............................................................................................................................ 3247 

Hiroshi Sawada, NTT Corporation; Shoko Araki, NTT Corporation; Shoji Makino, NTT Corporation

15:42 

C3L-H.5 Closed Form Parameters Estimation for Near Field Sources .............................................................. 3251 

Ke Deng, Xi’an Jiaotong University; Qinye Yin, Xi’an Jiaotong University; Huiming Wang, Xi’an Jiaotong University 

C3L-J Arithmetic Circuits (Lecture) 



Chair(s): Charles Cavanaugh, University of Louisiana at Lafayette 

Koushik Maharatna, University of Southampton 

14:30 

C3L-J.1 Design of Fast Large Fan-In CMOS Multiplexers Accounting for Interconnects ............................... 3255 

Massimo Alioto, University of Siena; Gaetano Palumbo, University of Catania 

14:48 

C3L-J.2 Application of Bit-Level Pipelining to Delay Insensitive Null Convention Adders .............................. 3259 

A. Neslin Ismailoglu, TUBITAK-BILTEN; Murat Askar, Middle East Technical University 

15:06 

C3L-J.3 Digital Multiplication using Continuous Valued Digits ......................................................................... 3263 

Mitra Mirhassani, University of Windsor; Majid Ahmadi, University of Windsor; 

Graham A. Jullien, University of Calgary 

15:24 

C3L-J.4 An Asynchronous Dual-Rail Multiplier based on Energy-Efficient STFB Templates .......................... 3267 

Kok-Leong Chang, Nanyang Technological University; Bah-Hwee Gwee, Nanyang Technological University; 

Yuanjin Zheng, Institute of Microelectronics 

15:42 

C3L-J.5 Novel High-Speed Redundant Binary to Binary Converter using Prefix Networks ............................ 3271 

Sreehari Veeramachaneni, International Institute of Information Technology, Hyderabad; M. Kirthi Krishna, 

International Institute of Information Technology, Hyderabad; Lingamneni Avinash, International Institute of 

Information Technology, Hyderabad; Sreekanth Reddy P, International Institute of Information Technology, 

Hyderabad; M.B. Srinivas, International Institute of Information Technology, Hyderabad 

C3L-K Cellular Circuits (Lecture) 




Chang-Ho Lee, Samsung 

14:30 

C3L-K.1 A Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for 

Wireless Transmitters ............................................................................................................................... 3275 

Viral K. Parikh, University of Texas at Dallas; Poras T. Balsara, University of Texas at Dallas; 

Oren Eliezer, Texas Instruments Inc.; Jaimin Mehta, Texas Instruments Inc. 

14:48 

C3L-K.2 A Low Area and Low Power Digital Band-Pass Sigma-Delta Modulator for 

Wireless Transmitters ............................................................................................................................... 3279 

Viral K. Parikh, University of Texas at Dallas; Poras T. Balsara, University of Texas at Dallas; 

Oren Eliezer, Texas Instruments Inc.; Jaimin Mehta, Texas Instruments Inc. 

15:06 

C3L-K.3 CMOS High Power SPDT Switch using Multigate Structure ................................................................. 3283 

Minsik Ahn, Georgia Institute of Technology; Chang-Ho Lee, Georgia Tech; Joy Laskar, Georgia Institute of Technology

15:24 

C3L-K.4 A Low Phase Noise Quad-Band CMOS VCO with Minimized Gain Variation for GSM/GPRS/EDGE ... 3287 

Sohrab Samadian, Skyworks Solutions Inc. 

15:42 

C3L-K.5 Injection Spurs due to Reference Frequency Retiming by a Channel Dependent Clock at the 

ADPLL RF Output and its Mitigation ....................................................................................................... 3291 

Khurram Waheed, Texas Instruments, Inc.; Robert Bogdan Staszewski, Texas Instruments, Inc.; 

John Wallberg, Texas Instruments, Inc. 

C3L-L Continuous-Time Filters I (Lecture) 



Chair(s): Andreas G. Andreou, Johns Hopkins University 

Rob Fox, University of Florida 

14:30 

C3L-L.1 An Adaptive Quality-Factor Bandpass Filter .......................................................................................... 3295 

Kofi M. Odame, Georgia Institute of Technology; Paul Hasler, Georgia Institute of Technology 

14:48 

C3L-L.2 A Compact On-Chip Capacitive-Coupling Scheme for Very-Low Frequency Applications ................ 3299 

Jader A. De Lima, Freescale Semiconductor 

15:06 

C3L-L.3 A Practical CMOS Companding Sinh Lossy Integrator ......................................................................... 3303 

A.G. Katsiamis, Imperial College London; H.M.D. Ip, Imperial College London; 

E.M. Drakakis, Imperial College London 

15:24 

C3L-L.4 A 0.18µm CMOS 300MHz Current-Mode LF Seventh-Order Linear Phase Filter for 

Hard Disk Read Channels ......................................................................................................................... 3307 

Xi Zhu, University of Hertfordshire; Yichuang Sun, University of Hertfordshire; 

James Moritz, University of Hertfordshire 

15:42 

C3L-L.5 Design of Systems with Prescribed Impulse Response based on 

Second-Order Cone Programming ........................................................................................................... 3311 

Mladen Vucic, University of Zagreb; Goran Molnar, University of Zagreb 

C3L-M Sensors (Lecture) 



Chair(s): Bernabe Linares-Barranco, Instituto de Microelectronica de Sevilla 

Shih-Chii Liu, ETH Zurich 

14:30 

C3L-M.1 Single-Wafer Pressure Capacitive Sensor .............................................................................................. 3315 

R.G. Bolea, University of Seville; A. Luque, University of Seville; J.M. Quero, University of Seville 

14:48 

C3L-M.2 CMOS Cantilever-Based Oscillator for Attogram Mass Sensing ......................................................... 3319 

J. Verd, Universitat Autònoma de Barcelona; A. Uranga, Universitat Autònoma de Barcelona; J. Teva, 

Universitat Autònoma de Barcelona; G. Abadal, Universitat Autònoma de Barcelona; F. Torres, Universitat 

Autònoma de Barcelona; F. Pérez-Murano, Institute de Microelectrónica de Barcelona; J. Esteve, Institute de 

Microelectrónica de Barcelona; N. Barniol, Universitat Autònoma de Barcelona

15:06 

C3L-M.3 Simultaneous Measurement of Temperature and Lateral Force using an Arc-Shaped 

FBG Sensor Module ................................................................................................................................... 3323 

Z. Cai, Institute for Infocomm Research; J. Hao, Institute for Infocomm Research; S. Takahashi, Institute for 

Infocomm Research; J.H. Ng, Institute for Infocomm Research; Y. Gong, Institute for Infocomm Research; 

P. Varghese, Institute for Infocomm Research 

15:24 

C3L-M.4 Leakage-Based On-Chip Thermal Sensor for CMOS Technology ......................................................... 3327 

Pablo Ituero, Ciudad Universitaria s/n; José L. Ayala, Ciudad Universitaria s/n; 

Marisa López-Vallejo, Ciudad Universitaria s/n 

15:42 

C3L-M.5 A Novel Voltage-Clamped CMOS ISFET Sensor Interface ..................................................................... 3331 

Leila Shepherd, Imperial College London; Pantelis Georgiou, Imperial College London; 

zChris Toumazou, Imperial College London 

C4L-A IC Technology (Lecture) 



Chair(s): David Graham, West Virginia University 

Tuna Tarim, Texas Instruments Inc. 

16:20 

C4L-A.1 Improvement of Bootstrapped Switch using Track and Precharge Phase ......................................... 3335 

Nicodimus Retdian, Tokyo Institute of Technology; Shigetaka Takagi, Tokyo Institute of Technology; 

Nobuo Fujii, Tokyo Institute of Technology 

16:38 

C4L-A.2 High-Voltage Analog Circuit Design using Thin-Oxide MOS Devices Only .......................................... 3339 

Dongwon Seo, Qualcomm Inc.; Yuhua Guo, Qualcomm Inc.; Manu Mishra, Qualcomm Inc. 

16:56 

C4L-A.3 High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique .......................... 3343 

R. Chebli, École Polytechnique de Montréal; M. Sawan, École Polytechnique de Montréal; Y. Savaria, École 

Polytechnique de Montréal; K. El-Sankary, Dahhousie University 

17:14 

C4L-A.4 A Circuit-Based Noise Parameter Extraction Technique for MOSFETs ............................................... 3347 

Reza Navid, Rambus Inc. and Stanford University; Thomas H. Lee, Stanford University; 

Robert W. Dutton, Stanford University 

17:32 

C4L-A.5 Monolithic Spiral Transformers: A Design Methodology ...................................................................... 3351 

Jeffrey S. Walling, University of Washington; David J. Allstot, University of Washington 

C4L-B SPECIAL SESSION: Neuromimetic ICs with Analog Cores for 

Spiking Neural Networks (Lecture) 



Chair(s): Tor Sverre Lande, University of Oslo 

Sylvie Renaud, University Bordeaux 

16:20 

C4L-B.1 Neuromimetic ICs with Analog Cores: An Alternative for Simulating Spiking Neural Networks ..... 3355 

Sylvie Renaud, University Bordeaux 1 - CNRS/ENSEIRB; Jean Tomas, University Bordeaux 1 - CNRS/ENSEIRB; 

Yannick Bornat, University Bordeaux 1 - CNRS/ENSEIRB; Adel Daouzli, University Bordeaux 1 - 

CNRS/ENSEIRB; Sylvain Saïghi, University Bordeaux 1 - CNRS/ENSEIRB

16:38 

C4L-B.2 Transistor Channel Dendrites Implementing HMM Classifiers ............................................................ 3359 

Paul Hasler, Georgia Institute of Technology; Scott Kozoil, Georgia Institute of Technology; 

Ethan Farquhar, University of Tennessee; Arindam Basu, Georgia Institute of Technology 

16:56 

C4L-B.3 Silicon Neurons that Burst when Primed ................................................................................................ 3363 

Kai M. Hynna, University of Pennsylvania; Kwabena Boahen, University of Pennsylvania 

17:14 

C4L-B.4 Modeling Synaptic Plasticity within Networks of Highly Accelerated I&F Neurons ......................... 3367 

Johannes Schemmel, University of Heidelberg; Daniel Brüederle, University of Heidelberg; 

Karlheinz Meier, University of Heidelberg; Boris Ostendorf, University of Heidelberg 

17:32 

C4L-B.5 Spike-Based Learning in VLSI Networks of Integrate-and-Fire Neurons ............................................ 3371 

Giacomo Indiveri, University-ETH Zürich; Stefano Fusi, University-ETH Zürich 

C4L-C Nyquist Data Conversion I (Lecture) 



Chair(s): Vadim Ivanov, Texas Instruments 

Jin Liu, University of Texas, Dallas 

16:20 

C4L-C.1 On the Compensation of Magnitude Response Mismatches in M-Channel Time-Interleaved ADCs ... 3375 

Stefan Mendel, Graz University of Technology; Christian Vogel, Graz University of Technology 

16:38 

C4L-C.2 A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS ............. 3379 

Soon-Ik Cho, Korea University; Suki Kim, Korea University; Shin-Il Lim, Seokyeong University; Kwang- 

Hyun Baek, Chung-Ang University 

16:56 

C4L-C.3 Improved Background Algorithms for Pipeline ADC Full Calibration .................................................. 3383 

Antonio J. Ginés, University of Seville; Eduardo J. Peralías, University of Seville; 

Adoracíon Rueda, University of Seville 

17:14 

C4L-C.4 A Distortion Model for Pipeline Analog-to-Digital Converters .............................................................. 3387 

Francesco Centurelli, University of Rome “La Sapienza”; Pietro Monsurrò, University of Rome “La Sapienza”; 

Alessandro Trifiletti, University of Rome “La Sapienza” 

17:32 

C4L-C.5 A Pipelined A/D Conversion Technique with Low INL and DNL ........................................................... 3391 

Jingbo Duan, Tsinghua University; Fule Li, Tsinghua University; Liyuan Liu, Tsinghua University; Dongmei Li, 

Tsinghua University; Yongming Li, Tsinghua University; Zhihua Wang, Tsinghua University

C4L-D Graph Theory & Computing in Circuits & Systems I (Lecture) 



Chair(s): M.N.S. Swamy, Concordia University 

Krishnaiyan Thulasiraman, University of Oklahoma 

16:20 

C4L-D.1 Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity ..... 3395 

Jin-Tai Yan, Chung-Hua University; Zhi-Wei Chen, Chung-Hua University; Ming-Yuen Wu, Chung-Hua University 

16:38 

C4L-D.2 On the Complexity of Three-Dimensional Channel Routing (Extended Abstract) .............................. 3399 

Satoshi Tayu, Tokyo Institute of Technology; Shuichi Ueno, Tokyo Institute of Technology 

16:56 

C4L-D.3 Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair .................................... 3403 

Masaya Takahashi, Fukuoka Institute of Technology; Takahiro Watanabe, Waseda University; 

Takeshi Yoshimura, Waseda University 

17:14 

C4L-D.4 Application of Fast DC Analysis to Partitioning Hypergraphs .............................................................. 3407 

Gaurav Trivedi, Indian Institute of Technology Bombay; H.M.D. Narayanan, Indian Institute of Technology Bombay 

17:32 

C4L-D.5 Unified Quadratic Programming Approach for 3-D Mixed Mode Placement ..................................... 3411 

Haixia Yan, Tsinghua University; Zhuoyuan Li, Tsinghua University; Xianlong Hong, Tsinghua University; 

Qiang Zhou, Tsinghua University 

C4L-E Image & Video Processing I (Lecture) 



Chair(s): C. W. Kok, Hong Kong University of Science & Technology 

Daniel P.-K. Lun, Polytechnic University of Hong Kong 

16:20 

C4L-E.1 A Pipelined Architecture Design for Trilateral Noise Filtering ............................................................. 3415 

Wen-Chung Kao, National Taiwan Normal University; Hong-Shuo Tai, National Taiwan Normal University; 

Chia-Pin Shen, National Taiwan Normal University; Jia-An Ye, National Taiwan Normal University; 

Hong-Fa Ho, National Taiwan Normal University 

16:38 

C4L-E.2 A PDP Sub-Field Coding Algorithm for the Reduction of Errors due to Line Load Variation ............ 3419 

Jin-Sung Kim, Seoul National University; Hyuk-Jae Lee, Seoul National University 

16:56 

C4L-E.3 An Adaptive Block Size Phase Correlation Motion Estimation using Adaptive Early Search 

Termination Technique ............................................................................................................................. 3423 

Yasser Ismail, University of Louisiana at Lafayette; Mohsen Shaaban, University of Louisiana at Lafayette; 

Magdy Bayoumi, University of Louisiana at Lafayette 

17:14 

C4L-E.4 A Fast and Reliable Switching Median Filter for Highly Corrupted Images by Impulse Noise ........ 3427 

Wei Ping, Zhejiang University; Li Junli, Ningbo University; Lu Dongming, Zhejiang University; Chen Gang, 

Zhejiang University

17:32 

C4L-E.5 An OWE-Based Algorithm for Line Scratches Restoration in Old Movies ........................................... 3431 

Jin Xu, Shanghai Jiao Tong University; Jinghuo Guan, Shanghai Jiao Tong University; Xingdong Wang, 

Shanghai Jiao Tong University; Jun Sun, Shanghai Jiao Tong University; Guangtao Zhai, Shanghai Jiao Tong 

University; Zhengguo Li, Institute for Infocomm Research 

C4L-F FIR & Fractional Delay Filters (Lecture) 



Chair(s): H. K. Kwan, University of Windsor 

Tapio Saramaki, Tampere University of Technology 

16:20 

C4L-F.1 High-Speed and Low-Cost Structures for Implementing Odd-Order Lagrange-Type Variable 

Fractional-Delay Filters ............................................................................................................................. 3435 

Tian-Bo Deng, Toho University 

16:38 

C4L-F.2 A Simplified Structure for FIR Filters with an Adjustable Fractional Delay ....................................... 3439 

Juha Yli-Kaakinen, Tampere University of Technology; Tapio Saramäki, Tampere University of Technology 

16:56 

C4L-F.3 Design of Allpass Fractional Delay Filter and Fractional Hilbert Transformer using 

Closed-Form of Cepstral Coefficients ..................................................................................................... 3443 

Soo-Chang Pei, National Taiwan University; Huei-Shan Lin, National Taiwan University; 

Peng-Hua Wang, National Taipei University 

17:14 

C4L-F.4 Closed-Form Design of Variable Fractional Order Integrator using Complex Cepstrum .................. 3447 

C.C. Tseng, National Kaohsiung First University of Science and Technology 

17:32 

C4L-F.5 A Greedy Common Subexpression Elimination Algorithm for Implementing FIR Filters .................. 3451 

S. Vijay, National Institute of Technology; A.P. Vinod, Nanyang Technological University; 

Edmund M-K. Lai, Massey University 

C4L-G SPECIAL SESSION: Resource & Content Aware Video 

Streaming/Adaptation over Networks (Lecture) 



Chair(s): Chia-Wen Lin, National Chung Cheng University 

Enrico Magli, Politecnico di Torino 

16:20 

C4L-G.1 Using H.264/AVC-Based Scalable Video Coding (SVC) for Real Time 

Streaming in Wireless IP Networks ......................................................................................................... 3455 

Thomas Schierl, Fraunhofer Institute for Telecommunications – Heinrich-Hertz-Institut; Cornelius Hellge, 

Fraunhofer Institute for Telecommunications – Heinrich-Hertz-Institut; Shpend Mirta, Fraunhofer Institute for 

Telecommunications – Heinrich-Hertz-Institut; Karsten Grüneberg, Fraunhofer Institute for Telecommunications – 

Heinrich-Hertz-Institut; Thomas Wiegand, Fraunhofer Institute for Telecommunications – Heinrich-Hertz-Institut 

16:38 

C4L-G.2 Fast Mode Decision Algorithms for Adaptive GOP Structure in the Scalable 

Extension of H.264/AVC ........................................................................................................................... 3459 

Chih-Wei Chiou, National Chung Cheng University; Chia-Ming Tsai, National Chung Cheng University; 

Chia-Wen Lin, National Chung Cheng University

16:56 

C4L-G.3 Scalable Video Streaming over Mobile WiMAX ..................................................................................... 3463 

Hung-Hui Juan, National Chiao Tung University; Hsiang-Chun Huang, National Chiao Tung University; 

ChingYao Huang, National Chiao Tung University; Tihao Chiang, National Chiao Tung University 

17:14 

C4L-G.4 Sliding-Window Digital Fountain Codes for Streaming of Multimedia Contents .............................. 3467 

Mattia C.O. Bogino, Politecnico di Torino; Pasquale Cataldi, Politecnico di Torino; Marco Grangetto, 

Politecnico di Torino; Enrico Magli, Politecnico di Torino; Gabriella Olmo, Politecnico di Torino 

17:32 

C4L-G.5 Joint Source-Channel-Authentication Resource Allocation for 

Multimedia over Wireless Networks ....................................................................................................... 3471 

Qibin Sun, Institute for Infocomm Research; Zhi Li, National University of Singapore; Yong Lian, National 

University of Singapore; Chang Wen Chen, Florida Institute of Technology 

C4L-H Blind Source Separation & Equalization (Lecture) 



Chair(s): Simone Fiori, Universita Politecnica delle Marche 

Derong Liu, University of Illinois at Chicago 

16:20 

C4L-H.1 On the Performance of Two Constant Modulus Algorithms in Equalization with Non-CM Signals .... 3475 

Maurice Bellanger, Conservatoire National Des Arts et Metiers 

16:38 

C4L-H.2 Combined Linear Prediction and Subspace based Blind Equalizers ................................................... 3479 

Parthapratim De, Institute for Infocomm Research 

16:56 

C4L-H.3 A Proposal of a New Blind Equalizer using Output Signals of Decision Device ................................. 3483 

Hiroki Matsumoto, Maebashi Institute of Technology; Shuntaro Takasaki, Maebashi Institute of Technology; 

Toshihiro Furukawa, Tokoyo University of Science 

17:14 

C4L-H.4 Eigenvector Algorithms for Blind Deconvolution of MIMO-IIR Systems ............................................. 3486 

Mitsuru Kawamoto, National Institute of Advanced Industrial Science and Technology; Kiyotaka Kohno, 

Shimane University; Yujiro Inouye, Shimane University 

17:32 

C4L-H.5 A Matrix Pseudo-Inversion Lemma and its Application to Block-Based Adaptive Blind 

Deconvolution for MIMO Systems ........................................................................................................... 3490 

Kiyotaka Kohno, Shimane University; Yujiro Inouye, Brain Science Institute, RIKEN; Mitsuru Kawamoto, 

National Institute of Advanced Industrial Science and Technology 

C4L-J Processor Architecture (Lecture) 



Chair(s): Tughrul Arslan, University of Edinburgh 

Mircea Stan, University of Virginia 

16:20 

C4L-J.1 Cache Miss-Aware Dynamic Stack Allocation ....................................................................................... 3494 

Sung-Joon Jang, KAIST; Moo-Kyoung Chung, Dynalith Systems Co., Ltd; Jaemoon Kim, KAIST; 

Chong-Min Kyung, KAIST

16:38 

C4L-J.2 Design of a Massively Parallel Vision Processor based on Multi-SIMD Architecture ....................... 3498 

Kota Yamaguchi, University of Tokyo; Yoshihiro Watanabe, University of Tokyo; Takashi Komuro, University 

of Tokyo; Masatoshi Ishikawa, University of Tokyo 

16:56 

C4L-J.3 A Double-Issue Java Processor Design for Embedded Applications ................................................... 3502 

Hou-Jen Ko, National Chiao Tung University; Chun-Jen Tsai, National Chiao Tung University 

17:14 

C4L-J.4 Latency-Tolerant Virtual Cluster Architecture for VLIW DSP ................................................................ 3506 

Pi-Chen Hsiao, Industrial Technology Research Institute; Tay-Jyi Lin, National Chiao Tung University and 

Industrial Technology Research Institute; Chih-Wei Liu, National Chiao Tung University; Chein-Wei Jen, 

National Chiao Tung University and Industrial Technology Research Institute 

17:32 

C4L-J.5 A Low-Cost and High-Performance SoC Design for OMA DRM2 Applications ................................... 3510 

Yehua Gu, Fudan University; Xiaoyang Zeng, Fudan University; Jun Han, Fudan University; 

Jia Zhao, Fudan University 

C4L-K Cellular Systems (Lecture) 



Chair(s): Chang-Ho Lee, Samsung 

Tokunbo Ogunfunmi, Santa Clara University 

16:20 

C4L-K.1 Simple Design Equations of Gain Compression and Distortion Spectrum in 

Broadband RF Transceivers ..................................................................................................................... 3514 

Stefano Marsili, Infineon Technologies Austria AG; Manfred Punzenberger, Infineon Technologies Austria AG 

16:38 

C4L-K.2 Analysis of Spurious Emission and In-Band Phase Noise of an All Digital Phase Locked Loop 

for RF Synthesis using a Frequency Discriminator ............................................................................... 3518 

C. Wicpalek, University of Linz; T. Mayer, DICE GmbH & Co KG; L. Maurer, DICE GmbH & Co KG; 

U. Vollenbruch, Linz Center of Mechatronics GmbH; T. Pittorino, University of Linz; A. Springer, University of 

Linz and Linz Center of Mechatronics GmbH 

16:56 

C4L-K.3 Technique for Peak to Average Power Ratio Reduction Suited for M-Carrier WCDMA base 

Station Transmitters ................................................................................................................................. 3522 

Stefano Marsili, Infineon Technologies Austria AG 

17:14 

C4L-K.4 Logarithmic Codecs for Adaptive Beamforming in WCDMA Downlink Channels .............................. 3526 

C. Litchfield, University of Kent at Canterbury; P. Lee, University of Kent at Canterbury; R.J. Langley, 

University of Sheffield; J.C. Batchelor, University of Kent at Canterbury 

17:32 

C4L-K.5 Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation .................... 3530 

A. Burg, ETH Zurich; S. Haene, ETH Zurich; W. Fichtner, ETH Zurich; M. Rupp, Vienna University of Technology

C4L-L Continuous-Time Filters II (Lecture) 



Chair(s): Doug Frey, Lehigh University 

Ramesh Harjani, University of Minnesota 

16:20 

C4L-L.1 Design of Precise Gain GmC-Leapfrog Filters ........................................................................................ 3534 

Mikko Kaltiokallio, Helsinki University of Technology; Saska Lindfors, Helsinki University of Technology; 

Ville Saari, Helsinki University of Technology; Jussi Ryynänen, Helsinki University of Technology 

16:38 

C4L-L.2 A Novel CMOS Envelope Detector Structure .......................................................................................... 3538 

J.P. Alegre, University of Zaragoza; S. Celma, University of Zaragoza; B. Calvo, University of Zaragoza; 

J.M. García Del Pozo, University of Zaragoza 

16:56 

C4L-L.3 A 600mV 3.6mW 68dB DR 4th Order Analog base Band Filter for WLAN Receivers ....................... 3542 

Marcello De Matteis, University of Lecce; Stefano D’Amico, University of Lecce; 

Andrea Baschirotto, University of Lecce 

17:14 

C4L-L.4 Analysis of Common-Mode Induced Even-Order Distortion in a Pseudo-Differential gm-C Filter .... 3546 

Ville Saari, Helsinki University of Technology; Saska Lindfors, Helsinki University of Technology 

17:32 

C4L-L.5 Singly Terminated and Bi-Transversal Transmission Line Filters for 

High Speed Adaptive Equalization ........................................................................................................... 3550 

Shanthi Pavan, Indian Institute of Technology 

C4L-M Sensory Systems I (Lecture) 



Chair(s): Shih-Chii Liu, ETH Zurich 


16:20 

C4L-M.1 A 4x4 Logarithmic Spike Timing Encoding Scheme for Olfactory Sensor Applications ................... 3554 

Bin Guo, Hong Kong University of Science and Technology; Amine Bermak, Hong Kong University of Science 

and Technology; Maxime Ambard, LORIA-INRIA; Dominique Martinez, LORIA-INRIA 

16:38 

C4L-M.2 Incremental Encoder based Position and Velocity Measurements VLSI Chip with Serial 

Peripheral Interface .................................................................................................................................. 3558 

Ndubuisi Ekekwe, Johns Hopkins University; Ralph Etienne-Cummings, Johns Hopkins University; 

Peter Kazanzides, Johns Hopkins University 

16:56 

C4L-M.3 Amperometric Readout and Electrode Array Chip for Bioelectrochemical Sensors ......................... 3562 

Andrew Mason, Michigan State University; Yue Huang, Michigan State University; Chao Yang, Michigan State 

University; Jichun Zhang, Michigan State University

17:14 

C4L-M.4 Digital Wideband Excitation Technique for Impedance-Based Structural 

Health Monitoring Systems ...................................................................................................................... 3566 

Jina Kim, Virginia Tech; Benjamin L. Grisso, Virginia Tech; Dong S. Ha, Virginia Tech; 

Daniel J. Inman, Virginia Tech 

17:32 

C4L-M.5 Bounded State Space Particle Filter for Network Sensors .................................................................. 3570 

Silvana Sañudo, Universidad Nacional del Sur; Favio R. Masson, Universidad Nacional del Sur; 

Pedro Julian, Universidad Nacional del Sur 

C5P-N Analog Interface Circuits (Poster) 



Chair(s): Degan Chen, Iowa State University 

C5P-N.1 Voltage Elevator using a MEMS Resonator ........................................................................................... 3574 

José M. Quero, University of Seville 

C5P-N.2 High-Speed Front End for LED-Photodiode based Fluorescence Lifetime Measurement System .. 3578 

Clement Joseph, University of Houston; Mounir Boukadoum, University of Quebec at Montreal and University 

of Houston; Joe Charlson, University of Houston; David Starikov, University of Houston; Abdelhak Bensaoula, 

University of Houston 

C5P-N.3 A 12.4 ENOB Incremental A/D Converter for High-Linearity Sensors Read-Out Applications ......... 3582 

Vincenzo Ferragina, University of Pavia; Massimo Ferri, University of Pavia; Marco Grassi, University of 

Pavia; Andrea Rossini, University of Pavia; Piero Malcovati, University of Pavia; Andrea Baschirotto, 

University of Lecce 

C5P-N.4 Glass Break Detector Analog Front-End using Novel Classifier Circuit .............................................. 3586 

Brian Gestner, Georgia Institute of Technology; Jason Tanner, Georgia Institute of Technology; 

David Anderson, Georgia Institute of Technology 

C5P-N.5 An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters ................................. 3590 

Fule Li, Tsinghua University; Zhihua Wang, Tsinghua University; Dongmei Li, Tsinghua University 

C5P-P Nyquist Data Conversion II (Poster) 



Chair(s): Gaetano Palumbo, Università degli Studi di Catania 

C5P-P.1 A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process ...................................... 3594 

Wen-Shen Chou, TSMC Design & Technology Platform; Shu-Chieh Yang, TSMC Design & Technology 

Platform; Fu-Lung Hsueh, TSMC Design & Technology Platform; Heng-Chang Huang, TSMC Design & 

Technology Platform; Chih-Ji Hsiao, TSMC Design & Technology Platform 

C5P-P.2 On-Line Histogram Equalization for Flash ADC ...................................................................................... 3598 

Yanyi L. Wong, University of Maryland College Park; Marc Cohen, University of Maryland College Park; 

Pamela Abshire, University of Maryland College Park 

C5P-P.3 Low-Power CMOS Comparator with Embedded Amplification for Ultra-High-Speed ADCs .............. 3602 

J.P. Oliveira, UNINOVA; J. Goes, UNINOVA; B. Esperança, UNINOVA; N. Paulino, UNINOVA; 

J. Fernandes, INESC-ID

C5P-P.4 Low-Power Design Technique for Flash A/D Converters based on Reduction 

of the Number of Comparators ................................................................................................................ 3606 

Takahide Sato, Tokyo Institute of Technology; Shigetaka Takagi, Tokyo Institute of Technology; 

Nobuo Fujii, Tokyo Institute of Technology 

C5P-P.5 A Blind Calibration Technique to Correct Memory Errors in Amplifier-Sharing Pipelined ADCs ..... 3610 

Munkyo Seo, University of California, Santa Barbara; Sopan Joshi, Intel Corporation; 

Ian A. Young, Intel Corporation 

C5P-Q Oversampling Data Conversion IV (Poster) 



Chair(s): Tertulien Ndjountche, Quebec University 

C5P-Q.1 Quadrature Mismatch Shaping Techniques for Fully Differential Circuits ......................................... 3614 

Stijn Reekmans, Ghent University; Pieter Rombouts, Ghent University; Ludo Weyten, Ghent University 

C5P-Q.2 Blue-Noise Sigma-Delta Modulator: Improving Substrate Noise and Nonlinear 

Amplifier Gain Effects ............................................................................................................................... 3618 

Eric C. Moule, University of Rochester; Zeljko Ignjatovic, University of Rochester 

C5P-Q.3 A 20-bit Sigma-Delta D/A for Audio Applications in 0.13um CMOS ................................................... 3622 

Liyuan Liu, Tsinghua University; Run Chen, Tsinghua University; Dongmei Li, Tsinghua University 

C5P-Q.4 Designing Complex ΔΣ Modulators with Signal-Transfer Functions having 

Good Stop-Band Attenuation ................................................................................................................... 3626 

Bupesh Pandita, University of Toronto; K.W. Martin, University of Toronto 

C5P-R Mode Decision & Bit Allocation (Poster) 



Chair(s): Feng Wu, Microsoft 

C5P-R.1 An Efficient Intra Mode Selection Algorithm for H.264 based on Fast Edge Classification ............ 3630 

Zhenyu Wei, Chinese University of Hong Kong; Hongliang Li, Chinese University of Hong Kong; King 

Ngi Ngan, Chinese University of Hong Kong 

C5P-R.2 Improving Video Coding at Scene Cuts using Attention based Adaptive Bit Allocation .................. 3634 

Zhibo Chen, Thomson Corporate Research; Guoping Qiu, University of Nottingham; Yang Lu, Thomson 

Corporate Research; Lihua Zhu, Thomson Corporate Research; Quqing Chen, Thomson Corporate Research; 

Xiaodong Gu, Thomson Corporate Research; Charles Wang, Thomson Corporate Research 

C5P-R.3 Improved Frame Level MAD Prediction and Bit Allocation Scheme for H.264/AVC 

Rate Control ............................................................................................................................................... 3639 

Xuan Jing, Nanyang Technological University; Lap-Pui Chau, Nanyang Technological University 

C5P-R.4 Adaptive Lagrange Multiplier Selection for Intra-Frame Video Coding .............................................. 3643 

Xiang Li, University of Erlangen-Nuremberg; Norbert Oertel, Siemens Corporate Technology; 

André Kaup, University of Erlangen-Nuremberg 

C5P-R.5 Fast H.264 Inter Mode Decision based on Inter and Intra Block Conditions .................................... 3647 

Hung-Ming Wang, National Cheng Kung University; Ji-Kun Lin, National Cheng Kung University; 

Jar-Ferr Yang, National Cheng Kung University

C5P-S Motion Estimation & Detection (Poster) 



Chair(s): Zhibo Chen, Thomson R&D Center 

C5P-S.1 A Content-Adaptive Fast Multiple Reference Frames Motion Estimation in H.264 ......................... 3651 

Qichao Sun, Zhejiang University; Xin-Hao Chen, Zhejiang University; Xiaoyang Wu, Zhejiang University; 

Lu Yu, Zhejiang University 

C5P-S.2 A Genetic Rhombus Pattern Search for Block Motion Estimation ...................................................... 3655 

Jang-Jer Tsai, National Chiao-Tung University; Hsueh-Ming Hang, National Chiao-Tung University 

C5P-S.3 Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation ............ 3659 

Yang Song, Waseda University; Zhenyu Liu, Waseda University; Takeshi Ikenaga, Waseda University; 

Satoshi Goto, Waseda University 

C5P-S.4 Low Power Variable Block Size Motion Estimation using Pixel Truncation ....................................... 3663 

Asral Bahari, University of Edinburgh; Tughrul Arslan, University of Edinburgh; 

Ahmet T. Erdogan, University of Edinburgh 

C5P-S.5 Motion Detection by using Entropy Image and Adaptive State-Labeling Technique ........................ 3667 

Meng-Chou Chang, National Changhua University of Education; Yong-Jie Cheng, Chang Gung University 

C5P-T Testing II (Poster) 



Chair(s): Malgorzata Jeske, Portland State University 

C5P-T.1 SAT-Based ATPG for Path Delay Faults in Sequential Circuits ............................................................ 3671 

Stephan Eggersglüß, University of Bremen; Görschwin Fey, University of Bremen; 

Rolf Drechsler, University of Bremen 

C5P-T.2 CAD-Directed SEU Susceptibility Reduction in FPGA Circuits Designs .............................................. 3675 

Hamid R. Zarandi, Sharif University of Technology and Bristol University; Seyed G. Miremadi, Sharif 

University of Technology; Dhiraj K. Pradhan, Bristol University; Jimson Mathew, Bristol University 

C5P-T.3 Reducing Test-Bus Power Consumption in Huffman Coding based Test Data 

Compression for SOCs .............................................................................................................................. 3679 

Chandan Giri, Indian Institute of Technology Kharagpur; Santanu Chattopadhyay, Indian Institute of 

Technology Kharagpur 

C5P-T.4 Low Capture Power Test Generation for Launch-off-Capture Transition 

Test based on Don’t-Care Filling .............................................................................................................. 3683 

Sying-Jyan Wang, National Chung-Hsing University; Yan-Ting Chen, National Chung-Hsing University; 

Katherine Shu-Min Li, National Sun Yat-Sen University 

C5P-T.5 Watermarking for IP Protection through Template Substitution at Logic Synthesis Level .............. 3687 

Aijiao Cui, Nanyang Technological University; Chip-Hong Chang, Nanyang Technological University

C5P-U FPGAs (Poster) 



Chair(s): Dimitrios Soudris, Demokritos University of Thrace 

C5P-U.1 Design and Implementation of FPGA-Based Systolic Array for LZ Data Compression ..................... 3691 

Mohamed A. Abd El ghany, German University in Cairo; Aly E. Salama, Cairo University; 

Ahmed H. Khalil, Cairo University 

C5P-U.2 CLB-Based Detection and Correction of Bit-Flip Faults in SRAM-Based FPGAs ............................... 3696 

Hamid R. Zarandi, Sharif University of Technology and Bristol University; Seyed G. Miremadi, Sharif 

University of Technology; Costas Argyrides, Bristol University; Dhiraj K. Pradhan, Bristol University 

C5P-U.3 Collaborative Routing Architecture for FPGA ........................................................................................ 3700 

Yaling Ma, Clemson University; Mingjie Lin, Stanford University 

C5P-U.4 A Parallel Face Detection System Implemented on FPGA ................................................................... 3704 

Nicolas Farrugia, France Telecom R&D; Franck Mamalet, France Telecom R&D; Sébastien Roux, France 

Telecom R&D; Fan Yang, Université de Bourgogne; Michel Paindavoine, Université de Bourgogne 

C5P-U.5 A Design Framework for FPGA-Based Dynamically Reconfigurable Digital Controllers .................. 3708 

Carlos Paiz, University of Paderborn; Boris Kettelhoit, University of Paderborn; 

Mario Porrmann, University of Paderborn 

C5P-V Low-Power Logic & Architectures II (Poster) 




C5P-V.1 An Efficient Error Control Scheme for Chip-to-Chip Optical Interconnects ........................................ 3712 

Jun Wang, Chinese Academy of Science; Ge Zhang, Chinese Academy of Science; 

Weiwu Hu, Chinese Academy of Science 

C5P-V.2 Power Consumption Analysis of Flip-Flop based Interconnect Pipelining ......................................... 3716 

Jingye Xu, University of Illinois at Chicago; Abinash Roy, University of Illinois at Chicago; 

Masud H. Chowdhury, University of Illinois at Chicago 

C5P-V.3 Asynchronous Adiabatic Logic ................................................................................................................. 3720 

Muhammad Arsalan, Carleton University; Maitham Shams, Carleton University 

C5P-V.4 A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction ................................. 3724 

Rodrigo Jaramillo-Ramirez, University of Waterloo; Mohab Anis, University of Waterloo 

C5P-V.5 Capacitively-Biased Floating-Gate CMOS: A New Logic Family .......................................................... 3728 

Richard B. Wunderlich, Georgia Institute of Technology; Brian P. Degnan, Georgia Institute of Technology; 

Paul Hasler, Georgia Institute of Technology 

C5P-W PVT-Aware Circuits (Poster) 



Chair(s): Bah-Hwee Gwee, Nanyang Technological University 

C5P-W.1 Delay Variability due to Supply Variations in Transmission-Gate Full Adders .................................... 3732 

Massimo Alioto, University of Siena; Gaetano Palumbo, University of Catania

C5P-W.2 A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay .......................... 3736 

Ja Chun Ku, Northwestern University; Yehea Ismail, Northwestern University 

C5P-W.3 New Power Gating Structure with Low Voltage Fluctuations by Bulk 

Controller in Transition Mode .................................................................................................................. 3740 

Chung-Yu Chang, Industrial Technology Research Institute; Wei-Ben Yang, Industrial Technology Research 

Institute; Ching-Ji Huang, Industrial Technology Research Institute; Cheng-Hsing Chien, Industrial 

Technology Research Institute 

C5P-W.4 Comparative Analysis of Process Variation Impact on Flip-Flop Power-Performance ...................... 3744 

Martin Hansson, Linköping University; Atila Alvandpour, Linköping University 

C5P-W.5 Floating Millivolt Reference for PTAT Current Generation in Subthreshold MOS LSIs ..................... 3748 

Ken Ueno, Hokkaido University; Tetsuya Hirose, Hokkaido University; Tetsuya Asai, Hokkaido University; 

Yoshihito Amemiya, Hokkaido University 

C5P-X SOC Design (Poster) 



Chair(s): Cem Göknar, Dogus University 

C5P-X.1 Application-Specific Instruction Generation for SOC Processors ........................................................ 3752 

Shengjyi Yang, Feng Chia University; Chijie Lin, Feng Chia University; Chiuyun Hung, Feng Chia University; 

Jiying Wu, Feng Chia University; Yiwen Wang, Feng Chia University 

C5P-X.2 A Flexible Embedded SRAM IP Compiler ................................................................................................ 3756 

Yi Xu, Tsinghua University; Zhiqiang Gao, Tsinghua University; Xiangqing He, Tsinghua University 

C5P-X.3 A New Approach for Design and Verification of Transaction Level Models ....................................... 3760 

Mohammad Reza Kakoee, University of Tehran; Hamid Shojaei, University of Tehran; Hassan Ghasemzadeh, 

University of Tehran; Marjan Sirjani, University of Tehran; Zainalabedin Navabi, University of Tehran 

C5P-X.4 Low Power ASIP Architecture Optimization based on Target Application Profiling .......................... 3764 

Sung Dae Kim, Ajou University; Myung H. Sunwoo, Ajou University 

C5P-Y Timing & Frequency Response (Poster) 



Chair(s): Morris Ker, National Chiao-Tung University 

C5P-Y.1 A Hold Friendly Flip-Flop for Area Recovery ........................................................................................... 3768 

Rubil Ahmadi, Advanced Micro Devices Inc. 

C5P-Y.2 On the Timing Uncertainty in Delay-Line-Based Time Measurement 

Applications Targeting FPGAs ................................................................................................................. 3772 

Amir Mohammad Amiri, École Polytechnique de Montréal; Abdelhakim Khouas, École Polytechnique de 

Montréal; Mounir Boukadoum, Université du Québec à Montréal 

C5P-Y.3 Evaluating Network-On-Chip for Homogeneous Embedded Multiprocessors in FPGAs ................... 3776 

Henrique C. Freitas, Universidade Federal do Rio Grande do Sul; Dalton M. Colombo, Universidade Federal do 

Rio Grande do Sul; Fernanda L. Kastensmidt, Universidade Federal do Rio Grande do Sul; Philippe 

O.A. Navaux, Universidade Federal do Rio Grande do Sul

C5P-Y.4 A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem .. 3780 

Jun-Hong Chen, National Cheng Kung University; Haw-Shiuan Wu, National Cheng Kung University; 

Ming-Der Shieh, National Cheng Kung University; Wen-Ching Lin, National Cheng Kung University 

C5P-Y.5 Approximate Frequency Response Models for RLC Power Grids ........................................................ 3784 

DiaaEldin Khalil, Northwestern University; Yehea Ismail, Northwestern University 

C6P-N Analog Circuits II (Poster) 



Chair(s): Hoi Lee, University of Texas at Dallas 

C6P-N.1 Mismatch Compensated Design Techniques under Packaging-Induced Die Stress ........................ 3788 

Dongwon Seo, Qualcomm Inc.; Yuhua Guo, Qualcomm Inc. 

C6P-N.2 1-V Linear CMOS Transconductor with -65 dB THD in Nano-Scale CMOS Technology ..................... 3792 

Tien-Yu Lo, National Chiao Tung University; Chung-Chih Hung, National Chiao Tung University 

C6P-N.3 Dual-Output Trans-Impedance Amplifier of Cost-Effective CMOS Optical Receiver for 

Digital Audio Interfaces ............................................................................................................................ 3796 

Kyu-Young Kim, Korea University; Kwansu Shon, Korea University; Jae-Tack Yoo, Anyang University; 

Soo-Won Kim, Korea University 

C6P-N.4 New Squaring Circuit with Reduced Sensitivity to Element Mismatches using Differentially 

Driven Translinear Cells ............................................................................................................................ 3800 

T.M. Abdelrahman, JVC Gulf; S. Ozoguz, Istanbul Technical University; A.S. Elwakil, University of Sharjah 

C6P-N.5 A 109 nW, 44 ppm/°C CMOS Current Reference with Low Sensitivity to Process Variations ....... 3804 

Giuseppe De Vita, Università degli Studi di Pisa; Giuseppe Iannaccone, Università degli Studi di Pisa 

C6P-P Analog Circuits III (Poster) 



Chair(s): Apisak Worapishet, Mahanakorn University of Technology 

C6P-P.1 Dynamic Eccentric Error Compensation for Track following Control of Optical Disk Driver ............ 3808 

Jeonghun Kim, Korea University and MagnaChip Semiconductor Ltd.; Kyu-sam Lim, Korea University; 

Suki Kim, Korea University 

C6P-P.2 CMOS Gyrator-C Active Transformers ..................................................................................................... 3812 

F. Yuan, Ryerson University 

C6P-P.3 Run-Time Programming of Analog Circuits using Floating-Gate Transistors ..................................... 3816 

David W. Graham, West Virginia University; Paul Hasler, Georgia Institute of Technology 

C6P-P.4 An Undersampling Digital Microphone ................................................................................................... 3820 

Sven Soell, Glasgow University; Bernd Porr, Glasgow University 

C6P-P.5 Fractional-Rate FM-to-Digital Δ-Σ Converters ........................................................................................ 3824 

Francesco Cannillo, Imperial College of Science, Technology and Medicine; Christofer Toumazou, Imperial 

College of Science, Technology and Medicine

C6P-Q References & Regulators II (Poster) 



Chair(s): Yichaung Sun, University of Hertfordshire 

C6P-Q.1 Design of High-Performance Voltage Regulators based on Frequency-Dependent 

Feedback Factor ........................................................................................................................................ 3828 

Liangguo Shen, Peking University; Zushu Yan, Beijing Microelectronics Technology Institute; Xing Zhang, 

Peking University; Yuanfu Zhao, Beijing Microelectronics Technology Institute; Yuan Wang, Peking University 

C6P-Q.2 A Reduced-Area, Low-Power CMOS Bandgap Reference Circuit ........................................................ 3832 

Savvas Koudounas, University of Cyprus; Julius Georgiou, University of Cyprus 

C6P-Q.3 Low-Voltage Temperature-Independent Current Reference with No External Components ............ 3836 

Burak Kelleci, Texas A&M University; Aydın İlker Karsilayan, Texas A&M University 

C6P-Q.4 A New CMOS Voltage Reference Scheme based on Vth-Difference Principle ................................... 3840 

Luis Toledo, Universidad Católica de Córdoba; Walter Lancioni, Universidad Católica de Córdoba; 

Pablo Petrashin, Universidad Católica de Córdoba; Carlos Dualibe, Universidad Católica de Córdoba; 

Carlos Vázquez, Universidad Católica de Córdoba 

C6P-Q.5 A Low-Power CMOS Voltage Reference Circuit based on Subthreshold Operation .......................... 3844 

Chia-Wei Chang, Faraday Technology Corporation; Tien-Yu Lo, National Chiao Tung University; 

Chia-Min Chen, National Chiao Tung University; Kuo-Hsi Wu, National Chiao Tung University; 

Chung-Chih Hung, National Chiao Tung University 

C6P-R Mixed Signal Circuits & Test II (Poster) 



Chair(s): Ralph Etienne-Cummings, Johns Hopkins University 

C6P-R.1 A Sub-1V Low-Power High-Speed Static Frequency Divider ................................................................. 3848 

Kuo-Hsing Cheng, National Central University; Cheng-Liang Hung, National Central University; 

Chia-Wei Su, National Central University 

C6P-R.2 Design of a 1-Volt and µ-Power SARADC for Sensor Network Application ......................................... 3852 

Sang-Hyun Cho, Gwangju Institute of Science and Technology; Chang-Kyo Lee, Gwangju Institute of Science 

and Technology; Jong-In Song, Gwangju Institute of Science and Technology 

C6P-R.3 A Novel Low Power BPSK Demodulator .................................................................................................. 3856 

Zhenying Luo, Tufts University; Sameer Sonkusale, Tufts University 

C6P-R.4 Deterministic DEM DAC Performance Analysis ..................................................................................... 3860 

Hanjun Jiang, Tsinghua University; Degang Chen, Iowa State University; Randall L. Geiger, Iowa State University 

C6P-R.5 Process and Temperature Calibration of PLLs with BiST Capabilities ............................................... 3864 

Richard Geisler, University of Rochester; John Liobe, University of Rochester; Martin Margala, University of Rochester

C6P-S Analog Signal Processing (Poster) 



Chair(s): Andreas Demosthenous, University College London 

C6P-S.1 Low Frequency, Current Mode Programmable KHN Filters using Large-Valued Active Resistors .. 3868 

Carlos Muñiz-Montero, Instituto Nacional de Astrofísica Optica y Electrónica; Ramón González-Carvajal, 

Universidad de Sevilla; Alejandro Díaz-Sánchez, Instituto Nacional de Astrofísica Optica y Electrónica; 

J. Miguel Rocha, Instituto Nacional de Astrofísica Optica y Electrónica 

C6P-S.2 A Fully Programmable Analog Window Comparator ............................................................................. 3872 

Rui Xiao, Southern Illinois University Carbondale; Amit Laknaur, Southern Illinois University Carbondale; 

Haibo Wang, Southern Illinois University Carbondale 

C6P-S.3 Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC ............. 3876 

Athon Zanikopoulos, Eindhoven University of Technology; Pieter Harpe, Eindhoven University of Technology; 

Hans Hegt, Eindhoven University of Technology; Arthur van Roermund, Eindhoven University of Technology 

C6P-S.4 Analog Implementation of a Mean Field Detector for Multiple Antenna Systems ............................ 3880 

Josep Soler Garrido, University of Bristol; Robert J. Piechocki, University of Bristol 

C6P-S.5 Fast Peak Detector with Improved Accuracy and Linearity for 

High-Frequency Waveform Processing ................................................................................................... 3884 

Calogero D. Presti, Università degli Studi di Catania; Francesco Carrara, Università degli Studi di Catania; 

Antonino Scuderi, STMicroelectronics; Giuseppe Palmisano, Università degli Studi di Catania 

C6P-T Communications Building Blocks (Poster) 



Chair(s): Anas Hamoui, McGill University 

C6P-T.1 A 2.24GHz Wide Range Low Jitter DLL-Based Frequency Multiplier using 

PMOS Active Load for Communication Applications ............................................................................ 3888 

Chih-Hsing Lin, National Tsing Hua University; Ching-Te Chiu, National Tsing Hua University 

C6P-T.2 A Wideband CMOS Mixer with Feedforward Compensated Differential Transconductor ................ 3892 

Pei-Zong Rao, National Chiao Tung University; Tang-Yuan Chang, National Chiao Tung University; 

Ching-Piau Liang, National Chiao Tung University; Shyh-Jong Chung, National Chiao Tung University 

C6P-T.3 High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator .............................................. 3896 

Shubha Bommalingaiahnapallya, University of Minnesota; Kin-Joe Sham, University of Minnesota; 

Mahmoud Reza Ahmadi, University of Minnesota; Ramesh Harjani, University of Minnesota 

C6P-T.4 A CMOS Class-E Power Amplifiers with Power Control ........................................................................ 3900 

Tongqiang Gao, Tsinghua University; Dongmei Li, Tsinghua University; Baoyong Chi, Tsinghua University; 

Zhihua Wang, Tsinghua University 

C6P-T.5 A Low-Area, 0.18µm CMOS, 10Gb/s Optical Receiver Analog Front End .......................................... 3904 

Mohsen Maadani, Sharif University of Technology; Mojtaba Atarodi, Sharif University of Technology

C6P-U Wireless Circuits & Systems VI (Poster) 



Chair(s): Emmanuel Drakasis, Imperial College London 

C6P-U.1 Dual Band Antenna Equalizer Realized by Utilizing 0.18µm Si-Processing 

Technology for a Pifa-900 ......................................................................................................................... 3908 

Naoyuki Unno, Tokyo Institute of Technology; Takashi Fujita, Tokyo Institute of Technology; Peter Lindberg, 

Uppsala University; B. Siddik Yarman, Tokyo Institute of Technology; Nobuo Fujii, Tokyo Institute of Technology 

C6P-U.2 A LO-Leakage Auto-Calibrated CMOS IEEE802.11b/g WLAN Transceiver ........................................ 3912 

Haiyong Wang, Beijing LHWT Microelectronics INC.; Nanjian Wu, Chinese Academy of Sciences; 

Guoliang Shou, Beijing LHWT Microelectronics INC. 

C6P-U.3 A Power Efficient HBT Pulse Generator for UWB Radars ..................................................................... 3916 

Alessio Cacciatori, Università degli Studi di Brescia; Laura Lorenzi, Università degli Studi di Brescia; 

Luigi Colalongo, Università degli Studi di Brescia 

C6P-U.4 Inductive ESD Protection for Narrow Band and Ultra-Wideband CMOS Low Noise Amplifiers ........ 3920 

Yanjie Wang, University of Alberta; Anthony Ho, University of Alberta; Kris Iniewski, University of Alberta; 

Vincent Gaudet, University of Alberta 

C6P-U.5 A Dual-Slope PFD/CP Frequency Synthesizer Architecture with an 

Adaptive Self-Tuning Algorithm ............................................................................................................... 3924 

Shuilong Huang, Tsinghua University; Zhihua Wang, Tsinghua University 

C6P-V Audio & Speech Processing II (Poster) 



Chair(s): M. Omair Ahmad, Concordia University 

C6P-V.1 A 32-Point FFT based Noise Reduction Algorithm for Single Channel Speech Signals ................... 3928 

Kunal Mukherjee, Nanyang Technological University; Bah-Hwee Gwee, Nanyang Technological University 

C6P-V.2 Optimization of Gabor Features for Text-Independent Speaker Identification .................................. 3932 

Volker Mildner, University of Bremen; Stefan Goetze, University of Bremen; Alfred Mertins, Carl von 

Ossietzky-University; Karl-Dirk Kammeyer, University of Bremen 

C6P-V.3 A NMR Optimized Bitrate Transcoder for MPEG-2/4 LC-AAC .............................................................. 3936 

Te-Hsueh Lai, National Chiao-Tung University; Chung-Neng Wang, National Chiao-Tung University; 

Tihao Chiang, National Chiao-Tung University 

C6P-V.4 A Pitch Estimation Algorithm based on the Smooth Harmonic Average Peak-to-Valley Envelope .... 3940 

Arturo Camacho, University of Florida; John G. Harris, University of Florida 

C6P-V.5 An Approach for Voiced/Unvoiced Decision of Colored Noise-Corrupted Speech ............................ 3944 

C. Shahnaz, Concordia University; W.-P. Zhu, Concordia University; M.O. Ahmad, Concordia University 

C6P-W Image & Video Processing II (Poster) 



Chair(s): Masayuki Kawamata, Tohoku University 

C6P-W.1 Color Image Enhancement based on Single-Scale Retinex with a JND-Based Nonlinear Filter ...... 3948 

Doo Hyun Choi, Medison Co. Ltd.; Ick Hoon Jang, Kyungwoon University; Mi Hye Kim, Kyungpook National 

University; Nam Chul Kim, Kyungpook National University

C6P-W.2 Efficient Intra Prediction in H.264 based on Intensity Gradient Approach ........................................ 3952 

An-Chao Tsai, National Cheng Kung University; Anand Paul, National Cheng Kung University; 

Jai-Ching Wang, National Cheng Kung University; Jhing-Fa Wang, National Cheng Kung University 

C6P-W.3 Adaptive Search Range Motion Estimation Algorithm for H.264/AVC .............................................. 3956 

Tian Song, Tokushima University; Kazuhiro Ogata, Tokushima University; Kosuke Saito, Tokushima University; 

Takashi Shimamoto, Tokushima University 

C6P-W.4 Extraction and Integration of Human Body Parts for 3-D Motion Analysis of Golf Swing from 

Single-Camera Video Sequences ............................................................................................................. 3960 

Ibrahim Karliga, University of Washington; Jenq-Neng Hwang, University of Washington 

C6P-W.5 A 3D Integrated Feature-Extracting Image Sensor ............................................................................... 3964 

Zhengming Fu, Yale University; Eugenio Culurciello, Yale University 

C6P-X DSP Implementation & Embedded Systems II (Poster) 



Chair(s): Stefano Vitali, University of Bologna 

C6P-X.1 A Modular VLIW Processor ....................................................................................................................... 3968 

Vincent Brost, Universite de Bourgogne; Fan Yang, Universite de Bourgogne; 

Michel Paindavoine, Universite de Bourgogne 

C6P-X.2 Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures ............... 3972 

Henrik Svensson, Lund University; Thomas Lenart, Lund University; Viktor Öwall, Lund University 

C6P-X.3 Decoder-Friendly Adaptive Deblocking Filter (DF-ADF) Mode Decision in H.264/AVC .................... 3976 

Yu Hu, University of Southern California, Los Angeles; Qing Li, University of Southern California, Los 

Angeles; Siwei Ma, University of Southern California, Los Angeles; C.-C. Jay Kuo, University of Southern 

California, Los Angeles 

C6P-X.4 A VLSI Architecture for a Fast Computation of the 2-D Discrete Wavelet Transform ....................... 3980 

Chengjun Zhang, Concordia University; Chunyan Wang, Concordia University; 

M. Omair Ahmad, Concordia University 

C6P-X.5 Tiled Interleaving for Multi-Level 2-D Discrete Wavelet Transform ..................................................... 3984 

Jung-Wook Kim, Samsung Electronics; Jinook Song, Korea Advanced Institute of Science and Technology; 

Seokho Lee, Korea Advanced Institute of Science and Technology; In-Cheol Park, Korea Advanced Institute of 


C6P-Y Emerging Topics in DSP II (Poster) 



Chair(s): U.B. Desai, ITT 

C6P-Y.1 On the Angular Decomposition Technique for Computing the Discrete 

Fractional Fourier Transform ................................................................................................................... 3988 

Magdy Tawfik Hanna, Fayoum University 

C6P-Y.2 2-D Tridiagonal IIR Filters/Systems: State Space and Circuit Realizations ...................................... 3992 

George Antoniou, Montclair State University 

C6P-Y.3 Optimal Synthesis of State-Estimate Feedback Controllers with Minimum 

L2-Sensitivity and No Overflow Oscillations ........................................................................................... 3996 

Takao Hinamoto, Hiroshima University; Takuro Kawagoe, Hiroshima University

C6P-Y.4 Image Denoising using Shiftable Directional Pyramid and Scale Mixtures of Complex Gaussians .. 4000 

An P.N. Vo, University of Texas at Arlington; Truong T. Nguyen, Paris School of Mines; Soontorn Oraintara, 

University of Texas at Arlington 

C6P-Y.5 Sampling at Minimum Sampling Rate for Signals in Shift Invariant Spaces ..................................... 4004 

Beilei Huang, Massey University; Edmund M-K. Lai, Massey University; 

A.P. Vinod, Nanyang Technological University 

C6P-Z Digital Circuits & Signal Processing (Poster) 



Chair(s): Pedro Julian, Universidad Nacional del Sur 

C6P-Z.1 A Low Power Sinc3 Filter for ΣΔ Modulators .......................................................................................... 4008 

A. Lombardi, University of Pavia; E. Bonizzoni, University of Pavia; P. Malcovati, University of Pavia; 

F. Maloberti, University of Pavia 

C6P-Z.2 Higher Clock Rate at Comparable IPC through Reduced Circuit Complexity in Instruction 

Format based Pipeline Clustering ........................................................................................................... 4012 

Jatan Shah, University of Texas at Dallas; Rama Sangireddy, University of Texas at Dallas 

C6P-Z.3 An Adaptive Cross-Correlation Derivative Algorithm for Ultra-Low 

Power Time Delay Measurement ............................................................................................................. 4016 

F.N. Martin Pirchio, Universidad Nacional del Sur; A. Chacón-Rodriguez, Universidad Nacional de Mar del 

Plata; P. Julian, Universidad Nacional del Sur; P.S. Mandolesi, Universidad Nacional del Sur 

C6P-Z.4 A Novel Fast Algorithm for Speech and Audio Coding .......................................................................... 4020 

Umit Guz, Isik University and SRI-International; Hakan Gurkan, Isik University; Binboga Siddik Yarman, 

Istanbul University and Tokyo Institute of Technology

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