PV Intern - Cadence

Position Requirements:
Essential Qualifications:
1.Master degree or above
2.Major in Micro-electronics, Electronic Engineering, Computer Science, Information Technology
or equivalent
3.Ability to work effectively alone or as well as in a team.
4.Essential that the individual demonstrates strong communication, verbal and written
5.Requires good communication skills in English.
Desirable Qualifications:
1.Tapeout experience or EDA tools experience
4.Design Engineer – Digital Frontend Engineer (Location: SH or BJ)
Position Description:
1.In charge of IP and SOC logic design, verification and Implementation.
2.Daily duties include: Digital IC micro-architecture, RTL coding, Logic Synthesis, Function
Verification, DFT, and Static Timing Analysis.
3.HDL language Knowledge, like verilog or vhdl is necessary.
4.C/C++/perl/tcl/csh, UNIX, Linux experience are plus.
5.Excellent analytical and problem-solving skills. Quick learner-able to learn and apply technical
and complex topics.
6.Excellent communication skills and the uncanny ability in a cooperative team environment are
required.
7.Self-motivated, result-oriented, can take ownership and follow-through on tasks.
Position Requirements:
Essential Qualifications:
1.Master degree or above
2.Major in Micro-electronics, Electronic Engineering, Computer Science, Information Technology
3.or equivalent
4.Ability to work effectively alone or as well as in a team.
5.Essential that the individual demonstrates strong communication, verbal and written
6.Requires good communication skills in English.
Desirable Qualifications:
1.Good at any following skill sets: ASIC design, FPGA design, Computer architecture, SOC design
2.based on ARM/MIPS.
3.Experience of USB2.0/3.0, PCIE,HDMI, Display Port
PE
1. Senior/Principal Product Engineer – Characterization (Location: BJ)
Position Description:
1.The Altos Product Engineer (PE) works with key customers to understand their library
characterization challenges, maps