Real Time Implementation of a Multiuser Detection Enabled

REAL TIME IMPLEMENTATION OF A MULTIUSER DETECTION 

ENABLED AD-HOC NETWORK 

978-1-4244-2677-5/08/$25.00 ©2008 IEEE 

John A. Tranquilli, Joseph A. Farkas, Joshua D. Niedzwiecki 

BAE SYSTEMS Advanced Systems & Technology, Nashua, NH 

Brian M. Pierce*, L. Reggie Brothers*, James A. DeBardelaben' 

*DARPA, Arlington, VA 

'Ivysys Technologies, Arlington, VA 

ABSTRACT 

In contrast to the interference avoidance paradigm that 

conventional wireless communication systems follow, the 

DARPA Interference Multiple Access (DIMA) 

Communications program intentionally structures 

multiple-access interference to enable high-capacity, lowlatency, 

spread spectrum communications. The system's 

adaptive multi-user detection (MUD) receiver algorithms 

enable the transmission of multiple data streams in the 

same time and frequency channel without need for 

centralized control of synchronization or power levels. 

This paper focuses on the DIMA system level 

implementation of the prototype radio network, along with 

the results from both non-real-time testing and real-time 

performance characterization efforts. 

Extensive simulations and non-real-time over-the-air 

testing helped to drive the design of a real-time MUD 

receiver implemented on a single FPGA. The Media 

Access Control Layer, implemented on a General Purpose 

Processor (GPP), facilitates intentional interference 

through a defined frame structure that also enables 

distributed synchronization and scheduling. During the 

real-time performance characterization period, the DIMA 

prototype network demonstrated 3.5 times the spectral 

efficiency of comparable 802.11 ad-hoc systems at low 

signal to noise ratios (SNRs). DIMA demonstrated up to 

11x reductions in latency jitter in the same comparison. 

These gains can be leveraged in future military 

applications to provide increased capabilities and 

improved performance to the war fighter. 

INTRODUCTION 

The Traditional wireless communications paradigm is to 

avoid all sources of interference. Multiple-access 

interference is avoided through time, code, or frequency 

division, while non-cooperative interference is avoided 

through frequency agility, and spread spectrum 

techniques. These methods reduce spectral efficiency, 

increasing the need for physical bandwidth, and/or they 

require centralized control to coordinate multi-user access. 

1 of 6 

The DARPA Interference Multiple Access (DIMA) 

Communications program presents a new paradigm based 

on intentionally allowing multiple-access interference 

using loose distributed coordination to increase network 

capacity, reduce traffic bottlenecks, and increase resilience 

against threats. This technology is critically important for 

military applications where low-latency, high capacity 

communications are required and infrastructure is nonexistent 

or undesirable. 

Multi-User Detection (MUD) is the enabling technology 

behind the DIMA concept. MUD is a receiver technology 

that is capable of jointly demodulating multiple interfering 

signals where single-user receivers (e.g. matched filters) 

fail [1] [2]. The MUD PHY Layer algorithms developed 

under the program allow multiple users to transmit on the 

same channel (time, frequency, etc.) simultaneously while 

maintaining low computational complexity and requiring 

no infrastructure or centralized control [3]. To exploit this 

PHY Layer capability, novel Media Access Control 

(MAC) protocols are required to encouraging users to 

collide rather than avoiding each other’s spectrum usage 

[4]. Prior papers have covered the design of the DIMA 

PHY and MAC algorithms so while this paper provides 

summaries of each layer, it focuses on the real-time system 

implementation and performance characterization efforts 

of the program. 

DIMA PHY/MAC BENEFITS SUMMARY 

Conventional systems that allow users to share time and 

frequency, such as the CDMA-based IS-95, are sensitive 

to near-far interference and to timing coordination 

between users [5]. Therefore, they rely on centralized 

power and timing control algorithms to enable multipleaccess. 

Even TDMA based systems, such as GSM, require 

centralized control to sufficiently separate user’s signals 

[6]. The DIMA receiver does not simply treat interfering 

signals as additional noise, but it adapts to them so the 

receiver can jointly demodulate the signals to extract the 

signal(s) of interest. In this way, DIMA is robust to both 

near-far interference as well as timing offsets between

users, which frees the system of any need for 

infrastructure or a centralized controller. The DIMA 

receiver also enables increased resiliency against various 

non-cooperative interferers due to its adaptive nature. 

Current ad-hoc networking systems also operate without 

infrastructure but they use collision avoidance techniques 

to prevent multiple-access interference. For example, 

802.11 limits channel usage to one user at a time so as 

more users request to send data, the network capacity is 

divided among users leading to reduced throughput and 

large per user latencies [7]. Additionally, since colliding 

packets are lost and must be retransmitted based on 

exponential back-off algorithms, large amounts of 

overhead are budgeted for collision avoidance, which 

further reduces network capacity. Since DIMA actively 

encourages collisions, the system provides improved 

spectral efficiency and reduced latency compared to 

collision avoidance ad-hoc systems. 

DIMA SYSTEM OVERVIEW 

The DIMA prototype system is based on COTS 

hardware integrated into a 6U Compact PCI Chassis. 

Figure 1 shows a diagram of the hardware blocks. The 

components within the Chassis include the Single Board 

Computer (SBC), which hosts the MAC, an FPGA 

motherboard and daughter boards, which host the PHY, an 

RF tuner, RF exciter, and a custom transmit/receive board 

built from COTS components. 

Custom RF Board 

DRS Tuner / Exciter 

Analog IF 

Nallatech Motherboard 

and Daughter Boards 

RS232 

Single Board Computer 

Compact PCI Chassis 

Rx 

Amp 

RF Tuner 

ADC 

10MHz Clk 

RF Exciter 

DAC 

clock clock 

FGPA Cores 

Transmit and Receive 

Chains 

cPCI 

Processing 

MAC 

Analog IF 

Figure 1: DIMA Prototype Hardware Block Diagram 

T/R 

Tx 

Amp 

Omni Antenna 

Linux 

T/R Ctrl 

RS232 

GBit Enet Hub 


The SBC runs a Linux operating system and provides 

interfaces for receiving data through gigabit Ethernet 

(used by a separate laptop to host voice, video, chat, or 

packet generation applications) and for controlling the RF 

tuner and exciter through RS232. The MAC Layer is 

written as a Linux kernel driver, providing it access to the 

Linux network stack for sending and receiving IP packets. 

The MAC consists of four main functional blocks: 

• The MAC Common Parts Sublayer (MCPS), which 

provides the core MAC functionality (system access, 

bandwidth allocation, connection establishment, and 

connection maintenance). 

• The MAC Convergence Sublayer (MCS), which 

receives IP Layer Protocol Data Units (PDUs) and 

converts them to PDUs understood by the MCPS. 

• The PHY Layer Management Entity (PLME), which 

reads, write, and stores key PHY parameters, 

debugging information, and system performance 

metrics. 

• The MAC-PHY Interface, which communicates 

directly with the PHY through the PCI bus. The PCI 

bus provides the ability to receive hardware interrupts, 

perform Direct Memory Accesses (DMAs), and 

individually read and write hardware registers. 

The PHY Layer is implemented on COTS FPGA 

development boards. The three devices that made up the 

PHY are: 

• The MAC-PHY Convergence (MPC) chip, which 

handles the MAC-PHY interface as well as packet 

framing/de-framing functions. 

• The Physical Media Device (PMD), which contains 

the transmitter, RF interface, and parameter estimator. 

• The MUD receiver. 

The MPC device is a Virtex-2 V2000E FPGA residing 

on the FPGA motherboard, which handles mostly logic 

functions, and interfacing with the PCI bus. The PMD and 

MUD devices are both Virtex-4 SX-55 FPGAs located on 

separate daughter boards. The RF interface on the PMD 

connects to the RF exciter and tuner via the A/D and D/A 

converters on the daughter board, which put out / takes in 

analog IF signals. The tuner and exciter allow the DIMA 

waveform to communicate over a wide range of operating 

frequencies. The custom RF board consists of COTS 

amplifiers for both transmit and receive paths as well as a 

transmit/receive (T/R) switch that is controlled by the 

PMD. The prototype system is therefore a half-duplex 

transceiver whose default mode is reception, but it isolates 

the receive side whenever the radio needs to transmit. The 

air interface is through a single omni-directional antenna 

as the DIMA prototype waveform does not rely on

complex beam-forming or multiple-input multiple-output 

(MIMO) techniques. 

FPGA IMPLEMENTATION CONSIDERATIONS 

The biggest driver of complexity, and hence number of 

FPGAs, in the design was the MUD receiver. Given a goal 

of fitting the core MUD algorithm within one FPGA, 

members of the algorithm development and hardware 

implementation teams worked together to select and 

optimize a MUD for performance based on the stated 

limitation. Initial trades relating to performance versus 

complexity, described in [2], pointed to the use of a 

recursive-least-squares (RLS) MUD [8]. Further 

simulations enabled a second layer of trades, which 

optimized the RLS MUD operating parameters to maintain 

the balance of required performance versus 

implementability on a single FPGA. Table 1 shows the 

final size of the PHY design as spread across the three 

devices. 

Table 1: DIMA FPGA Design Sizing 

Totals PMD (Virtex-4 

SX-55) % Used 

RLS (Virtex-4 

SX-55) % Used 

MPC (Virtex-2 

2000E) % Used 

DSP48s 435 19% 66% 0% 

BRAMs 260 29% 34% 37% 

Slices 40540 38% 86% 52% 

The MPC and PMD FPGAs are both utilized to a low 

degree, which supports going to a two FPGA design in the 

future (or a one FPGA design using a Virtex-5 device). 

The MUD FPGA is very highly utilized, using 86% of the 

available slices and 66% of the available DSP48s. All 

three chips used a high percentage of their input/output 

blocks, but integrating to one or two devices would 

alleviate this since more functions would exist on the same 

chip. This would reduce not only the required inputs and 

outputs between devices but also the slices dedicated to 

exchanging information between devices. 

Having such a highly utilized MUD FPGA reduced the 

speed at which the system could operate. This in turn 

affected the bandwidth of the system and hence the 

throughput of the network. The implementation team 

continued refining the overall design while the Systems 

Integration and Performance Characterization teams 

performed their functions. Hence, the performance 

numbers described in the results section are based on a 

non-full-rate design. Table 2 provides the clock speeds 

achieved in each device both the final design as well as the 

design used for performance characterization. The final 

PMD and RLS design speeds are 50% faster, which 

translates directly to 50% higher throughputs, though since 


the bandwidth increases as clock speed increases, the 

spectral efficiency of the system will remain the same. 

Data 

Storage 

Table 2: DIMA FPGA Device Clock Speeds 

Device Final Implementation 

Clock Speeds (MHz) 

Characterized Performance 

Clock Speeds (MHz) 

MPC 40 40 

PMD 200 135 

RLS 204 140 

NON-REAL-TIME EXPERIMENTAL SETUP 

Figure 2: DIMA Non-Real-Time Test Block Diagram 

The Non-Real-Time (NRT) tests used three transmitters 

and one receiver as shown in Figure 2. Each node consists 

of the Tx/Rx hardware as depicted in Figure 1 (minus the 

T/R switch and with a new synchronization line input). 

Waveforms were generated in the MATLAB simulation 

environment and stored as binary data files containing IF 

waveforms and parameters (center frequency, time delay, 

attenuation) for all the transmitters. The receiver acted as 

a control node as it signaled all nodes to transmit via 

synchronization lines attached to each node. The 

transmitters then sent all their data while the receiver 

recorded the resulting waveform. The received waveform 

was then transferred into MATLAB and processed with 

fixed point PHY receiver algorithms. 

Tx2 

Remote 

User Control 

PC 

MATLAB Testbed 

Fixed Point DIMA 

PHY Transmitter 

Fixed Point DIMA 

PHY Receiver 

Ethernet 

30 m 

Software Defined Radio – Tx 1 

SBC FPGA Exciter 


30 m 

30 m 

Amp 

SBC FPGA Exciter Amp 


SBC FPGA Exciter Amp 

Software Defined Radio – Rx 1 

SBC FPGA Tuner Amp 

Tx3 

Rx 

Tx1 

Figure 3: DIMA Non-Real-Time Test Field Locations

Table 3: DIMA Non-Real-Time Test Results (CBER = Channel Bit Error Rate, 

BER = Decoded Bit Error Rate, PER = Packet Error Rate). 

Experiment SNR Distribution SINR Distribution Total Packets Sent CBER BER PER 

Low SNR 5 Users @ 5dB 5 Users @ -6.4dB 100 4.8e-4 0 0% 

Near-Far 1 4 Users @ 5dB, 

1 User @ 35dB 


1 User @ 45dB 


2 User @ 45dB 


3 User @ 30dB 


4 User @ 30dB 

4 Users @ -40.0dB 

1 User @ 33.6dB 

4 Users @ -30.0dB 

1 User @ 23.6dB 

3 Users @ -43.dB 

2 Users @ 0.dB 

2 Users @ -29.8dB 

3 Users @ -3.0dB 

1 User @ -31.0dB 

4 Users @ -4.8dB 

To emulate more than three transmitters when only 

three were physically available, multiple transmit IF 

waveforms were synthesized together to be sent from each 

transmitter. This NRT testbed accomplished this by 

adding signals at IF after applying realistic carrier offsets, 

time delays, and clock drifts to each signal to simulate 

multiple physical radios. The NRT test took place on a 

test range as depicted in Figure 3. The distance limit of 30 

meters was solely due to limitations of running power and 

synchronization cables around the test range. 

NON-REAL-TIME RESULTS 

The NRT test results verified that the fixed point PHY 

algorithm models meet the requirements for the PHY layer 

design. Table 3 summarizes the results and shows how the 

algorithms operated successfully at key power spreads (up 

to 40dB near-far suppression) with less than 1% PER (for 

packets with 512 byte payloads). The results also show 

where the algorithms breakdown as they could not 

maintain less than 1% PER with more than one user 40dB 

above the lowest power user. 

CBER 

10 0 

10 -2 

10 -4 

10 -6 

10 

2 4 6 8 10 12 14 16 

-10 

10 -8 NRT test results 

Theoretical Rayleigh Channel 

Theoretical AWGN Channel 

Theoretical Rician Channel (K factor 13) 

Eb/No 

Figure 4: DIMA Test Range Channel Performance Results 

(Single User Tests, CBER = Channel Bit Error Rate, Eb/No = 

Energy per bit divided by Noise Spectral Density) 


1000 1.1e-4 0 0% 

1000 3.6e-3 < 2e-5 < 1% 

300 3.5e-2 < 2e-4 < 2% 

200 2.1e-4 0 0% 

200 4.3e-4 0 0% 

Other key tests helped to verify parameter estimation 

performance (resulting in a probability of detection, Pd, of 

0.999, and a probability of false alarm, Pfa, of 1x10 -8 at 

5dB SNR), quantify hardware imperfections (clock 

accuracies measured as below 0.5 ppm and carrier offsets 

of ±50 Hz among others), and observe characteristics of 

the propagation environment on the test range. Figure 4 

shows single user performance results for a number of 

theoretical channels as well as measured test range results 

using the NRT testbed. The test range channel closely 

resembled a Rician channel with a K factor of 13, which 

was expected due to the moderately low number of local 

scatterers in the test environment. 

REAL-TIME EXPERIMENTAL SETUP 

Figure 5 shows the locations on the test range of the 

radio nodes for the Real-Time (RT) tests. 

Tx1 

175 m 

Tx3 

Tx2 

Rx 

120 m 

6 m 

Tx4 

Figure 5: DIMA Real-Time Test Field Locations 

Tx5

Tests consisted of six radio nodes, as described in 

Figure 1 and depicted in Figure 6. Each node acted as a 

transceiver and carried out the DIMA protocol as 

described in Eisenberg [3]. Ethernet connected the nodes 

to a test terminal to allow for remote configuration and 

control of the network. This remote control allowed the 

system to test various power spread scenarios from static 

location by varying the transmit power at each node. 

Custom RF 

Board 

Tuner 

Exciter 

FPGA Board 

Single Board 

Computer 

Figure 6: DIMA Real-Time Prototype Hardware (Photo) 

Performance testing utilized a random packet generator 

call Iperf to measure throughput, PER, and latency jitter at 

the application layer. Custom software provided PHY 

layer throughput, PER, and signal-to-noise-ratio (SNR) 

estimates. Other applications, including TeamSpeak 

(voice and chat) and VLC Player (streaming video) were 

used to demonstrate the prototype system’s compatibility 

with any type of IP layer data. 

Other key RT test parameters included: 

• Carrier Frequency: 391 MHz 

• Bandwidth: 2.5 MHz 

• Test Duration: 5 minutes (unless otherwise stated) 

• Traffic Profile: 5 users sending data to 1 receiver, 

many-to-one (unless otherwise stated) 


Performance of the DIMA system was compared to 

results from tests using the 802.11 protocol (in ad-hoc 

mode) to show the spectral efficiency and latency 

improvements provided by the MUD technology. At the 

target SNR (5dB), both DIMA and 802.11 have an Eb/N0 

of approximately 15dB, resulting in 802.11 operating in 

the Direct Sequence Spread Spectrum (DSSS) 2Mbps 

mode. In this mode, 802.11 had a spectral efficiency of 

0.0526 bits/Hz (1157kbps in 22MHz of bandwidth). This 

value was calculated using analytic models [9], verified 

through OPNET simulations, and validated by measuring 

the performance of a real over-the-air ad-hoc 802.11 

network. 

REAL-TIME RESULTS 

The RT test results validated that the DIMA concept 

can provide large gains in terms of spectral efficiency 

(aggregate capacity) and latency jitter over comparable adhoc 

systems. Table 4 summarizes the RT test results. In 

the baseline comparison at low SNR, DIMA achieved 3.5 

times the spectral efficiency of the 802.11 system. The 

improvement in latency jitter (which is very important in 

streaming applications) was even greater as DIMA 

provided an average latency jitter 11 times lower than the 

802.11 system. This latency jitter reduction was enabled 

by the DIMA system’s ability to allow more than one node 

to transmit at the same time. While the overall throughput 

of the 802.11 system was higher due to its much greater 

bandwidth (22MHz compared to DIMA’s 2.5MHz), 

latency jitter is unaffected by bandwidth and hence it is a 

good metric for measuring how long nodes are forced to 

wait between successive channel accesses. 

As in the NRT tests, various SNR distributions were 

studied to analyze the DIMA system’s near-far 

suppression capabilities. As expected, the performance of 

the RT system was slightly below the results obtained 

from the NRT tests. As can be seen when comparing tests 

with four users at 5dB and one user at 35dB SNR, the 

NRT results showed 0% PHY PER while the RT system 

only achieved 0.91% PER. These differences are 

attributable to a number of factors. First, the fixed-point 

models used in the NRT tests only covered the MUD 

receiver algorithms. Therefore, quantization effects from 

the IF-to-baseband conversion and parameter estimation 

functions reduced performance. In addition, system level 

impairments due to the MAC-PHY interface and to the 

MAC being implemented on a non-real-time Linux kernel 

affected the RT system. Despite these effects, the RT 

DIMA system still demonstrated the benefits of MUD 

receiver technology.

Table 4: DIMA Real-Time Test Results (SINR = signal-to-interf.-plus-noise-ratio). SNR values averaged over the test duration and are 

not precisely at target values due to min. atten. setting increments of 1dB. Throughput and Capacity measured at Application Layer. 

Experiment Aggregate Aggregate PHY Layer App. Layer App. Layer SNR (dB) SINR (dB) 

Throughput Capacity PER PER Latency Jitter 

(bits/sec/Hz) 

(ms) 

802.11 

2Mbps mode 

1126kbps 0.0526 

802.11 Baseline Comparison Test 

0% 0% 54 5 (target) 

DIMA Real-Time System 


5 (no interference due to 

collision avoidance) 

Low SNR 460kbps 0.184 0.5% 0% 5 5.2, 5.3, 5.4, 5.5, 5.5 -6.5, -6.5, -6.3, -6.2, -6.2 

Near-Far 1 

(30dB Spread) 

NF2 (30dB Spread, 

2 Loud Users) 

NF3 

(Distributed Power) 

Stability Test 

(4 hours) 

460kbps 0.184 

460kbps 0.184 

460kbps 0.184 

460kbps 0.184 

Additional RT tests not summarized in Table 4 

demonstrated various other DIMA system capabilities. 

MAC functionality tests included: 

• Talking Pairs: demonstrated multiple concurrent 

transmissions where each receiver filtered out 

unintended signals and successfully received their 

intended packets (three concurrent sessions were 

possible with six nodes). 

• Dying Node: demonstrated infrastructure-less 

operations and the lack of any single-point-of-failure. 

Each node was removed from the network individually 

and in groups without detrimental effects on any nodes 

remaining in the network. 

• Multicast: demonstrated ability to send packets to 

multiple recipients simultaneously instead of requiring 

separate transmissions (Broadcast is a special case of 

multicast that is also supported). 

To test the stability of the DIMA system, the network was 

configured for five nodes continuously streaming data to 

one receiver at low SNR for four hours. During this 

period, over 350,000 random 512byte packets were 

transmitted simultaneously from each of the five 

transmitters with only a 0.40% PER. Finally, high 

spreading mode tests were conducted where each symbol 

was spread by an additional factor of 8 chips per symbols 

on top of the baseline spreading rate. This mode was 

developed to allow operation at even lower SNR ranges. 

CONCLUSIONS 

The DIMA program successfully implemented a realtime 

ad-hoc communications system, which demonstrated 

the capacity and latency gains possible by utilizing a 

0.9% 0% 10 

1.5% 0.1% 10 

0.1% 0% 9 

5.5, 5.0, 5.1, 5.5, 

34.7 

5.2, 5.6, 5.0, 

30.1, 30.0 

5.0, 10.3, 17.2, 

23.1, 29.9 

-29.3, -29.7, -29.6, -29.2, 

23.1 

-27.9, -27.5, -28.1, 

0.1, -0.2 

-25.9, -20.6, -13.6, 

-7.1, 5.6 

0.4% 0% 5 5.8, 5.4 5.3, 5.6, 5.2 -6.1, -6.6, -6.8, -6.4, -5.6 

MUD-based receiver. In military applications, having 

access to robust communications without infrastructure or 

single-points-of-failure, while sending more data in less 

bandwidth than currently possible can enable new 

capabilities and missions that enhance the effectiveness of 

the warfighter. 

REFERENCES 

[1] S. Verdu, Multiuser Detection, Cambridge University 

Press, Cambridge, UK, 2003. 

[2] R. Lupas, S. Verdu, “Near-far resistance of multiuser 

detectors in asynchronous code-division multiple-access 

channels”, IEEE Trans. Comm. Vol 38, April 1990. 

[3] R. Learned et al. “Interference Multiple Access Wireless 

Network Demonstration Enabled by Real-Time Multiuser 

Detection”, Proc IEEE RWS, Orlando, Fl, 2008. 

[4] Y. Eisenberg, K. Conner, M. Sherman, J. Niedzwiecki, R. 

Brothers, “MUD Enabled Media Access Control for High 

Capacity, Low-Latency Spread Spectrum Comms”, 

Proceedings of the IEEE MILCOM, Orlando, FL, 2007. 

[5] Mobile Station-Base Station Compatibility Standard for 

Dual-Mode Wide-Band Spread Spectrum Cellular System 

TIA/EIA Interim Standard 95 (IS-95), (amended as IS-95- 

A May 1995), July 1993. 

[6] M. Mouly, M. B. Pautet, “Current evolution of the GSM 

systems,” IEEE Pers. Commun., vol. 2, pp. 9-19, Oct 1995. 

[7] IEEE Std. 802.11-1999 Part 11: Wireless LAN Medium 

Access Control (MAC) and Physical Layer (PHY) 

specifications, Reference number ISO/IEC 8802- 

11:1999(E), IEEE Std. 802.11, 1999 edition, 1999. 

[8] S. Hayken, Adaptive Filter Theory, Prentice Hall, Upper 

Saddle River, NJ, Third Edition, 1996. 

[9] G. Bianchi, Performance analysis of the IEEE 802.11 

distributed coordination function. IEEE Journal on 

Selected Areas in Communications, 18(3):535-547, March 

2000.

Real Time Implementation of a Multiuser Detection Enabled

Create successful ePaper yourself

Delete template?

Save as template?