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ATCA, MTCA & AMC<br />
PCI Express <strong>in</strong>terconnects<br />
<strong>in</strong> high-performance xTCA systems<br />
By Gene Juknevicius and Joerg Hollerith, GE Intelligent Platforms<br />
This article shows that the<br />
PCIe <strong>in</strong>terconnect offers a<br />
number of advantages<br />
<strong>com</strong>pared to other highperformance<br />
<strong>com</strong>put<strong>in</strong>g<br />
<strong>in</strong>terconnect options.<br />
n PCI Express (PCIe) is the native <strong>in</strong>terface <strong>in</strong><br />
many processor architectures <strong>in</strong>clud<strong>in</strong>g most<br />
popular x86 processors, and often is perceived<br />
as a chip-to-chip <strong>in</strong>terface. Other <strong>in</strong>terface options,<br />
such as Ethernet, Inf<strong>in</strong>iBand, and Fibre<br />
Channel, require additional controller devices<br />
that are connected to CPU via PCIe, hence<br />
add extra cost and power and have higher latency<br />
and lower throughput. Consequently, it<br />
makes a lot of sense to use native PCIe wherever<br />
possible. In the past, PCIe <strong>in</strong>terface use was<br />
limited to connect<strong>in</strong>g the processor to I/O devices.<br />
Today, however, PCIe technology allows<br />
a broader spectrum of usage models far beyond<br />
simple I/O connectivity. PCIe is ideally suited<br />
to <strong>in</strong>terconnect multiple processors not only<br />
on the same board, but also on different boards<br />
or even enclosures.<br />
The PCIe <strong>in</strong>terconnect offers a number of<br />
technical advantages, <strong>in</strong>clud<strong>in</strong>g low latency,<br />
high data throughput, low CPU utilization,<br />
low cost of implementation, and low power<br />
consumption. Other connectivity options,<br />
such as Ethernet and Inf<strong>in</strong>iBand are implemented<br />
us<strong>in</strong>g PCIe, mean<strong>in</strong>g that <strong>in</strong> terms of<br />
the basic <strong>com</strong>munication properties, they will<br />
always be at a disadvantage <strong>com</strong>pared to<br />
native PCIe between boards. Obviously, us<strong>in</strong>g<br />
native PCIe does not suit every application.<br />
Requirements such as connectivity over long<br />
distances (more than ~25m), scalability to a<br />
large number of <strong>in</strong>terconnected devices and<br />
application <strong>in</strong>terfaces, will limit the use cases<br />
for PCIe. Today, however, PCIe can do much<br />
more than simply connect the processor to<br />
I/O devices. Non-transparent port operation,<br />
the primary feature that expands usability of<br />
PCIe, can be used to <strong>in</strong>terconnect multiple<br />
processors, each act<strong>in</strong>g as a root <strong>com</strong>plex.<br />
Such connectivity allows a processor memory<br />
w<strong>in</strong>dow to be mapped <strong>in</strong>to the memory space<br />
of another processor. This <strong>in</strong>terface enables a<br />
basic, but very high-performance <strong>com</strong>munication<br />
model. Unfortunately, at this time there<br />
are no well-accepted APIs for the applications<br />
to use for this <strong>com</strong>munication model, but<br />
that is about to change. A network direct<br />
driver for W<strong>in</strong>dows, currently <strong>in</strong> development,<br />
will enable the native PCIe connectivity option<br />
to be used for high-performance <strong>com</strong>put<strong>in</strong>g<br />
clusters and other applications.<br />
PCIe has already an important role as an <strong>in</strong>terconnect<br />
option <strong>in</strong> ATCA and MTCA environments.<br />
In the ATCA world, PCIe is a valid<br />
backplane <strong>in</strong>terconnect option, however, Ethernet<br />
dom<strong>in</strong>ates for backplane connectivity.<br />
Certa<strong>in</strong>ly, standard PCIe-based ATCA blades<br />
and hubs can be developed but significant eng<strong>in</strong>eer<strong>in</strong>g<br />
effort is required. On the other hand,<br />
and by customiz<strong>in</strong>g ATCA backplanes, remov<strong>in</strong>g<br />
unnecessary ATCA features and design<strong>in</strong>g<br />
specific ATCA-like blades, implementers can<br />
June 2011 10<br />
create high-performance cost-effective systems.<br />
Furthermore, most current standard ATCA<br />
s<strong>in</strong>gle board-<strong>com</strong>puters (SBCs) route one or<br />
more PCIe <strong>in</strong>terfaces to a rear transition module<br />
(RTM) via the Zone 3 connector. ATCA<br />
supports an optional Zone 3 backplane that<br />
can be used to provide an additional <strong>in</strong>terconnect<br />
option between the standard Ethernetbased<br />
ATCA blades.<br />
In the MTCA world, the PCIe <strong>in</strong>terconnect is<br />
very popular. A number of AdvancedMCs<br />
(AMCs) as well as MicroTCA carrier hubs<br />
(MCHs) on the market support PCIe connectivity.<br />
Furthermore, MTCA supports both<br />
po<strong>in</strong>t-to-po<strong>in</strong>t <strong>in</strong>terconnect between different<br />
boards as well as <strong>in</strong>terconnection via a PCIe<br />
switch on the MCH. The follow<strong>in</strong>g implementation<br />
example of a control system for the<br />
semiconductor manufactur<strong>in</strong>g equipment highlights<br />
PCIe features and usage models.<br />
Semiconductor manufactur<strong>in</strong>g equipment is<br />
typically size-restricted, and sometimes has<br />
higher environmental requirements for temperature,<br />
shock and vibration. Additional environmental<br />
restrictions also may be imposed<br />
if part of the control system is mounted onto<br />
movable <strong>com</strong>ponents. For most semiconductor<br />
control systems, <strong>com</strong>munication throughput<br />
and latency <strong>in</strong> particular are very important.<br />
Such a controller might consist of a few proces-