Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
SYS_RST<br />
5<br />
5<br />
4<br />
CONFIG_DATA<br />
4<br />
3<br />
D D<br />
0.0 OHM RESISTOR<br />
ADDED JUST IN CASE<br />
EXTERNAL RESET<br />
DOES NOT WORK.<br />
EPF60XX IS CONFIGURED TO BE<br />
AN FPGA MASTER<br />
D<br />
/CONF_DONE_CPU<br />
THIS PIN RETURNS<br />
TO MPC AS A<br />
DIGITAL INPUT.<br />
CLK_FPGA<br />
C C<br />
ALL IN ONE BIG FPGA<br />
RESETTING OF THE<br />
FPGA PART OCCURS<br />
HERE.<br />
SP_FPGA<br />
/SRESET<br />
+3.3V<br />
B B<br />
TDI-FPGA<br />
TCK-FPGA<br />
TMS-FPGA<br />
+3.3V<br />
CLK_FPGA<br />
D<br />
TDO-FPGA<br />
+3.3V<br />
10K<br />
CONFIG_CLK<br />
COMES FROM<br />
CLOCK<br />
DRIVER IC<br />
D<br />
/CONF_DONE_CPU<br />
CONFIG_STAT<br />
D<br />
+3.3V<br />
CANARY<br />
D12<br />
+3.3V<br />
+3.3V<br />
+3.3V<br />
D<br />
D<br />
+3.3V<br />
D<br />
A A<br />
ALL OFF-SHT NETS:<br />
PORTS UP TO BLKS<br />
ON SHT _8_<br />
U37Y<br />
GLOBAL IN<br />
GLOB_IN1<br />
GLOB_IN2<br />
GLOB_IN3<br />
U37X<br />
JTAG<br />
L3<br />
L1<br />
L20<br />
GLOB_IN4 K19<br />
IO_180 W17<br />
DEV_CLRn C9<br />
DEV_OE A12<br />
EPF6024ABC<br />
Y11<br />
TDI<br />
T3<br />
E1<br />
RP23C 10K<br />
3 14<br />
J3<br />
TDO T17<br />
TCK V1<br />
TMS P3<br />
EPF6024ABC<br />
nCONFIG<br />
DCLK C10<br />
DATA B10<br />
CONF/DONE E18<br />
nSTATUS W11<br />
V18<br />
nCEO<br />
EPF6024ABC<br />
U37W<br />
GLOBAL CS<br />
U37V<br />
MSEL<br />
nCE<br />
5 12<br />
RP23E 10K<br />
CONFIG<br />
nRS C13<br />
nWS B15<br />
CS A17<br />
nCS B17<br />
CLKUSR G17<br />
RDYnBSY G20<br />
INIT_DONE J19<br />
EPF6024ABC<br />
TS258<br />
RP23H<br />
10K<br />
RP23D 10K<br />
4 13<br />
RP23B 10K<br />
2 15<br />
8 9<br />
TL28-1<br />
TL28-2<br />
TL28-3<br />
TL28-4<br />
TL26-1<br />
TL26-2<br />
TL26-3<br />
TL26-4<br />
7 10<br />
RP23G<br />
1 16<br />
1.21K R28<br />
RP23A<br />
10K<br />
VCCINT1 D20<br />
VCCINT2<br />
F3<br />
VCCINT3 K20<br />
VCCINT4<br />
L2<br />
VCCINT5<br />
T20<br />
VCCINT6 U1<br />
U37Z<br />
GND1<br />
GND2<br />
GND3<br />
GND4<br />
GND5<br />
GND6<br />
GND7<br />
GND8<br />
GND9<br />
GND10<br />
GND11<br />
GND12<br />
GND13<br />
A1<br />
D4<br />
D8<br />
D13<br />
D17<br />
H4<br />
H17<br />
N4<br />
N17<br />
U4<br />
U8<br />
U13<br />
U17<br />
TL23-1<br />
TL23-2<br />
TL23-3<br />
TL23-4<br />
6 11<br />
1<br />
RP23F<br />
10K<br />
2<br />
U36 20PLCC_FOR_EPC1441<br />
4<br />
DCLK VCC1<br />
20<br />
VCC2/SER_EN<br />
18<br />
2<br />
DATA<br />
9<br />
8<br />
nCS<br />
OE<br />
VCCIO1 D6<br />
VCCIO2 D11<br />
VCCIO3 D15<br />
VCCIO4<br />
F4<br />
VCCIO5<br />
F17<br />
VCCIO6 K4<br />
VCCIO7<br />
L17<br />
VCCIO8 R4<br />
VCCIO9 R17<br />
VCCIO10 U6<br />
VCCIO11 U10<br />
VCCIO12 U15<br />
EPF6024ABC<br />
POWER<br />
GND 10<br />
nCASC 12<br />
C172<br />
0.1uF<br />
CAP_0603<br />
C427<br />
0.01uF<br />
CAP_0603<br />
C424<br />
0.01uF<br />
3<br />
+3.3V<br />
CAP_0603<br />
C421<br />
0.01uF<br />
z_U36<br />
97055-98014<br />
IC Assy, Socketed<br />
Programmable<br />
IC PROG. FPGA CONFIG,EPC1441,61010,U36<br />
CAP_0603<br />
C428<br />
0.01uF<br />
CAP_0603<br />
C422<br />
0.01uF<br />
13 9<br />
14 8<br />
PLCC20-<br />
PROM<br />
18 4<br />
19 1 3<br />
CAP_0603<br />
C429<br />
0.01uF<br />
CAP_0603<br />
C426<br />
0.01uF<br />
2<br />
CAP_0603<br />
C425<br />
0.01uF<br />
2<br />
THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION OF THERMO ELECTRON AND IS TENDERED SUBJECT TO THE CONDITIONS THAT<br />
THE INFORMATION: (A) BE RETAINED IN CONFIDENCE. (B) NOT BE REPRODUCED OR COPIED IN WHOLE OR IN PART AND (C) NOT BE USED OR<br />
INCORPORATED IN ANY PRODUCT, EXCEPT UNDER AN EXPRESS WRITTEN AGREEMENT WITH THERMO ELECTRON CORPORATION.<br />
REV BRIEF DESCRIPTION OF CHANGE ECO<br />
DATE BY APPR.<br />
- SEE PAGE 1<br />
CAP_0603<br />
C423<br />
0.01uF<br />
<strong>Thermo</strong><br />
ELECTRON CORPORATION<br />
Title<br />
1<br />
Size Document Number Rev<br />
C<br />
09-FPGA Config<br />
97055-91010<br />
355 River Oaks Pkwy, San Jose, CA 95134-1991<br />
SCH, PCB, DIGITAL BOARD, LTQ<br />
Date: Wednesday, March 09, 2005 Sheet of<br />
1<br />
VOLTS THIS PAGE:<br />
+3.3V<br />
GND THIS PAGE:<br />
DGND<br />
9 27<br />
B
Change language