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5<br />
5<br />
4<br />
4<br />
3<br />
D D<br />
CLK_FPGA<br />
/SRESET<br />
/SYS_RST<br />
/BUF_DATA_OUT_EN<br />
/CS1<br />
CLK_FPGA<br />
IO_DIR<br />
/DIG_IO_OE<br />
/CONF_DONE_CPU<br />
IO_DIR<br />
C C<br />
PD[17:19]<br />
R/W<br />
SCAN_SP0_TFS<br />
SCAN_SP0_DT<br />
SCAN_SP0_TCLK<br />
/CS2<br />
/CS3<br />
/IRQ0<br />
/IRQ1<br />
S/IRQ2<br />
ACK<br />
DSP/MS3<br />
DSP/MS1<br />
PD[17:19]<br />
SPI_BOARDS_MISO SPI_BOARDS_MISO<br />
PD16<br />
MISO PD16<br />
to DIFF.<br />
ICs<br />
PD18 = SPICLK<br />
S/IRQ2<br />
ACK<br />
DSP/MS3<br />
DSP/MS1<br />
SCAN_SP0_TFS<br />
SCAN_SP0_DT<br />
SCAN_SP0_TCLK<br />
SCAN_LED<br />
SCAN_LED<br />
B B<br />
A A<br />
ALL OFF-SHT NETS:<br />
PORTS UP TO BLKS<br />
ON SHT _1_<br />
IO_DIR<br />
/DIG_IO_OE<br />
CLK_FPGA<br />
/SRESET<br />
/SYS_RST<br />
STAT LED's<br />
STAT TP's<br />
SEE sht: 11_FPGA_Dig_I_O_Foldr<br />
_<br />
CANARY<br />
LED<br />
/CONF_DONE_CPU<br />
SEE sht: 09_FPGA_Config_Foldr<br />
_<br />
/CONF_DONE_CPU<br />
/BUF_DATA_OUT_EN<br />
/CS1<br />
/DIG_IO_OE<br />
IO_DIR<br />
PD[17:19]<br />
R/W<br />
/CS2<br />
/CS3<br />
/IRQ0<br />
/IRQ1<br />
S/IRQ2<br />
ACK<br />
DSP/MS3<br />
DSP/MS1<br />
SCAN_SP0_TFS<br />
SCAN_SP0_DT<br />
SCAN_SP0_TCLK<br />
FPGA_Dig_I_O<br />
FPGA_Config<br />
FPGA_Global_Sigs<br />
SEE sht: 10_FPGA_Global_Sigs_Foldr _<br />
SCAN_LED<br />
3<br />
2<br />
2<br />
THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION OF THERMO ELECTRON AND IS TENDERED SUBJECT TO THE CONDITIONS THAT<br />
THE INFORMATION: (A) BE RETAINED IN CONFIDENCE. (B) NOT BE REPRODUCED OR COPIED IN WHOLE OR IN PART AND (C) NOT BE USED OR<br />
INCORPORATED IN ANY PRODUCT, EXCEPT UNDER AN EXPRESS WRITTEN AGREEMENT WITH THERMO ELECTRON CORPORATION.<br />
REV BRIEF DESCRIPTION OF CHANGE ECO<br />
DATE BY APPR.<br />
- SEE PAGE 1<br />
<strong>Thermo</strong><br />
ELECTRON CORPORATION<br />
Title<br />
1<br />
Size Document Number Rev<br />
C<br />
08-FPGA Top<br />
97055-91010<br />
355 River Oaks Pkwy, San Jose, CA 95134-1991<br />
SCH, PCB, DIGITAL BOARD, LTQ<br />
Date: Wednesday, March 09, 2005 Sheet of<br />
1<br />
8 27<br />
B
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