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5 5 4 4 3 A3 OUT FORCE 1 2 C54 100nF +15V [4,7,8,9] +5V +5V - SEE PAGE 1 ECO D AGND -10VREF -10VREF AGND D 1 A3 OUT SENSE 3 A4 OUT SENSE 14 2 4 13 11 A3 IN A4 IN Vct +Vs 2 -10VREF C46 1 C56 100nF 12 5 7 BAL ADJ GAIN ADJ NOISE REDUCT. 100nF TPW25 MASS DAC V VREF A4 OUT FORCE +15V 0V --> +10V C AGND AGND AGND -15V [4] /DACSYNC DDATA_B [4] DDATA [4] DCLK /DACCLR AGND AGND 5 LD1 9 LD2 6 SRO 7 SRI 10 STB3 11 STB4 13 CLR 4 STB1 U21 LTC1596ACSW OUT1 OUT2 1 2 RFDAC- AGND -15V AGND RFSET_A RFSET_A [7,8] DAC A (Main RF) C +5V AGND 8 STB2 15 8 V LOW 6 10 9 VHIGH GND SENSE -IN GND SENSE +IN -Vs 16 2 C53 1 100nF 1 2 3 4 NC V+ -IN VOUT +IN DNC* V- NC 7 6 8 C39 100nF 5 1 C55 2 100nF 2 100pF 1 C50 U25 LT1468CS8 1 2 AGND AGND VERNIER DAC V +15V [4] /DACSYNC 0V --> +10V +5V AGND C100 +15V AGND AGND B 100nF 1 B NC V+ 7 AGND AGND VDACOUT- 2 DDATA_B -IN RFSET_B VOUT 6 [4] DCLK RFSET_B [7] 3 +IN DNC* 8 4 V- NC DAC B(Vernier) DET_TEMP DET_TEMP[2] /DACCLR 5 R104 R103 1K 1K 2 1 1 2 5 C52 LD1 2 U26 C87 100pF LT1468CS8 C99 9 VREF LD2 1 6 SRO U22 100nF 100nF OUT1 1 7 U38 SRI LTC1596ACSW OPA277U 10 STB3 U36 1 OT1 V+ 7 11 AD22100KR STB4 2 -IN OUT2 2 1 V+ OUT 6 13 CLR AGND C89 100nF 1 4 2 GND Vo TEMPSENSE AGND -15V AGND /DACCLR -10VREF AGND AGND AGND A TEMPSENSE= V+ 22.5mv -- * [1.375+ ------ ] * Ta <strong>Thermo</strong> ELECTRON CORPORATION 355 River Oaks Pkwy, San Jose, CA 95134-1991 A 5V deg C Title SCH, PCB, SINGLE DETECTOR BOARD DET_TEMP= 2*TEMPSENSE 2 AD22100KR 5 3 2 U17 MAX823LEUK VCC MR GND 1 2 RESET WDI C74 100nF U30 AD588KQ 1 4 3 4 +IN V- 1 2 100nF C101 2 1 NC 5 OT2 8 NOTE: TPW35 DET_TEMP 1 1 TPW23 1 1 DET_TEMP= 2*TEMPSENSE THE DAC SERIAL DATA STREAM IS COMPOSED OF TWO CONCATENATED 16 BIT WORDS. THE FIRST HALF GOES TO DAC B (Vernier). THE SECOND HALF INTO DAC A (Main RF) THE PAIR OF WORDS SHOULD BE SENT AS ONE 32-BIT WORD. IF ONLY DAC A IS TO BE LOADED, THAN 16 BITS ARE TRANSMITTED FOLLOWED IMMEDIATELY BY DEASSERTING THE ~DAC_SYNC. BOTH DAC OUTPUT REGISTERS ARE LOADED WHEN ~DAC SYNC IS ASSERTED. 4 8 3 STB1 STB2 2 15 C47 100nF 15 1 DGND 12 DGND 12 AGND +5V VDD 14 AGND VDD 14 AGND 3 AGND 3 RFB 16 RFB 16 1 RFSET_A 2 THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION OF THERMO ELECTRON AND IS TENDERED SUBJECT TO THE CONDITIONS THAT THE INFORMATION: (A) BE RETAINED IN CONFIDENCE. (B) NOT BE REPRODUCED OR COPIED IN WHOLE OR IN PART AND (C) NOT BE USED OR INCORPORATED IN ANY PRODUCT, EXCEPT UNDER AN EXPRESS WRITTEN AGREEMENT WITH THERMO ELECTRON CORPORATION. REV BRIEF DESCRIPTION OF CHANGE DATE BY APPR. 2 RFSET_B 2 AGND -15V DACS Size Document Number Rev B 1 1 2 2 97055-91430 Date: Thursday, May 12, 2005 Sheet 1 5 of 9 1 1 1 TPW22 VERNIER DAC 1 1 MASS DAC V B
5 5 +15V 4 4 3 - SEE PAGE 1 D +VDF D -VDF TEMP COMP 1 A A/C 3 C102 100nF R201 15K 2 R93 2 5.62K R205 182K R94 49.9K 1 HSMS-2812 U201 ADR589JR 1 2 1 2 AGND 1 R200 15K -VDF +VDF C TPB1 AGND 2 -15V +15V AGND +15V DET_RF_Bis a +V. C 00004-99-00027 AGND RFIN_B 1 R75 1K C95 DET_RF_B- DIFFERENCE AMPLIFIER +15V J2 97000-20218 RFIN_B +15V AGND 2 R100 178 1 L3 470uH, 10% C64 1nF 1 2 2 AGND -15V AGND 100nF -15V AGND -V out DET_RF_B [7,8] B C 1 2 C72 22nF L4 AGND +15V DET_RF_B+ -15V 100nF C91 AGND TPW26 DET_RF_B- B AGND -15V TPW36 DET_CAP 470uH, 10% +15V C92 AGND 1 R61 6.81K 2 A 1 R67 C94 100nF MMBT3904/SOT-23 1 R86 2 R64 100 1 Q5 1 2 Null -IN +Vs OUT 7 6 C75 100nF 3 D12 A/C 1 2 100 22nF C71 2 R66 715 0.1% 5ppm 3 4 +IN -Vs NC HSMS-2812 2 1 5 1 OT1 V+ 7 2 3 4 -IN +IN V- OUT NC 6 1 U37 AD847 R62 6.81K 2 Null 8 5 U33 OPA277U OT2 8 C90 100nF C70 1 2 3 4 REF -IN +IN V- SENSE 1 2 C73 2.2uF 100nF 5 NIC V+ OUTPUT 7 6 8 TPW51 DET_CAP U31 INA154U 1 1 1 1 2 2 1 1 100nF C103 4 8 4 8 1 U202 ADR589JR 1 2 1 2 R101 3.32K 1 R83 100 1 OT1 V+ 7 100nF 2 DET_RF_B+ 2 1 2 -IN OUT 6 2 1 Q4 MMBT3906/SOT-23 AGND 2 1 C63 1nF 3 4 +IN V- NC R63 100 DET_RF_B+ is a -V A AGND AGND AGND -15V RF DETECTION CIRCUIT <strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991 A AGND -15V ELECTRON CORPORATION Title SCH, PCB, SINGLE DETECTOR BOARD 5 2 R102 16.5K 1 TPB2 AGND U32 OPA277U 1 TPW27 1 1 2 C76 150pF 00004-99-00027 DET_RF_B- 2 OT2 8 R74 1K 1 C93 100nF 1 2 1 1 1 1 2 R204 182K 3 1 2 R95 49.9K +15V 2 1 -15V 2 1 R89 5.62K 1 2 2 AGND AGND 2 THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION OF THERMO ELECTRON AND IS TENDERED SUBJECT TO THE CONDITIONS THAT THE INFORMATION: (A) BE RETAINED IN CONFIDENCE. (B) NOT BE REPRODUCED OR COPIED IN WHOLE OR IN PART AND (C) NOT BE USED OR INCORPORATED IN ANY PRODUCT, EXCEPT UNDER AN EXPRESS WRITTEN AGREEMENT WITH THERMO ELECTRON CORPORATION. REV BRIEF DESCRIPTION OF CHANGE ECO DATE BY APPR. 1 2 C67 100nF 715, 0.1% 5ppm 1 1 2 1 1 2 C65 100nF 2 2 C 2 D13 AGND DET_RF_B- Size Document Number Rev B TPW29 DET_RF_B- 1 1 97055-91430 Date: Thursday, May 12, 2005 Sheet 1 6 of 9 1 1 2 2 C90 1 1 1 B
Page 1 and 2:
X Y Y X 90 o S3 S3 S3 Line Voltage
Page 3 and 4:
SPI,VacOK, SYSRst, HVCTRL 5 5 4 4 3
Page 5 and 6:
5 * ONLY +5.5 VCC USED ON THIS PAGE
Page 7 and 8:
3 of 4 PWR REG, CONN 5 5 4 4 3 D D
Page 9:
5 5 4 4 3 3 2 1 THIS DOCUMENT CONTA
Page 12 and 13:
10 10 9 9 8 8 7 7 6 J J I I H H G G
Page 14 and 15:
10 10 9 9 8 8 7 7 6 J J I I H H G G
Page 16 and 17:
5 5 4 4 3 D D C C J1 CON6 1 2 3 4 5
Page 18:
5 5 4 4 3 3 2 2 1 THIS DOCUMENT CON
Page 21 and 22:
5 5 4 4 3 D D J1 CON6 1 2 3 4 5 6 Y
Page 26 and 27:
A A B TP107 THIS DOCUMENT CONTAINS
Page 28 and 29:
A A B +5V +5V C144 .01UF D D 1DIR S
Page 30 and 31:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
Page 32 and 33:
A Digital Valve Section A B +24V-AU
Page 34 and 35:
A A B +11.75V +11.75V 4 SPARE GAS P
Page 36 and 37:
A 4 TC- IS ALUMEL TC+ IS CHROMEL [1
Page 38 and 39:
A A B ( 17.8 to 14.7 KHz ) +5V +15V
Page 40 and 41:
A A -13.4V 8 4 B 6 6 C55 + + 1K .01
Page 42 and 43:
5 5 4 4 3 +5V [18] /INJECT_WASTE_LE
Page 44 and 45:
+60V A TP69 +24V-AUX +24V-AUX A B 4
Page 46 and 47:
+5V D A A SHUTDOWN_BUF B 2DIR 4 [5]
Page 48 and 49:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
Page 50 and 51:
A A B 4 4 FROM FPGA SECTION Digital
Page 52 and 53:
A A +11.75V B 4 7 + 5 4 - 6 +11.75V
Page 54 and 55:
A A B 4 4 TC- IS ALUMEL TC+ IS CHRO
Page 56 and 57:
A A B 4 4 3 3 +15VIN_IG C85 10uF 25
Page 58 and 59:
A A -13.4V B 4 4 [11] [10] [12] [13
Page 60 and 61:
[18] [18] +5V +5V 5 5 D D 4 4 3 D D
Page 75 and 76:
5 5 4 4 ACQU_SP1_DR ACQU_SP1_RFS AC
Page 77 and 78:
5 5 4 4 3 D D MALDI CABLE CONNECTOR
Page 79 and 80:
5 5 4 4 3 D D C C B B A A 3 +5V FPG
Page 81 and 82:
5 5 4 4 3 D D C C +3.3V VDDL ( ~ 2.
Page 83 and 84:
PA[0:31] 5 5 4 4 3 D D TS211 TS214
Page 85 and 86:
5 5 PPC_D[0:63] PPC_A[10:31] MODCK[
Page 87 and 88:
5 RC RC24 D 6 RC 5 RC 100pF-47ohm R
Page 89 and 90:
5 5 4 4 3 D D CLK_DDS_X3 DDS1_/WR D
Page 91 and 92:
5 5 4 4 3 D D CLK_FPGA /SRESET /SYS
Page 93 and 94:
5 5 4 4 3 D D IO_DIR IO_DIR 0 free
Page 95 and 96:
5 5 4 4 3 D D L0D[0..3] L0ACK L0CLK
Page 97 and 98:
5 SCAN_SP0_DT U25-1 DS90LV047A U27B
Page 99 and 100:
5 5 4 4 L0D[0..3] L4D[0..3] 3 D D
Page 101 and 102:
5 5 4 4 3 3 2 2 1 1 D D C C B B A A
Page 103 and 104:
5 5 4 4 3 D TURBO POWER +24V Tgnd J
Page 105:
5 5 4 4 3 3 2 2 1 1 D D C C B B A A
Page 113 and 114: 5 4 3 2 1 D +5V (NOT LOADED) +/SYS_
Page 115 and 116: 5 +3.3V 4 3 D +3.3V +3.3V D D D (3.
Page 117 and 118: 5 4 3 2 1 D C B A [2,10] [3] [3,10]
Page 119 and 120: 5 5 +150V -150V 4 4 3 D [6] LT_FRON
Page 121 and 122: [5] FOUT_GT[0..11] FOUT_GT[0..11] 5
Page 123 and 124: 5 5 4 4 3 R102 ENABLE TP13 /FORCE_8
Page 125 and 126: 5 5 4 4 3 D D C 10K C ENABLE TTL LE
Page 127 and 128: 5 4 3 [19] [19] 10K R348 ANALOG_IN1
Page 129 and 130: 5 4 8 4 - + 3 +13.4V -2.5V_REF2 "8K
Page 131 and 132: 5 P. C. B. TOP COVER TABLE OF CONTE
Page 133 and 134: 5 4 CONNECTOR- SPI AND CONTROL 5 4
Page 135 and 136: 5 LENS D-C FROM ANALOG BOARD 5 4 4
Page 137 and 138: 5 5 4 4 3 D D (CONFIG DONE) IO_TDO
Page 139 and 140: 5 PAGE 9 LOCAL POWER & UNUSED FPGA
Page 141 and 142: FROM PAGE 5 P-5, P-5, M1_DC M0_DC 5
Page 143 and 144: 5 5 4 4 3 D D P-4,15,17, +15V C C +
Page 145 and 146: 5 SIGNAL READBACKS MUX P-4,11,12, +
Page 147 and 148: 5 5 4 P-4,13,15, +15V +13V_RDBK P-4
Page 149 and 150: 5 AUXILIARY AC SIGNAL "WAMP" FROM A
Page 151 and 152: 5 +5VISOL_EXT +5ISOL (2/3A) 1 2 (5/
Page 153 and 154: 5 5 4 4 3 D D TP61 1 1 2 1 2 1 2 2
Page 155 and 156: 5 5 4 4 3 D D (2/2A) (2/2A) AUXIN-
Page 157 and 158: (4/3B,8/1A,8/1A) +18VLOCAL 5 5 4 4
Page 159 and 160: 5 5 4 4 3 D D GND GND VCC_UNF CLK-
Page 161: 5 5 4 4 3 D +5V D AGND [2,3] [3] DA
Page 165 and 166: AGND 2 5 C37 1 100nF +5V 4 3 2 D [4
Page 168 and 169: 5 5 4 4 CPU/Digital PCB L0_D[0..7]
Page 170 and 171: 5 5 4 4 3 D D GND_EARTH J16 J15 C 1
Page 172 and 173: 5 5 Source PCB 4 4 3 D D J1 A1 1 A2
Page 189: THIS DOCUMENT CONTAINS PROPRIETARY
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