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P-11, 5 5 4 4 3 D D P-4,11,15, C C CUR_LIM_SUM_NODE PRI_RF_AMPS_RDBK P-15, PRI_RF_AMPS_RDBK_REF P-15, B B RF_MODULATION RF_AMPLITUDE_CMD A A P-5, P-5, PRIMARY (+36V) CURRENT MEASUREMENT AND LIMIT CURRENT_SENSE_R RANGE: +5V --> -3V OFF ON P-11, R-F_MOD_DRIVE +13V_GC -13V_GC .01UF OCT_RF_SET OCT_RF_SET_REF -13V_GC +13V_GC 1 2 +36V_RET C57 -13V_GC D21 3 MMBD4148SE R106 4.99K NORMALLY OFF 1 2 3 -13V_GC U6A 1 - + AD712JR + U6A - AD712JR +13V_GC R22 10K 10K R116 R113 4.99K Q1 4 8 C5 .01UF GCGND MMBT4401LT1 TL27 TL29 R105 20.0K +13V_GC GCGND TL30 "GCGND" GCGND -13V_GC 2 3 D20 MMBD4148SE R123 10K 3 GCGND 6 5 4 8 GC_MOD_REF R19 C SOT-23 E B 2 100K +13V_GC 3 2 -13V_GC -13V_GC R12 4.99K R103 100K 0603 1 R110 53.6K R16 10K R114 10K R17 10K - + R21 10K 7 4 8 R104 39.2K 0603 U6B 2 1 - + 3 GCGND AD712JR AD712JR 1 U5A 100K R14 .01UF C52 R13 562 D1 MMBD4148SE R107 15K 0603 TL28 P-3, GCGND R6 0.0 +13V_GC C54 N/U 1.33MA GC_MOD_REF 1 1 TP4 "GC_MOD_REF" 1 1 GC_MOD_REF TP2 "RF CURRENT" GCGND 1 1 1 1 "GCGND" TP1 /TOP_COVER_RF_HV_ON 1 V / 100 ma -13V_GC AN OUT OF TUNE CONDITION MAY CAUSE DRIVE TRANSISTOR FAILURE. THIS MOVING CURRENT LIMIT ALLOWS "SLIGHTLY" MORE CURRENT THAN REQUIRED FOR THE MEASURED RF LEVEL. +5V=SHUT DOWN 0V=RUN 0V -> +10v TP3 "R-F AMP CMD" C55 .01UF 10K R15 0.01 50V C56 R109 100K 4 7 - + AD712JR + - AD712JR U5B 8 6 5 GCGND R255 4.99K CONTROL LOOP SUMMING POINT & INTEGRATOR GROUND PLANE REFERENCE TO GC_MOD_REF TRACE. R122 GCGND P-4,10,11,13, 0.0 GCGND GC_MOD_REF 3 2 DET_RF (DET_RF) 0V -> +10V DET_RF (DET_RF) -13V_GC R-F AMPLITUDE CONTROL GCGND +13V_GC RF_LEVEL_RDBK P-15, RF_LEVEL_RDBK_REF P-15, 0V -> +10v DET_RF GCGND U32B (DET_RF) -13V_GC 7 - + AD712JR 6 5 GC_MOD_REF RF_MODULATION C43 .01UF RF_MOD_RDBK P-15, RF_MOD_RDBK_REF P-15, + R20 90.9K C132 TP16 0.1 50V "RF LEVEL" D14 1 3 2 R98 10K C142 .01UF U33A 2 - 1 3 + AD712JR C124 R91 "GCGND" MMBD4148SE C125 0.1 50V 0.0 TP13 0.1 50V R95 TP14 10K "RF MOD" U32B R243 - AD712JR 10K R239 10K 6 5 - + AD712JR U33B 7 R92 0.0 0V -> -10v +13V_GC R-F AMPLITUDE MEASUREMENT P-11, +13V_GC P-10,11,13, FROM R-F GENERATOR RF_DET_I+ -13V_GC -13V_GC +13V_GC P-4,10,11,13, GCGND -13V_GC P-10,11,13, 10K R238 GCGND GCGND -13V_GC -0.65V P-4,10,11,13, GCGND GCGND = GENERATOR CONTROL GROUND PLANE 4 8 C42 .01UF C117 .01UF DO NOT USE 4 CR2C MA121CT 3 4 3 CR1C MA121CT -0.65V A 3 2 4 8 6 5 - + 4 - + 8 -13V_GC 2 +13V_GC 1 -0.65V U28A AD712JR C116 .01UF 1K R90 0805 U28B 7 AD712JR B R247 10K 10K R96 R244 10K 4 8 4 8 +13V_GC GCGND A B +13V_GC -13V_GC .01UF GC_MOD_REF GCGND -13V_GC +13V_GC 1 DET_RF (DET_RF) +13V_GC -13V_GC .01UF <strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991 ELECTRON CORPORATION Title Size Document Number Rev B Bias the Current Rectification Diodes to near-on condition via this identical diode. Then remove the bias voltage from the measurement. C143 10K R97 U32A AD712JR 2 3 4 - + 8 1 1 1 1 1 1 1 TP20 "DET_RF" 1 1 C126 SCH, TOP COVER BOARD 0V -> +10V R-F GENERATOR CONTROL 97055-91040 D Date: Wednesday, July 27, 2005 Sheet 12 of 17 1
5 5 4 4 3 D D P-4,15,17, +15V C C +5VA_GC B B P-4,15,17, AGND C10 + 10uF 25V tant C63 .33UF +15V AGND +15V AGND Ref=1.25V Iadj=55/120uA VOUT 2 3 VIN TAB 4 U2 LM1084IS-ADJ R117 121 GCGND GCGND R-F GENERATOR CONTROL LOCAL REGULATORS +13V_GC GCGND R24 590 1206 R118 590 1206 GCGND +5VA_GC C62 0.1 50V +5VA_GC P-10, GCGND P-4,10,11,12, GCGND P-4,10,11,12, A A GCGND = GENERATOR CONTROL GROUND PLANE ADJ 1 8 VIN VOUT 1 U7 LM78L05ACM GND1 GND2 GND3 GND4 2 3 6 7 +13V_GC P-10,11,12, C59 + C9 0.1 50V 10uF 25V tant 3 P-4,15,17, P-4,15,17, -15V +C7 +C7 10uF 25V tant 2 -13.3V +/- 0.3V 3 OUT R2 5 U1 LM2991S 6 TAB VIN 2 EN 4 GND 1 ADJ 2 R23 2.21K C58 0.1 50V -13V_GC -13V_GC P-10,11,12, AGND R112 GCGND GCGND AGND 10K Ref=1.21V R1 R111 221 Vout = Vref x (1+R2/R1) Iadj=60nA Vref = 1.21V Iadj=60nA -13.3V +/- 0.3V GCGND GCGND + C8 10uF 25V tant 1 <strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991 ELECTRON CORPORATION Title Size Document Number Rev B SCH, TOP COVER BOARD 97055-91040 D Date: Wednesday, July 27, 2005 Sheet 13 of 17 1
Page 1 and 2:
X Y Y X 90 o S3 S3 S3 Line Voltage
Page 3 and 4:
SPI,VacOK, SYSRst, HVCTRL 5 5 4 4 3
Page 5 and 6:
5 * ONLY +5.5 VCC USED ON THIS PAGE
Page 7 and 8:
3 of 4 PWR REG, CONN 5 5 4 4 3 D D
Page 9:
5 5 4 4 3 3 2 1 THIS DOCUMENT CONTA
Page 12 and 13:
10 10 9 9 8 8 7 7 6 J J I I H H G G
Page 14 and 15:
10 10 9 9 8 8 7 7 6 J J I I H H G G
Page 16 and 17:
5 5 4 4 3 D D C C J1 CON6 1 2 3 4 5
Page 18:
5 5 4 4 3 3 2 2 1 THIS DOCUMENT CON
Page 21 and 22:
5 5 4 4 3 D D J1 CON6 1 2 3 4 5 6 Y
Page 26 and 27:
A A B TP107 THIS DOCUMENT CONTAINS
Page 28 and 29:
A A B +5V +5V C144 .01UF D D 1DIR S
Page 30 and 31:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
Page 32 and 33:
A Digital Valve Section A B +24V-AU
Page 34 and 35:
A A B +11.75V +11.75V 4 SPARE GAS P
Page 36 and 37:
A 4 TC- IS ALUMEL TC+ IS CHROMEL [1
Page 38 and 39:
A A B ( 17.8 to 14.7 KHz ) +5V +15V
Page 40 and 41:
A A -13.4V 8 4 B 6 6 C55 + + 1K .01
Page 42 and 43:
5 5 4 4 3 +5V [18] /INJECT_WASTE_LE
Page 44 and 45:
+60V A TP69 +24V-AUX +24V-AUX A B 4
Page 46 and 47:
+5V D A A SHUTDOWN_BUF B 2DIR 4 [5]
Page 48 and 49:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
Page 50 and 51:
A A B 4 4 FROM FPGA SECTION Digital
Page 52 and 53:
A A +11.75V B 4 7 + 5 4 - 6 +11.75V
Page 54 and 55:
A A B 4 4 TC- IS ALUMEL TC+ IS CHRO
Page 56 and 57:
A A B 4 4 3 3 +15VIN_IG C85 10uF 25
Page 58 and 59:
A A -13.4V B 4 4 [11] [10] [12] [13
Page 60 and 61:
[18] [18] +5V +5V 5 5 D D 4 4 3 D D
Page 75 and 76:
5 5 4 4 ACQU_SP1_DR ACQU_SP1_RFS AC
Page 77 and 78:
5 5 4 4 3 D D MALDI CABLE CONNECTOR
Page 79 and 80:
5 5 4 4 3 D D C C B B A A 3 +5V FPG
Page 81 and 82:
5 5 4 4 3 D D C C +3.3V VDDL ( ~ 2.
Page 83 and 84:
PA[0:31] 5 5 4 4 3 D D TS211 TS214
Page 85 and 86:
5 5 PPC_D[0:63] PPC_A[10:31] MODCK[
Page 87 and 88:
5 RC RC24 D 6 RC 5 RC 100pF-47ohm R
Page 89 and 90:
5 5 4 4 3 D D CLK_DDS_X3 DDS1_/WR D
Page 91 and 92: 5 5 4 4 3 D D CLK_FPGA /SRESET /SYS
Page 93 and 94: 5 5 4 4 3 D D IO_DIR IO_DIR 0 free
Page 95 and 96: 5 5 4 4 3 D D L0D[0..3] L0ACK L0CLK
Page 97 and 98: 5 SCAN_SP0_DT U25-1 DS90LV047A U27B
Page 99 and 100: 5 5 4 4 L0D[0..3] L4D[0..3] 3 D D
Page 101 and 102: 5 5 4 4 3 3 2 2 1 1 D D C C B B A A
Page 103 and 104: 5 5 4 4 3 D TURBO POWER +24V Tgnd J
Page 105: 5 5 4 4 3 3 2 2 1 1 D D C C B B A A
Page 113 and 114: 5 4 3 2 1 D +5V (NOT LOADED) +/SYS_
Page 115 and 116: 5 +3.3V 4 3 D +3.3V +3.3V D D D (3.
Page 117 and 118: 5 4 3 2 1 D C B A [2,10] [3] [3,10]
Page 119 and 120: 5 5 +150V -150V 4 4 3 D [6] LT_FRON
Page 121 and 122: [5] FOUT_GT[0..11] FOUT_GT[0..11] 5
Page 123 and 124: 5 5 4 4 3 R102 ENABLE TP13 /FORCE_8
Page 125 and 126: 5 5 4 4 3 D D C 10K C ENABLE TTL LE
Page 127 and 128: 5 4 3 [19] [19] 10K R348 ANALOG_IN1
Page 129 and 130: 5 4 8 4 - + 3 +13.4V -2.5V_REF2 "8K
Page 131 and 132: 5 P. C. B. TOP COVER TABLE OF CONTE
Page 133 and 134: 5 4 CONNECTOR- SPI AND CONTROL 5 4
Page 135 and 136: 5 LENS D-C FROM ANALOG BOARD 5 4 4
Page 137 and 138: 5 5 4 4 3 D D (CONFIG DONE) IO_TDO
Page 139 and 140: 5 PAGE 9 LOCAL POWER & UNUSED FPGA
Page 141: FROM PAGE 5 P-5, P-5, M1_DC M0_DC 5
Page 145 and 146: 5 SIGNAL READBACKS MUX P-4,11,12, +
Page 147 and 148: 5 5 4 P-4,13,15, +15V +13V_RDBK P-4
Page 149 and 150: 5 AUXILIARY AC SIGNAL "WAMP" FROM A
Page 151 and 152: 5 +5VISOL_EXT +5ISOL (2/3A) 1 2 (5/
Page 153 and 154: 5 5 4 4 3 D D TP61 1 1 2 1 2 1 2 2
Page 155 and 156: 5 5 4 4 3 D D (2/2A) (2/2A) AUXIN-
Page 157 and 158: (4/3B,8/1A,8/1A) +18VLOCAL 5 5 4 4
Page 159 and 160: 5 5 4 4 3 D D GND GND VCC_UNF CLK-
Page 161 and 162: 5 5 4 4 3 D +5V D AGND [2,3] [3] DA
Page 163 and 164: 5 5 +15V 4 4 3 - SEE PAGE 1 D +VDF
Page 165 and 166: AGND 2 5 C37 1 100nF +5V 4 3 2 D [4
Page 168 and 169: 5 5 4 4 CPU/Digital PCB L0_D[0..7]
Page 170 and 171: 5 5 4 4 3 D D GND_EARTH J16 J15 C 1
Page 172 and 173: 5 5 Source PCB 4 4 3 D D J1 A1 1 A2
Page 189: THIS DOCUMENT CONTAINS PROPRIETARY
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