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5<br />
PAGE 06 FPGA W/ SPI & CANARY<br />
5<br />
4<br />
4<br />
3<br />
D D<br />
C C<br />
B B<br />
A A<br />
U25D is used<br />
on page 3<br />
DO(+) 10<br />
DO(-) 11<br />
U35C<br />
DS26C31TM<br />
9<br />
DI<br />
R262<br />
10K<br />
DGND DGND<br />
DO(+) 6<br />
DO(-) 5<br />
U35B<br />
DO(+)<br />
DS26C31TM<br />
7<br />
DI<br />
14<br />
DO(-) 13<br />
U35D<br />
DS26C31TM<br />
15<br />
DI<br />
R251<br />
R258<br />
10K<br />
10K<br />
DGND<br />
.01UF C138<br />
3<br />
DGND<br />
P-3,4,7,8,9,10,15,<br />
DGND<br />
2<br />
2<br />
VCC<br />
EN1<br />
16<br />
4<br />
SHUTDOWN = LOGIC 1 HOLDOFF DURING<br />
POWER-UP INIT OR RESET.<br />
CONNECT ANY DEVICE/INPUT HERE<br />
THAT NEEDS TO BE HELD RESET<br />
DURING THE INIT/POWER-UP<br />
PERIOD.<br />
+5V<br />
DGND<br />
From Canary Circuit<br />
P-7, /SHUTDOWN_UNBUF<br />
DIFFERENTIAL SIGNALS<br />
ARE FROM SOURCE PCB;<br />
RIBBON CONNECTOR J1<br />
P-7,9, +3.3V_FPGA<br />
+3.3V_FPGA<br />
DGND<br />
/SPI_MISO_ENABLE<br />
"FPGA CANARY"<br />
/SHUTDOWN<br />
SHUTDOWN<br />
CANARY_CLOCK_FPGA_OUT P-7,<br />
/SPI_MISO_ENABLE<br />
CONTROLS TRI-STATE BUS CONNECTION<br />
/SPI_MISO_FPGA_OUT_BUF<br />
DATA TO BE PLACED ON TRI-STATE BUS-<br />
BACK TO SYSTEM CONTROL PCB.<br />
R253<br />
10K<br />
FPGA 6 OF 15<br />
14 U34D<br />
12<br />
/SHUTDOWN_FPGA_OUT 11<br />
13<br />
SPI_MISO_ENABLE_FPGA_OUT<br />
7<br />
CANARY_CLOCK_FPGA_OUT<br />
74HCT00<br />
/SPI_MISO_FPGA_OUT<br />
SPI_ADC_CLOCK_FPGA_OUT<br />
SPI_ADC_DATA_FPGA_IN (Master In Slave Out [MISO])<br />
SPI_CLOCK_FPGA_IN is a global located on<br />
schematic page 7@ D-1.<br />
SPI_SELECT_FPGA_IN is a global located on<br />
schematic page 7@ D-1.<br />
SPI_MOSI_FPGA_IN<br />
upper left corner<br />
SPARES<br />
+5V DGND<br />
+5V R204<br />
+5V<br />
10K<br />
DGND<br />
+5V<br />
DGND<br />
+3.3V_FPGA<br />
TO CONNECTOR J2<br />
SPI_MISO+ SPI_MISO+ P-3,<br />
SPI_MISO_FPGA_OUT_BUF<br />
SPI_MISO- SPI_MISO- P-3,<br />
+5V<br />
+5V<br />
P-3,4,7,8,9,10,15,<br />
+5V<br />
+5V<br />
P-16,<br />
0.1 50V<br />
SPI_ADC_CLOCK_FPGA_OUT_BUF<br />
DGND<br />
C139<br />
DGND<br />
SPI_ADC_DATA_FPGA_IN P-16,<br />
DGND<br />
FPGA 13 OF 15<br />
SPI_MOSI_FPGA_IN P-3,<br />
IO141<br />
+5V<br />
P-3,<br />
HV_ON_OVERRIDE_FPGA_OUT<br />
/HV_ON_OVERRIDE_FPGA_OUT_BUF<br />
TL35<br />
1=FORCE<br />
HV ENABLED<br />
DGND<br />
upper right<br />
F20<br />
IO142 G18<br />
IO143 F19<br />
IO144 E20<br />
IO145 F18<br />
IO146 E19<br />
IO147 D19<br />
IO148 C20<br />
IO149 E17<br />
IO150 D18<br />
IO151 C19<br />
IO152 B20<br />
IO153 C18<br />
IO154 B19<br />
IO155 A20<br />
IO156 A19<br />
IO157 B18<br />
IO158 C17<br />
IO159 D16<br />
IO160 A18<br />
TP15<br />
1<br />
1 /SHUTDOWN<br />
TP17<br />
1<br />
1 SHUTDOWN<br />
U25B<br />
R199<br />
74HCT00<br />
10K<br />
14<br />
14<br />
4<br />
1<br />
6<br />
3<br />
5<br />
2<br />
7<br />
7<br />
10K<br />
R195<br />
U21H<br />
9 11<br />
74HCT541<br />
U30-13<br />
R209<br />
4.99K<br />
EPF6024ABC256<br />
U25A<br />
R252 R250<br />
10K 10K<br />
U25A<br />
74HCT00<br />
D15<br />
GRN LED1<br />
DO(+)<br />
R215<br />
10K<br />
14 U25C<br />
9<br />
8<br />
10<br />
7<br />
74HCT00<br />
2<br />
DO(-) 3<br />
IO1<br />
U35A<br />
DS26C31TM<br />
1<br />
DI<br />
B3<br />
IO2 B2<br />
IO3 A2<br />
IO4 C3<br />
IO5 B1<br />
IO6 C2<br />
IO7 D2<br />
IO8 D3<br />
IO9 E4<br />
IO10 C1<br />
IO11 D1<br />
IO12 E3<br />
IO13 E2<br />
IO14 G4<br />
IO15 F2<br />
IO16 F1<br />
IO17 G3<br />
IO18 G2<br />
IO19 G1<br />
IO20 H3<br />
14<br />
9<br />
10<br />
7<br />
U34C<br />
8<br />
74HCT00<br />
U34B<br />
74HCT00<br />
14<br />
4<br />
5<br />
7<br />
6<br />
14<br />
1<br />
3<br />
2<br />
7<br />
74HCT00 U34A<br />
U30-6<br />
EPF6024ABC256<br />
.01UF C103<br />
10K<br />
R213<br />
R270<br />
1K<br />
10K R259<br />
R186 10K<br />
GND<br />
EN2<br />
8<br />
12<br />
1<br />
PAGE 06 FPGA W/ SPI & CANARY<br />
<strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991<br />
ELECTRON CORPORATION<br />
Title<br />
Size Document Number Rev<br />
B<br />
SCH, TOP COVER BOARD<br />
97055-91040 D<br />
Date: Wednesday, July 27, 2005<br />
Sheet 6 of 17<br />
1
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