5 CONNECTOR- POWER 5 P-11,12,15, 4 P-11, 4 +36V +36V_RET +36V +36V +36V_RET +36V_RET +5V DGND 3 D D +15V P-3,6,7,8,9,10,15, +5V C C AGND AGND SC9 ANALOG CIRCUITRY POWER AND GROUND P-13,15,17, +15V -15V AGND R-F COVER MOUNTING SCREW HOLES SC10 B B 1 MTG SCREW SC11 RFGND RFGND RFGND RFGND SC1 C1 + 10uF 25V tant 1 1 PCB MOUNTING SCREW HOLES SC2 1 MTG SCREW RFGND RFGND RFGND RFGND A A SC5 1 MTG SCREW MTG SCREW MTG SCREW C51 0.1 50V SC6 1 MTG SCREW RFGND RFGND RFGND RFGND 1 SC3 1 SC7 MTG SCREW 1 10uF 25V tant C87 + MTG SCREW MTG SCREW + C25 0.1 50V SC12 1 SC4 SC8 FROM POWER DISTRIBUTION BOARD MTG SCREW 1 1 MTG SCREW MTG SCREW P-13,15,17, -15V AGND P-13,15,17, 1 2 3 4 5 6 J2 MOLEX Molex Mini-Fit Jr 5569;39-30-1121 RFGND 7 8 9 10 11 12 CONN-MOLEX-12 3 DGND +15V AGND -15V RFGND ENDEAVOR REMOTE Star Point +36V_RET +5V RFGND DGND AGND DIGITAL POWER AND GROUND. RFGND RFGND RFGND DGND P-3,6,7,8,9,10,15, +15V P-13,15,17, AGND P-13,15,17, -15V P-13,15,17, P-3,6,7,8,9,10,15, +5V C88 + C84 10uF 25V tant 0.1 50V DGND DGND DGND P-3,6,7,8,9,10,15, RFGND P-5,11,15, PLACED CONVENIENTLY. TP21 "RFGND" 1 1 TP22 "RFGND" 1 1 TP23 "RFGND" 1 1 2 TOP COVER BOARD Local Star Point LOCATE NEAR POWER CONNECTOR +36V_RET 2 PACE BYPASS CAPACITORS AND STAR POINT RESISTORS CLOSE TO POWER CONNECTOR. RFGND R273 150 +36V AGND GCGND RDBKGND R-F GENERATOR POWER AND GROUND C21 + 100UF R59 0.0 10uF 50V tant C69 + +36V_RET +36V_RET 1 GCGND P-10,11,12,13, RDBKGND P-14,15,16,17, RDBKGND P-11, +36V +36V_RET P-11,12,15, CONNECTOR- POWER <strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991 ELECTRON CORPORATION Title Size Document Number Rev B R54 0.0 C68 0.1 50V SCH, TOP COVER BOARD 97055-91040 D Date: Wednesday, July 27, 2005 Sheet 4 of 17 1
5 LENS D-C FROM ANALOG BOARD 5 4 4 3 D D P-14, IM1_LENS_DC_RDBK P-14, SPLITLENS_GATE_RDBK SPLIT_LENS_DC_RDBK P-14, C C FRONT_LENS_DC BACK_LENS_DC IM1_LENS_DC FRONT_LENS_DC B B P-14, C15 .01UF, SMT, 1KV RFGND R30 332K 1206 R31 21.5K 1206 R9 332K 1206 R4 21.5K 1206 LENS_RDBK_LOCAL_REF RDBKGND RDBKGND TL5 TL7 TL8 PLACE 0.0 OHM RESISTOR NEAR READBACK R'S RDBKGND RFGND 0.0 AGND Add Wire Jumper for GATE or DC 3 3 2 2 AGND RFGND 1 1 REAR RIGHT CONNECTOR (VIEWED FROM TOP SIDE) R124 4 5 J4 4 5 BOTTOM VIEW R7 332K 1206 6 6 R2 21.5K 1206 C2 8 8 7 7 1 2 J10 SAT_1x3 3 .01UF, SMT, 1KV CERFEED-8(LENS) 1&2= GATE 2&3= D-C "RFGND" TL31 C4 RFGND .01UF, SMT, 1KV 1812 RFGND RDBKGND PIN LOCATIONS WHEN VIEWED FROM TOP SIDE OF PCB (A VIEW OF THE BOTTOM OF THE CERAMIC FEEDTHROUGH CONNECTOR) RDBKGND BACK_LENS_DC_RDBK P-14, RDBKGND A A 51.43 deg between pins .01UF, SMT, 1KV C6 CERFEED-8 ORIENTATION 2 1 TL12 3 7 8 TL13 4 6 5 R27 332K 1206 Molex Mini-Fit Jr. 5569;39-29-1141 J3 SPLITLENS_GATE SPLIT_LENS_DC FRONT_LENS_DC BACK_LENS_DC 1 2 3 4 5 8 9 10 11 12 M00_DC M0_DC M1_DC IM0_LENS_DC RFGND OCT_RF_SET OCT_RF_SET 6 7 13 14 OCT_RF_SET_REF P-12, OCT_RF_SET_REF P-12, CONN-MOLEX-14 R29 21.5K 1206 MOLEX 3 FRONT_LENS_DC_RDBK P-15, RDBKGND - SKIMMER - M00 MULTIPOLE 1. INTER-MULTIPOLE LENS 0, IM0 - M0 MULTIPOLE RE: .01UF, SMT, 1KV CAPS AS SPACE PERMITS: -KEEP CLOSE TO FEEDTHROUGHS -0.050" TRACE WIDTH -KEEP TRACE SHORT. READBACK RESISTORS MUST BE IN HIGH VOLTAGE AREA. R11 332K 1206 R8 21.5K 1206 LENS ORDER 2. INTER-MULTIPOLE LENS 1, IM1 3. SPLIT LENS 4. SPLIT LENS GATE - M1 MULTIPOLE 5. FRONT LENS - TRAP 6. BACK LENS RFGND TL6 RFGND P-4,11,15, 2 TL9 R108 21.5K 1206 RDBKGND RFGND P-4,11,15, 2 TL10 R18 R18RDBKGND 332K 1206 J5 4 5 3 3 4 5 BOTTOM VIEW 6 6 -150V D-C --> +150V D-C READBACKS= -8.286V->+8.286V Readbacks are buffered. "RFGND" TL32 RFGND R10 332K 1206 R3 332K 1206 IM0_LENS_DC 2 2 R5 21.5K 1206 8 8 7 7 1 1 CERFEED-8(LENS) RFGND TL11 R1 21.5K 1206 RDBKGND .01UF, SMT, 1KV C29 1812 FRONT RIGHT CONNECTOR (VIEWED FROM TOP SIDE) M0_DC_RDBK P-14, M1_DC_RDBK P-14, RDBKGND 1 M00_DC P-11, M0_DC P-11, M1_DC P-11, M00_DC_RDBK P-14, LENS CONNECTORS IM0_LENS_DC_RDBK P-14, <strong>Thermo</strong> 355 River Oaks Pkwy, San Jose, CA 95134-1991 ELECTRON CORPORATION Title Size Document Number Rev B R66 332K 1206 R180 21.5K 1206 SCH, TOP COVER BOARD 97055-91040 D Date: Wednesday, July 27, 2005 Sheet 5 of 17 1
- Page 1 and 2:
X Y Y X 90 o S3 S3 S3 Line Voltage
- Page 3 and 4:
SPI,VacOK, SYSRst, HVCTRL 5 5 4 4 3
- Page 5 and 6:
5 * ONLY +5.5 VCC USED ON THIS PAGE
- Page 7 and 8:
3 of 4 PWR REG, CONN 5 5 4 4 3 D D
- Page 9:
5 5 4 4 3 3 2 1 THIS DOCUMENT CONTA
- Page 12 and 13:
10 10 9 9 8 8 7 7 6 J J I I H H G G
- Page 14 and 15:
10 10 9 9 8 8 7 7 6 J J I I H H G G
- Page 16 and 17:
5 5 4 4 3 D D C C J1 CON6 1 2 3 4 5
- Page 18:
5 5 4 4 3 3 2 2 1 THIS DOCUMENT CON
- Page 21 and 22:
5 5 4 4 3 D D J1 CON6 1 2 3 4 5 6 Y
- Page 26 and 27:
A A B TP107 THIS DOCUMENT CONTAINS
- Page 28 and 29:
A A B +5V +5V C144 .01UF D D 1DIR S
- Page 30 and 31:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
- Page 32 and 33:
A Digital Valve Section A B +24V-AU
- Page 34 and 35:
A A B +11.75V +11.75V 4 SPARE GAS P
- Page 36 and 37:
A 4 TC- IS ALUMEL TC+ IS CHROMEL [1
- Page 38 and 39:
A A B ( 17.8 to 14.7 KHz ) +5V +15V
- Page 40 and 41:
A A -13.4V 8 4 B 6 6 C55 + + 1K .01
- Page 42 and 43:
5 5 4 4 3 +5V [18] /INJECT_WASTE_LE
- Page 44 and 45:
+60V A TP69 +24V-AUX +24V-AUX A B 4
- Page 46 and 47:
+5V D A A SHUTDOWN_BUF B 2DIR 4 [5]
- Page 48 and 49:
5 5 4 4 3 D CANARY_LED_FPGA_OUT [4]
- Page 50 and 51:
A A B 4 4 FROM FPGA SECTION Digital
- Page 52 and 53:
A A +11.75V B 4 7 + 5 4 - 6 +11.75V
- Page 54 and 55:
A A B 4 4 TC- IS ALUMEL TC+ IS CHRO
- Page 56 and 57:
A A B 4 4 3 3 +15VIN_IG C85 10uF 25
- Page 58 and 59:
A A -13.4V B 4 4 [11] [10] [12] [13
- Page 60 and 61:
[18] [18] +5V +5V 5 5 D D 4 4 3 D D
- Page 75 and 76:
5 5 4 4 ACQU_SP1_DR ACQU_SP1_RFS AC
- Page 77 and 78:
5 5 4 4 3 D D MALDI CABLE CONNECTOR
- Page 79 and 80:
5 5 4 4 3 D D C C B B A A 3 +5V FPG
- Page 81 and 82:
5 5 4 4 3 D D C C +3.3V VDDL ( ~ 2.
- Page 83 and 84: PA[0:31] 5 5 4 4 3 D D TS211 TS214
- Page 85 and 86: 5 5 PPC_D[0:63] PPC_A[10:31] MODCK[
- Page 87 and 88: 5 RC RC24 D 6 RC 5 RC 100pF-47ohm R
- Page 89 and 90: 5 5 4 4 3 D D CLK_DDS_X3 DDS1_/WR D
- Page 91 and 92: 5 5 4 4 3 D D CLK_FPGA /SRESET /SYS
- Page 93 and 94: 5 5 4 4 3 D D IO_DIR IO_DIR 0 free
- Page 95 and 96: 5 5 4 4 3 D D L0D[0..3] L0ACK L0CLK
- Page 97 and 98: 5 SCAN_SP0_DT U25-1 DS90LV047A U27B
- Page 99 and 100: 5 5 4 4 L0D[0..3] L4D[0..3] 3 D D
- Page 101 and 102: 5 5 4 4 3 3 2 2 1 1 D D C C B B A A
- Page 103 and 104: 5 5 4 4 3 D TURBO POWER +24V Tgnd J
- Page 105: 5 5 4 4 3 3 2 2 1 1 D D C C B B A A
- Page 113 and 114: 5 4 3 2 1 D +5V (NOT LOADED) +/SYS_
- Page 115 and 116: 5 +3.3V 4 3 D +3.3V +3.3V D D D (3.
- Page 117 and 118: 5 4 3 2 1 D C B A [2,10] [3] [3,10]
- Page 119 and 120: 5 5 +150V -150V 4 4 3 D [6] LT_FRON
- Page 121 and 122: [5] FOUT_GT[0..11] FOUT_GT[0..11] 5
- Page 123 and 124: 5 5 4 4 3 R102 ENABLE TP13 /FORCE_8
- Page 125 and 126: 5 5 4 4 3 D D C 10K C ENABLE TTL LE
- Page 127 and 128: 5 4 3 [19] [19] 10K R348 ANALOG_IN1
- Page 129 and 130: 5 4 8 4 - + 3 +13.4V -2.5V_REF2 "8K
- Page 131 and 132: 5 P. C. B. TOP COVER TABLE OF CONTE
- Page 133: 5 4 CONNECTOR- SPI AND CONTROL 5 4
- Page 137 and 138: 5 5 4 4 3 D D (CONFIG DONE) IO_TDO
- Page 139 and 140: 5 PAGE 9 LOCAL POWER & UNUSED FPGA
- Page 141 and 142: FROM PAGE 5 P-5, P-5, M1_DC M0_DC 5
- Page 143 and 144: 5 5 4 4 3 D D P-4,15,17, +15V C C +
- Page 145 and 146: 5 SIGNAL READBACKS MUX P-4,11,12, +
- Page 147 and 148: 5 5 4 P-4,13,15, +15V +13V_RDBK P-4
- Page 149 and 150: 5 AUXILIARY AC SIGNAL "WAMP" FROM A
- Page 151 and 152: 5 +5VISOL_EXT +5ISOL (2/3A) 1 2 (5/
- Page 153 and 154: 5 5 4 4 3 D D TP61 1 1 2 1 2 1 2 2
- Page 155 and 156: 5 5 4 4 3 D D (2/2A) (2/2A) AUXIN-
- Page 157 and 158: (4/3B,8/1A,8/1A) +18VLOCAL 5 5 4 4
- Page 159 and 160: 5 5 4 4 3 D D GND GND VCC_UNF CLK-
- Page 161 and 162: 5 5 4 4 3 D +5V D AGND [2,3] [3] DA
- Page 163 and 164: 5 5 +15V 4 4 3 - SEE PAGE 1 D +VDF
- Page 165 and 166: AGND 2 5 C37 1 100nF +5V 4 3 2 D [4
- Page 168 and 169: 5 5 4 4 CPU/Digital PCB L0_D[0..7]
- Page 170 and 171: 5 5 4 4 3 D D GND_EARTH J16 J15 C 1
- Page 172 and 173: 5 5 Source PCB 4 4 3 D D J1 A1 1 A2
- Page 189:
THIS DOCUMENT CONTAINS PROPRIETARY