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ESE Magazine Jan/Feb 06
46
Continuous time
delta sigma ADCs
Heribert Geib, Xignal Technologies AG
Continuous time delta sigma analog-to-digital
converters provide new design opportunities.
UNTIL NOW, designers have been faced
with a trade-off in their selection of analog-to-digital
converters (ADCs). Pipeline
converters offer high resolution and high
dynamic range but at the expense of relatively high
power consumption. Discrete time delta sigma
converters don’t need nearly as much power but
are severely limited in terms of speed. The continuous
time delta sigma (CTΔΣ) technology developed
by Xignal bridges the gap and their recently
announced products operate at 40 MSPS (equivalent
to 50-60 MSPS in pipeline parts), 12 or 14-bits
of resolution, high levels of functional integration
including an accurate on-chip clock source, and all
this with a power consumption of just 70mW. An
added advantage of the technology is a resistive
input stage that’s easy to drive without resorting to
power-hungry buffer amplifiers. Figure 1 shows
the relative performance of these ADCs compared
with pipeline converters based on the IEEE’s
accepted measurement of Figure of Merit (FOM).
FOM is a measure of the energy per conversion. It
also shows that as process architectures scale in
the future, continuous time delta sigma devices
will follow the roadmap to deliver higher levels of
performance. Figure 2 looks at a complete analog-
Figure 1: ADC conversion power efficiency
comparison
Figure 2: Integrating the signal path –
enabled by CTΔΣ ADC technology.
to-digital conversion system. The left hand side
shows the pipeline converter with the five external
circuit elements that are needed for a complete
system: a programmable gain amplifier with the
gain controlled via a separate digital-to-analog
converter (DAC), anti-alias filters to remove noise,
and input driver to buffer the capacitive input of the
ADC itself, and a high performance clock and
phase locked loop to provide an accurate timing
reference. By contrast, the continuous time delta
sigma implementation removes the need for antialias
filtering and the input driver, and Xignal’s
implementation of the technology integrates all of
the other functions on-chip. The generic benefits
of CTΔΣ conversion are clear: faster and simpler
system design, lower power consumption, and no
compromise in dynamic range or speed. In multichannel
applications these benefits are multiplied
and can enable designers to adopt new and beneficial
system architectures that were not previously
possible. Potential applications for the technology
are widespread in all sectors of the electronics
industry, particularly where analog signals derived
from various types of sensors need to be converted
to digital signals in a power-efficient manner.
Medical ultrasound is just one of these applications.
Medical ultrasound applications
In these systems a transducer is connected via a
flexible cable to the data processing unit (PU)
that processes the data. Each transducer element
is connected to the PU through its own
data-channel or multiplexing circuits are used to
reduce the number of cables. High-end systems
are equipped with up to 512 channels, mid-level
performance systems with up to 256 channels
and portable systems up to 128.
Prior to the development of CDTS technology
analog front-ends the pipeline ADCs consumed
anything up to 0.5 Watt for each channel. That's 64
Watts for a mid-range (128 channel) system with
enough heat being generated to affect the performance
of the transducer head and cause significant
discomfort to both patient and doctor. By contrast,
the CTΔΣ solution in the same system would consume
just 8.75 Watts or even less by using a multichannel
ADC device sharing some resources like
the PLL across multiple channels. With an 8-chan-
Figure 3: xxxx
nel 12 bit ADC a power dissipation of 40mW/channel
or 5.12 W for 128 channels can be achieved.
Furthermore, as demand grows for portable
systems that shrink the size of an ultrasound
scanner from a small rack to the size of a notebook
or even smaller, ADC power dissipation is
an important design parameter in realizing a
compact and low-cost system that needs minimal
cooling, whether the conversion takes place
in the transducer head or the PU. New systems
may also be battery operated, so minimizing
power consumption is even more critical.
The simplified architecture of an ultrasound
system with analog-to-digital conversion using
CTΔΣ ADCs in the transducer head is shown in
Figure 3. In addition to the ADCs, the active transducer
houses low power variable gain amplifiers,
serializers and a digital interface, enabling a
greatly reduced number of cables to be used to
interconnect with the main processor unit.
Summary
The advantages of CDTS ADCs are apparent wherever
high speed, high resolution conversion is needed
at the lowest possible power consumption. In
sensor-related applications in automotive, medical,
industrial and test and measurement equipment,
the technology can be used to create new architectures
where the conversion to a digital signal is carried
out close to the sensor. The benefits of the
CTΔΣ ADC conversion process itself are compelling
and the additional system level benefits of lower
cost cables and interconnect, and the option to use
lower performance, lower cost receivers add to the
attractions of this technology.
www.xignal.com