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ESE Magazine Jan/Feb 06
40
The fourth RTOS
Kevin Pope, Quadros Inc.
Cores combining MCU and DSP architectures require a different kind of RTOS.
THE EMBEDDED software market has
historically developed two fundamentally
different RTOS architectures, each designed
to serve the needs of the underlying processor
architectures; specifically MCU’s (CISC/RISC)
and DSP's. Most commercial RTOS vendors have
developed solutions adapted and optimized to one
or other of these designs and their (traditionally
somewhat different) applications.
A third RTOS design, multiprocessor, is
required to support multiple processor architectures,
completing the “traditional” RTOS space.
In recent years, however, the pressure to
reduce both cost and power consumption in volume
applications such as consumer hand-held
multimedia electronics has increased dramatically.
Consumers are driving their objects of desire
smaller and smarter. There are many issues for
the manufacturer, but the essential question has
to be – how to fit more features and functions
into an ever decreasing physical space. Inside
the glossy exterior, there is a struggle for space
on a PCB already overcrowded with connectors
for USB, antenna(s), power, flash, etc.
Convergent processors
These market pressures have led to the emergence
of a new type of single core hybrid, or convergent
processor, combining both MCU and DSP
architectures. Such ‘convergent’ processors can
be designed as DSP's with MCU capabilities (e.g.
Freescale’s DSP56800E) or MCU’s with DSP
extensions (e.g. Freescale's ColdFire) or completely
new cores designed from the ground up to
serve both architectural needs (e.g. StarCore, or
ADI's Blackfin). These single core designs enable
hardware engineers to reduce chip count and
reduce the overall size of the device, leading to a
reduction in system cost and power consumption.
But this creates a challenge for the design of
the supporting RTOS architecture: should it be
Table 1: Single stack advantages
Multitasking Architecture
for Control Plane Processing
optimized for the interrupt-driven control environment
of the MCU, or for the data-flow environment
of DSP? In the same way that silicon
has been forced to converge, a fourth RTOS
type, optimized for the convergent environment
is also needed.
Quadros Inc have recognized this trend by
developing a 4-way RTOS design, RTXC
Quadros, with a version designed and optimized
for each of the four architectural types; MCU,
DSP, Multiprocessing, and ‘Convergent’. The
approach taken to provide a convergent software
solution is to use a “dual mode” RTOS
design, with each part of the application running
in an environment optimized either for DSP or
MCU execution.
Context overhead
The main drawback of a multi-tasking MCU type
RTOS for a DSP engineer is the necessity for
each task to retain what is known as a context.
This storing and restoring of data consumes
vital processor instruction cycles and delays processing
of the interrupt. When the interrupts are
frequent and constant, as in streaming media,
the context switch becomes a heavy overhead in
the system. In the worst case, the control application
may never get any processor time to complete
its necessary processing or the interrupts
may be lost because the ISRs cannot keep up
with the demand from external events.
With a convergent processor, these two
roles must be balanced efficiently within a single
resource. The obvious way to assist this situation
is to reduce overheads and the biggest
Multithreaded Architecture
for Data Plane Processing
One stack per task All threads use single stack
Multiple priorities Multiple priority levels
Preemption between priorities Preemption between levels
Context saved and restored as needed No context saved or restored except on preemption
Can wait for an event Cannot wait for an event
Lower priority than threads Run to completion within a level
The question is how to fit more features and
functions into an ever decreasing physical space
overhead in a system with many interrupts is the
context switch.
The dual-mode design of RTXC/dm combines
a traditional task-based kernel architecture for
real-time control processing with a specialized
executive for DSP and dataflow operations. The
control application code will execute in the
familiar environment of a pre-emptive priority
based scheduler, typically used for such tasks as
user interface, communication paths and peripherals.
Meanwhile, the signal processing application
code will execute in a highly efficient single-stack
environment. (See Table 1).
Fast switching
DSP processes, handled by lightweight code
entities called threads, run at a priority higher
than control tasks, ensuring they get access to
the CPU and can meet their real-time requirements.
Thread-to-thread switching is very fast
because threads carry no context. Control operations
are supported by a multitasking processing
model with a rich set of static and dynamic
kernel objects and inter task synchronization
options. As a further advantage, all this takes
place in a single development environment, so
both DSP and MCU-based development tools
can communicate easily between the domains
using the object classes and related services of
the operating system.
Thus the use of a dual mode RTOS architecture
ensures that the developer of such
demanding applications can fully leverage the
low cost, low power advantages of the new
convergent processor designs emerging in the
market today.
www.quadros.com